2039           seq_printf(m, "GFX Clocks and Power:\n");  in amdgpu_debugfs_pm_info_pp()
2041                     seq_printf(m, "\t%u MHz (MCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2043                     seq_printf(m, "\t%u MHz (SCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2045                     seq_printf(m, "\t%u MHz (PSTATE_SCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2047                     seq_printf(m, "\t%u MHz (PSTATE_MCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2049                     seq_printf(m, "\t%u mV (VDDGFX)\n", value);  in amdgpu_debugfs_pm_info_pp()
2051                     seq_printf(m, "\t%u mV (VDDNB)\n", value);  in amdgpu_debugfs_pm_info_pp()
2054                     seq_printf(m, "\t%u.%u W (average GPU)\n", query >> 8, query & 0xff);  in amdgpu_debugfs_pm_info_pp()
2056           seq_printf(m, "\n");  in amdgpu_debugfs_pm_info_pp()
2060                     seq_printf(m, "GPU Temperature: %u C\n", value/1000);  in amdgpu_debugfs_pm_info_pp()
2064                     seq_printf(m, "GPU Load: %u %%\n", value);  in amdgpu_debugfs_pm_info_pp()
2065           seq_printf(m, "\n");  in amdgpu_debugfs_pm_info_pp()
2070                               seq_printf(m, "UVD: Disabled\n");  in amdgpu_debugfs_pm_info_pp()
2072                               seq_printf(m, "UVD: Enabled\n");  in amdgpu_debugfs_pm_info_pp()
2074                                         seq_printf(m, "\t%u MHz (DCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2076                                         seq_printf(m, "\t%u MHz (VCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2079           seq_printf(m, "\n");  in amdgpu_debugfs_pm_info_pp()
2084                               seq_printf(m, "VCE: Disabled\n");  in amdgpu_debugfs_pm_info_pp()
2086                               seq_printf(m, "VCE: Enabled\n");  in amdgpu_debugfs_pm_info_pp()
2088                                         seq_printf(m, "\t%u MHz (ECCLK)\n", value/100);  in amdgpu_debugfs_pm_info_pp()
2100                     seq_printf(m, "\t%s: %s\n", clocks[i].name,  in amdgpu_parse_cg_state()
2113           seq_printf(m, "Clock Gating Flags Mask: 0x%x\n", flags);  in amdgpu_debugfs_pm_info()
2115           seq_printf(m, "\n");  in amdgpu_debugfs_pm_info()
2118                     seq_printf(m, "dpm not enabled\n");  in amdgpu_debugfs_pm_info()
2123                     seq_printf(m, "PX asic powered off\n");  in amdgpu_debugfs_pm_info()
2129                               seq_printf(m, "Debugfs support not implemented for this asic\n");  in amdgpu_debugfs_pm_info()