| /NextBSD/contrib/llvm/include/llvm/CodeGen/ |
| HD | ISDOpcodes.h | 828 SETLE, // 1 X 1 0 1 True if less than or equal enumerator 838 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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| /NextBSD/contrib/llvm/lib/CodeGen/ |
| HD | Analysis.cpp | 188 case ISD::SETOLE: case ISD::SETULE: return ISD::SETLE; in getFCmpCodeWithoutNaN() 202 case ICmpInst::ICMP_SLE: return ISD::SETLE; in getICmpCondCode()
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| HD | TargetLoweringBase.cpp | 734 CCs[RTLIB::OLE_F32] = ISD::SETLE; in InitCmpLibcallCCs() 735 CCs[RTLIB::OLE_F64] = ISD::SETLE; in InitCmpLibcallCCs() 736 CCs[RTLIB::OLE_F128] = ISD::SETLE; in InitCmpLibcallCCs()
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| /NextBSD/contrib/llvm/lib/Target/Hexagon/ |
| HD | HexagonSelectCCInfo.td | 49 IntRegs:$fval, SETLE)),
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| /NextBSD/contrib/llvm/lib/Target/X86/ |
| HD | X86InstrCMovSetCC.td | 110 defm SETLE : SETCC<0x9E, "setle", X86_COND_LE>; // signed less than or equal
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| HD | X86IntrinsicsInfo.h | 1012 X86_INTRINSIC_DATA(sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE), 1052 X86_INTRINSIC_DATA(sse2_ucomile_sd, COMI, X86ISD::UCOMI, ISD::SETLE), 1087 X86_INTRINSIC_DATA(sse_comile_ss, COMI, X86ISD::COMI, ISD::SETLE), 1098 X86_INTRINSIC_DATA(sse_ucomile_ss, COMI, X86ISD::UCOMI, ISD::SETLE),
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| /NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | TargetLowering.cpp | 151 case ISD::SETLE: in softenSetCCOperands() 1458 case ISD::SETLE: in SimplifySetCC() 1633 if (Cond == ISD::SETLE || Cond == ISD::SETULE) { in SimplifySetCC() 1637 ISD::CondCode NewCC = (Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT; in SimplifySetCC() 1654 if ((Cond == ISD::SETLE || Cond == ISD::SETULE) && C1 == MaxVal) in SimplifySetCC() 2060 case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> ~Y | X in SimplifySetCC()
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| HD | SelectionDAGDumper.cpp | 334 case ISD::SETLE: return "setle"; in getOperationName()
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| HD | LegalizeIntegerTypes.cpp | 949 case ISD::SETLE: in PromoteSetCCOperands() 2687 case ISD::SETLE: in IntegerExpandSetCCOperands() 2722 (CCCode == ISD::SETLE || CCCode == ISD::SETGE || in IntegerExpandSetCCOperands()
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| /NextBSD/contrib/llvm/lib/Target/AMDGPU/ |
| HD | AMDGPUInstructions.td | 96 [{return N->get() == ISD::SETOLE || N->get() == ISD::SETLE;}] 128 def COND_SLE : PatLeaf <(cond), [{return N->get() == ISD::SETLE;}]>;
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| HD | R600ISelLowering.cpp | 49 setCondCodeAction(ISD::SETLE, MVT::f32, Expand); in R600TargetLowering() 59 setCondCodeAction(ISD::SETLE, MVT::i32, Expand); in R600TargetLowering()
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| HD | AMDGPUISelLowering.cpp | 1129 case ISD::SETLE: in CombineFMinMaxLegacy() 1189 case ISD::SETLE: in CombineIMinMax()
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| /NextBSD/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCInstrQPX.td | 1032 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETLE), 1079 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETLE), 1121 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETLE)), 1142 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETLE)), 1163 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETLE)),
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| HD | PPCInstrInfo.td | 2876 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETLE)), 3019 defm : ExtSetCCPat<SETLE, 3051 defm : ExtSetCCPat<SETLE, 3094 defm : CRNotPat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETLE)), 3122 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETLE)), 3162 defm : CRNotPat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETLE)), 3190 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETLE)), 3217 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETLE)), 3248 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETLE)), 3271 def : Pat <(i1 (selectcc i1:$lhs, i1:$rhs, i1:$tval, i1:$fval, SETLE)), [all …]
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| HD | PPCISelDAGToDAG.cpp | 2050 case ISD::SETLE: return PPC::PRED_LE; in getPredicateForSetCC() 2080 case ISD::SETLE: Invert = true; return 1; // !Bit #1 = SETULE in getCRIdxForSetCC() 2106 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break; in getVCmpInst() 2152 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break; in getVCmpInst() 2162 case ISD::SETLE: CC = ISD::SETGT; Negate = true; break; in getVCmpInst()
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| HD | PPCInstrVSX.td | 964 def : Pat<(v2f64 (selectcc i1:$lhs, i1:$rhs, v2f64:$tval, v2f64:$fval, SETLE)), 985 def : Pat<(f64 (selectcc i1:$lhs, i1:$rhs, f64:$tval, f64:$fval, SETLE)), 1084 def : Pat<(f32 (selectcc i1:$lhs, i1:$rhs, f32:$tval, f32:$fval, SETLE)),
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| /NextBSD/contrib/llvm/lib/Target/BPF/ |
| HD | BPFISelLowering.cpp | 471 case ISD::SETLE: in NegateCC()
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| /NextBSD/contrib/llvm/lib/Target/Mips/ |
| HD | MipsSEISelLowering.cpp | 960 case ISD::SETLE: in isLegalDSPCondCode() 1008 if (CondCode == ISD::SETLT || CondCode == ISD::SETLE) in performVSELECTCombine() 1700 Op->getOperand(2), ISD::SETLE); in lowerINTRINSIC_WO_CHAIN() 1706 lowerMSASplatImm(Op, 2, DAG), ISD::SETLE); in lowerINTRINSIC_WO_CHAIN()
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| HD | MipsDSPInstrInfo.td | 1362 def : DSPSetCCPat<PseudoCMP_LE_PH, PseudoPICK_PH, v2i16, SETLE>; 1375 def : DSPSelectCCPat<PseudoCMP_LE_PH, PseudoPICK_PH, v2i16, SETLE>;
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| HD | MipsMSAInstrInfo.td | 220 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>; 221 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>; 222 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>; 223 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
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| /NextBSD/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelLowering.cpp | 1254 case ISD::SETLE: return ARMCC::LE; in IntCCToARMCC() 1284 case ISD::SETLE: in FPCCToARMCC() 3217 CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; in getARMCmp() 3228 case ISD::SETLE: in getARMCmp() 3231 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; in getARMCmp() 3626 case ISD::SETLE: in LowerSELECT_CC() 3663 case ISD::SETLE: in LowerSELECT_CC() 4604 case ISD::SETLE: Swap = true; // Fallthrough in LowerVSETCC() 4638 case ISD::SETLE: Swap = true; in LowerVSETCC() 9980 case ISD::SETLE: in PerformSELECT_CCCombine() [all …]
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| /NextBSD/contrib/llvm/include/llvm/Target/ |
| HD | TargetSelectionDAG.td | 564 def SETLT : CondCode; def SETLE : CondCode; def SETNE : CondCode; 930 (setcc node:$lhs, node:$rhs, SETLE)>;
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| /NextBSD/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64ISelLowering.cpp | 1019 case ISD::SETLE: in changeIntCCToAArch64CC() 1082 case ISD::SETLE: in changeFPCCToAArch64CC() 1192 CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT; in getAArch64Cmp() 1207 case ISD::SETLE: in getAArch64Cmp() 1213 CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE; in getAArch64Cmp() 8907 case ISD::SETLE: in performSelectCCCombine() 8908 IsOrEqual = (CC == ISD::SETLE || CC == ISD::SETOLE || CC == ISD::SETULE); in performSelectCCCombine()
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| /NextBSD/contrib/llvm/lib/Target/MSP430/ |
| HD | MSP430ISelLowering.cpp | 863 case ISD::SETLE: in EmitCMP()
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| /NextBSD/contrib/llvm/lib/Target/Sparc/ |
| HD | SparcISelLowering.cpp | 1333 case ISD::SETLE: return SPCC::ICC_LE; in IntCondCCodeToICC() 1355 case ISD::SETLE: in FPCondCCodeToFCC()
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