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Searched refs:AMDGPUSubtarget (Results 1 – 25 of 41) sorted by relevance

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/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDAMDGPUSubtarget.cpp34 AMDGPUSubtarget &
35 AMDGPUSubtarget::initializeSubtargetDependencies(const Triple &TT, in initializeSubtargetDependencies()
57 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { in initializeSubtargetDependencies()
64 AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS, in AMDGPUSubtarget() function in AMDGPUSubtarget
68 TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false), in AMDGPUSubtarget()
84 if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { in AMDGPUSubtarget()
93 unsigned AMDGPUSubtarget::getStackEntrySize() const { in getStackEntrySize()
107 unsigned AMDGPUSubtarget::getAmdKernelCodeChipID() const { in getAmdKernelCodeChipID()
114 AMDGPU::IsaVersion AMDGPUSubtarget::getIsaVersion() const { in getIsaVersion()
118 bool AMDGPUSubtarget::isVGPRSpillingEnabled( in isVGPRSpillingEnabled()
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HDAMDGPUAsmPrinter.cpp64 const AMDGPUSubtarget& ST = F.getSubtarget<AMDGPUSubtarget>(); in getFPMode()
95 const AMDGPUSubtarget &STM = MF->getSubtarget<AMDGPUSubtarget>(); in EmitFunctionBodyStart()
125 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); in runOnMachineFunction()
127 if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { in runOnMachineFunction()
154 if (STM.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { in runOnMachineFunction()
195 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); in EmitProgramInfoR600()
220 if (STM.getGeneration() >= AMDGPUSubtarget::EVERGREEN) { in EmitProgramInfoR600()
254 const AMDGPUSubtarget &STM = MF.getSubtarget<AMDGPUSubtarget>(); in getSIProgramInfo()
363 if (ProgInfo.NumSGPR > AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG) { in getSIProgramInfo()
368 ProgInfo.NumSGPR = AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG; in getSIProgramInfo()
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HDAMDGPUCallingConv.td62 CCIf<"static_cast<const AMDGPUSubtarget&>"
64 "AMDGPUSubtarget::SOUTHERN_ISLANDS && "
68 CCIf<"static_cast<const AMDGPUSubtarget&>"
70 "AMDGPUSubtarget::SOUTHERN_ISLANDS && "
74 CCIf<"static_cast<const AMDGPUSubtarget&>"
76 "AMDGPUSubtarget::SOUTHERN_ISLANDS",
78 CCIf<"static_cast<const AMDGPUSubtarget&>"
80 "AMDGPUSubtarget::SOUTHERN_ISLANDS",
HDAMDGPUMCInstLower.h16 class AMDGPUSubtarget; variable
23 const AMDGPUSubtarget &ST;
26 AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST);
HDAMDGPUTargetMachine.cpp121 const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); in createMachineScheduler()
122 if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) in createMachineScheduler()
179 const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); in addCodeGenPrepare()
189 const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); in addPreISel()
216 const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); in addPreSched2()
256 const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); in addPreRegAlloc()
HDSIMachineFunctionInfo.cpp43 MF->getSubtarget<AMDGPUSubtarget>().getRegisterInfo()); in getSpilledReg()
73 const AMDGPUSubtarget &ST = MF.getSubtarget<AMDGPUSubtarget>(); in getMaximumWorkGroupSize()
HDAMDGPUSubtarget.h36 class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
101 AMDGPUSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
103 AMDGPUSubtarget &initializeSubtargetDependencies(const Triple &TT,
291 if (getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) in getMaxWavesPerCU()
HDAMDGPUTargetMachine.h36 AMDGPUSubtarget Subtarget;
45 const AMDGPUSubtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl()
46 const AMDGPUSubtarget *getSubtargetImpl(const Function &) const override { in getSubtargetImpl()
HDSIRegisterInfo.cpp51 if (MF.getSubtarget<AMDGPUSubtarget>().hasSGPRInitBug()) { in getReservedRegs()
55 unsigned Limit = AMDGPUSubtarget::FIXED_SGPR_COUNT_FOR_INIT_BUG - 4; in getReservedRegs()
69 const AMDGPUSubtarget &STI = MF.getSubtarget<AMDGPUSubtarget>(); in getRegPressureSetLimit()
264 switch (MF->getSubtarget<AMDGPUSubtarget>().getGeneration()) { in eliminateFrameIndex()
265 case AMDGPUSubtarget::SOUTHERN_ISLANDS: in eliminateFrameIndex()
269 case AMDGPUSubtarget::SEA_ISLANDS: in eliminateFrameIndex()
523 unsigned SIRegisterInfo::getNumSGPRsAllowed(AMDGPUSubtarget::Generation gen, in getNumSGPRsAllowed()
525 if (gen >= AMDGPUSubtarget::VOLCANIC_ISLANDS) { in getNumSGPRsAllowed()
HDAMDGPUMCInstLower.cpp39 AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st): in AMDGPUMCInstLower()
95 const AMDGPUSubtarget &STI = MF->getSubtarget<AMDGPUSubtarget>(); in EmitInstruction()
HDAMDGPUTargetTransformInfo.h33 const AMDGPUSubtarget *ST;
36 const AMDGPUSubtarget *getST() const { return ST; } in getST()
HDAMDGPUInstrInfo.h35 class AMDGPUSubtarget; variable
45 const AMDGPUSubtarget &ST;
47 explicit AMDGPUInstrInfo(const AMDGPUSubtarget &st);
HDR600ControlFlowFinalizer.cpp42 const AMDGPUSubtarget *ST;
49 CFStack(const AMDGPUSubtarget *st, unsigned ShaderType) : ST(st), in CFStack()
122 if (ST->getGeneration() <= AMDGPUSubtarget::R700) { in getSubEntrySize()
135 assert(ST->getGeneration() >= AMDGPUSubtarget::EVERGREEN); in getSubEntrySize()
162 ST->getGeneration() > AMDGPUSubtarget::EVERGREEN && in pushBranch()
223 const AMDGPUSubtarget *ST;
237 bool isEg = (ST->getGeneration() >= AMDGPUSubtarget::EVERGREEN); in getHWInstrDesc()
475 ST = &MF.getSubtarget<AMDGPUSubtarget>(); in runOnMachineFunction()
HDAMDGPU.h20 class AMDGPUSubtarget; variable
63 FunctionPass *createAMDGPUPromoteAlloca(const AMDGPUSubtarget &ST);
HDSIInsertWaits.cpp262 if (MBB.getParent()->getSubtarget<AMDGPUSubtarget>().getGeneration() >= in pushInstruction()
263 AMDGPUSubtarget::VOLCANIC_ISLANDS) { in pushInstruction()
416 if (MBB.getParent()->getSubtarget<AMDGPUSubtarget>().getGeneration() < in handleSendMsg()
417 AMDGPUSubtarget::VOLCANIC_ISLANDS) in handleSendMsg()
HDAMDGPUISelDAGToDAG.cpp42 const AMDGPUSubtarget *Subtarget;
148 Subtarget = &static_cast<const AMDGPUSubtarget &>(MF.getSubtarget()); in runOnMachineFunction()
251 if (Subtarget->getGeneration() < AMDGPUSubtarget::SOUTHERN_ISLANDS || in glueCopyToM0()
294 Subtarget->getGeneration() < AMDGPUSubtarget::SOUTHERN_ISLANDS) in Select()
308 if (Subtarget->getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) { in Select()
408 if (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { in Select()
431 if (Subtarget->getGeneration() < AMDGPUSubtarget::SOUTHERN_ISLANDS || in Select()
515 if (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) in Select()
533 if (Subtarget->getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) in Select()
552 if (Subtarget->getGeneration() < AMDGPUSubtarget::SOUTHERN_ISLANDS) in Select()
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HDAMDGPUISelLowering.h24 class AMDGPUSubtarget; variable
29 const AMDGPUSubtarget *Subtarget;
114 AMDGPUTargetLowering(TargetMachine &TM, const AMDGPUSubtarget &STI);
HDR600RegisterInfo.h22 class AMDGPUSubtarget; variable
HDAMDGPURegisterInfo.h28 class AMDGPUSubtarget; variable
HDR700Instructions.td16 def isR700 : Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::R700">;
HDAMDGPUTargetTransformInfo.cpp71 if (ST->getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) in getNumberOfRegisters()
HDAMDGPU.td206 SubtargetFeature <Value, "Gen", "AMDGPUSubtarget::"#Value,
271 "Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
272 "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS"
HDAMDGPUPromoteAlloca.cpp34 const AMDGPUSubtarget &ST;
38 AMDGPUPromoteAlloca(const AMDGPUSubtarget &st) : FunctionPass(ID), ST(st), in AMDGPUPromoteAlloca()
420 FunctionPass *llvm::createAMDGPUPromoteAlloca(const AMDGPUSubtarget &ST) { in createAMDGPUPromoteAlloca()
HDCIInstructions.td14 "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS || "
15 "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS"
HDAMDGPUInstrInfo.cpp33 AMDGPUInstrInfo::AMDGPUInstrInfo(const AMDGPUSubtarget &st) in AMDGPUInstrInfo()
350 case AMDGPUSubtarget::VOLCANIC_ISLANDS: in AMDGPUSubtargetToSISubtarget()

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