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/freebsd-11-stable/contrib/amd/amd/
HDconf.c277 set_conf_kv(const char *section, const char *key, const char *val) in set_conf_kv()
351 process_global_option(const char *key, const char *val) in process_global_option()
372 gopt_arch(const char *val) in gopt_arch()
380 gopt_auto_attrcache(const char *val) in gopt_auto_attrcache()
392 gopt_auto_dir(const char *val) in gopt_auto_dir()
399 gopt_auto_nfs_version(const char *val) in gopt_auto_nfs_version()
413 gopt_autofs_use_lofs(const char *val) in gopt_autofs_use_lofs()
429 gopt_browsable_dirs(const char *val) in gopt_browsable_dirs()
448 gopt_cache_duration(const char *val) in gopt_cache_duration()
458 gopt_cluster(const char *val) in gopt_cluster()
[all …]
/freebsd-11-stable/sys/dev/vxge/vxgehal/
HDvxgehal-mrpcim-reg.h54 #define VXGE_HAL_G3FBCT_CONFIG0_RD_CMD_LATENCY_RPATH(val) vBIT(val, 5, 3) argument
55 #define VXGE_HAL_G3FBCT_CONFIG0_RD_CMD_LATENCY(val) vBIT(val, 13, 3) argument
56 #define VXGE_HAL_G3FBCT_CONFIG0_REFRESH_PER(val) vBIT(val, 16, 16) argument
57 #define VXGE_HAL_G3FBCT_CONFIG0_TRC(val) vBIT(val, 35, 5) argument
58 #define VXGE_HAL_G3FBCT_CONFIG0_TRRD(val) vBIT(val, 44, 4) argument
59 #define VXGE_HAL_G3FBCT_CONFIG0_TFAW(val) vBIT(val, 50, 6) argument
60 #define VXGE_HAL_G3FBCT_CONFIG0_RD_FIFO_THR(val) vBIT(val, 58, 6) argument
62 #define VXGE_HAL_G3FBCT_CONFIG1_BIC_THR(val) vBIT(val, 3, 5) argument
65 #define VXGE_HAL_G3FBCT_CONFIG1_RD_SAMPLING(val) vBIT(val, 29, 3) argument
67 #define VXGE_HAL_G3FBCT_CONFIG1_BIC_HI_THR(val) vBIT(val, 43, 5) argument
[all …]
HDvxgehal-vpmgmt-reg.h43 #define VXGE_HAL_SGRP_OWN_SGRP_OWN(val) vBIT(val, 0, 64) argument
47 #define VXGE_HAL_VPATH_TO_FUNC_MAP_CFG1_VPATH_TO_FUNC_MAP_CFG1(val)\ argument
52 #define VXGE_HAL_SRPCIM_TO_VPATH_WMSG_SRPCIM_TO_VPATH_WMSG(val)\ argument
59 #define VXGE_HAL_TIM_VPATH_ASSIGNMENT_BMAP_ROOT(val) vBIT(val, 0, 32) argument
63 #define VXGE_HAL_RQA_TOP_PRTY_FOR_VP_RQA_TOP_PRTY_FOR_VP(val) vBIT(val, 59, 5) argument
67 #define VXGE_HAL_USDC_VPATH_OWN_SGRP_OWN(val) vBIT(val, 0, 32) argument
94 #define VXGE_HAL_RTS_MGR_CFG0_VPMGMT_CLONE_FLEX_L4PRTCL_VALUE(val)\ argument
104 #define VXGE_HAL_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ETYPE(val)\ argument
106 #define VXGE_HAL_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_ICMP_TCPSYN(val)\ argument
108 #define VXGE_HAL_RTS_MGR_CRITERIA_PRIORITY_VPMGMT_CLONE_L4PN(val)\ argument
[all …]
HDvxgehal-vpath-reg.h43 #define VXGE_HAL_USDC_VPATH_SGRP_ASSIGN(val) vBIT(val, 0, 32) argument
59 #define VXGE_HAL_PRC_CFG1_RX_TIMER_VAL(val) vBIT(val, 3, 29) argument
65 #define VXGE_HAL_PRC_CFG1_RESET_TIMER_ON_RXD_RET(val) vBIT(val, 40, 2) argument
70 #define VXGE_HAL_PRC_CFG4_RING_MODE(val) vBIT(val, 14, 2) argument
77 #define VXGE_HAL_PRC_CFG4_BACKOFF_INTERVAL(val) vBIT(val, 40, 24) argument
79 #define VXGE_HAL_PRC_CFG5_RXD0_ADD(val) vBIT(val, 0, 61) argument
86 #define VXGE_HAL_PRC_CFG6_RXD_CRXDT(val) vBIT(val, 23, 9) argument
87 #define VXGE_HAL_PRC_CFG6_RXD_SPAT(val) vBIT(val, 36, 9) argument
89 #define VXGE_HAL_PRC_CFG7_SCATTER_MODE(val) vBIT(val, 6, 2) argument
93 #define VXGE_HAL_PRC_CFG7_RXD_BUFF_SIZE_MASK(val) vBIT(val, 20, 4) argument
[all …]
HDvxgehal-doorbells.h56 #define VXGE_HAL_NODBW_TYPE(val) vBIT(val, 0, 8) argument
60 #define VXGE_HAL_NODBW_LAST_TXD_NUMBER(val) vBIT(val, 32, 8) argument
63 #define VXGE_HAL_NODBW_LIST_NO_SNOOP(val) vBIT(val, 56, 8) argument
97 #define VXGE_HAL_ODBW_TYPE(val) vBIT(val, 0, 8) argument
101 #define VXGE_HAL_ODBW_SESSION_NUMBER(val) vBIT(val, 8, 24) argument
104 #define VXGE_HAL_ODBW_SESSION_INST_NUMBER(val) vBIT(val, 32, 8) argument
107 #define VXGE_HAL_ODBW_HIGH_TOWI_NUMBER(val) vBIT(val, 40, 24) argument
111 #define VXGE_HAL_ODBW_ENTRY_TYPE(val) vBIT(val, 0, 8) argument
117 #define VXGE_HAL_ODBW_IMMEDIATE_BYTE_COUNT(val) vBIT(val, 8, 8) argument
146 #define VXGE_HAL_ODBW_TYPE(val) vBIT(val, 0, 8) argument
[all …]
HDvxgehal-toc-reg.h43 #define VXGE_HAL_TOC_COMMON_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
45 #define VXGE_HAL_TOC_MEMREPAIR_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
47 #define VXGE_HAL_TOC_PCICFGMGMT_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
51 #define VXGE_HAL_TOC_MRPCIM_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
53 #define VXGE_HAL_TOC_SRPCIM_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
57 #define VXGE_HAL_TOC_VPMGMT_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
61 #define VXGE_HAL_TOC_VPATH_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
65 #define VXGE_HAL_TOC_KDFC_INITIAL_OFFSET(val) vBIT(val, 0, 61) argument
66 #define VXGE_HAL_TOC_KDFC_INITIAL_BIR(val) vBIT(val, 61, 3) argument
68 #define VXGE_HAL_TOC_USDC_INITIAL_OFFSET(val) vBIT(val, 0, 61) argument
[all …]
HDvxgehal-common-reg.h83 #define VXGE_HAL_MSG_RESET_IN_PROGRESS_MSG_COMPOSITE(val) vBIT(val, 0, 17) argument
95 #define VXGE_HAL_CMN_RSTHDLR_CFG0_SW_RESET_VPATH(val) vBIT(val, 0, 17) argument
97 #define VXGE_HAL_CMN_RSTHDLR_CFG1_CLR_VPATH_RESET(val) vBIT(val, 0, 17) argument
99 #define VXGE_HAL_CMN_RSTHDLR_CFG2_SW_RESET_FIFO0(val) vBIT(val, 0, 17) argument
101 #define VXGE_HAL_CMN_RSTHDLR_CFG3_SW_RESET_FIFO1(val) vBIT(val, 0, 17) argument
103 #define VXGE_HAL_CMN_RSTHDLR_CFG4_SW_RESET_FIFO2(val) vBIT(val, 0, 17) argument
107 #define VXGE_HAL_CMN_RSTHDLR_CFG8_INCR_VPATH_INST_NUM(val) vBIT(val, 0, 17) argument
109 #define VXGE_HAL_STATS_CFG0_STATS_ENABLE(val) vBIT(val, 0, 17) argument
113 #define VXGE_HAL_CLEAR_MSIX_MASK_VECT_CLEAR_MSIX_MASK_VECT(val) vBIT(val, 0, 17) argument
115 #define VXGE_HAL_SET_MSIX_MASK_VECT_SET_MSIX_MASK_VECT(val) vBIT(val, 0, 17) argument
[all …]
HDvxgehal-regdefs.h102 #define VXGE_HAL_TOC_GET_KDFC_INITIAL_OFFSET(val)\ argument
104 #define VXGE_HAL_TOC_GET_KDFC_INITIAL_BIR(val) bVAL3(val, 61) argument
105 #define VXGE_HAL_TOC_GET_USDC_INITIAL_OFFSET(val)\ argument
107 #define VXGE_HAL_TOC_GET_USDC_INITIAL_BIR(val) bVAL3(val, 61) argument
119 #define VXGE_HAL_KDFC_TRPL_FIFO_OFFSET_KDFC_VAPTH_NUM(val) vBIT(val, 42, 5) argument
120 #define VXGE_HAL_KDFC_TRPL_FIFO_OFFSET_KDFC_FIFO_NUM(val) vBIT(val, 47, 2) argument
121 #define VXGE_HAL_KDFC_TRPL_FIFO_OFFSET_KDFC_FIFO_OFFSET(val) vBIT(val, 49, 15) argument
152 #define VXGE_HAL_RTS_MGR_STEER_DATA0_DA_MAC_ADDR(val) vBIT(val, 0, 48) argument
155 #define VXGE_HAL_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_MASK(val) vBIT(val, 0, 48) argument
159 #define VXGE_HAL_RTS_MGR_STEER_DATA1_DA_MAC_ADDR_ADD_VPATH(val) vBIT(val, 55, 5) argument
[all …]
HDvxgehal-legacy-reg.h43 #define VXGE_HAL_TOC_SWAPPER_FB_INITIAL_VAL(val) vBIT(val, 0, 64) argument
45 #define VXGE_HAL_PIFM_RD_SWAP_EN_PIFM_RD_SWAP_EN(val) vBIT(val, 0, 64) argument
47 #define VXGE_HAL_PIFM_RD_FLIP_EN_PIFM_RD_FLIP_EN(val) vBIT(val, 0, 64) argument
49 #define VXGE_HAL_PIFM_WR_SWAP_EN_PIFM_WR_SWAP_EN(val) vBIT(val, 0, 64) argument
51 #define VXGE_HAL_PIFM_WR_FLIP_EN_PIFM_WR_FLIP_EN(val) vBIT(val, 0, 64) argument
53 #define VXGE_HAL_TOC_FIRST_POINTER_INITIAL_VAL(val) vBIT(val, 0, 64) argument
55 #define VXGE_HAL_HOST_ACCESS_EN_HOST_ACCESS_EN(val) vBIT(val, 0, 64) argument
/freebsd-11-stable/sys/contrib/ncsw/inc/
HDendian_ext.h92 #define SWAP_UINT16(val) \ argument
108 #define SWAP_UINT32(val) \ argument
127 #define SWAP_UINT64(val) \ argument
159 static __inline__ uint16_t SwapUint16(uint16_t val) in SwapUint16()
174 static __inline__ uint32_t SwapUint32(uint32_t val) in SwapUint32()
191 static __inline__ uint64_t SwapUint64(uint64_t val) in SwapUint64()
283 #define CPU_TO_LE16(val) SwapUint16(val) argument
295 #define CPU_TO_LE32(val) SwapUint32(val) argument
307 #define CPU_TO_LE64(val) SwapUint64(val) argument
320 #define LE16_TO_CPU(val) CPU_TO_LE16(val) argument
[all …]
/freebsd-11-stable/sys/contrib/octeon-sdk/
HDcvmx-asm.h368 #define CVMX_MT_LLM_READ_ADDR(set,val) asm volatile ("dmtc2 %[rt],0x0400+(8*(" CVMX_TMP_STR(set)… argument
369 #define CVMX_MT_LLM_WRITE_ADDR_INTERNAL(set,val) asm volatile ("dmtc2 %[rt],0x0401+(8*(" CVMX_TMP… argument
370 #define CVMX_MT_LLM_READ64_ADDR(set,val) asm volatile ("dmtc2 %[rt],0x0404+(8*(" CVMX_TMP_STR(set)… argument
371 #define CVMX_MT_LLM_WRITE64_ADDR_INTERNAL(set,val) asm volatile ("dmtc2 %[rt],0x0405+(8*(" CVMX_TMP… argument
372 #define CVMX_MT_LLM_DATA(set,val) asm volatile ("dmtc2 %[rt],0x0402+(8*(" CVMX_TMP_STR(set)… argument
373 #define CVMX_MF_LLM_DATA(set,val) asm volatile ("dmfc2 %[rt],0x0402+(8*(" CVMX_TMP_STR(set)… argument
401 #define CVMX_MT_CRC_POLYNOMIAL(val) asm volatile ("dmtc2 %[rt],0x4200" : : [rt] "d" (val)) argument
402 #define CVMX_MT_CRC_IV(val) asm volatile ("dmtc2 %[rt],0x0201" : : [rt] "d" (val)) argument
403 #define CVMX_MT_CRC_LEN(val) asm volatile ("dmtc2 %[rt],0x1202" : : [rt] "d" (val)) argument
404 #define CVMX_MT_CRC_BYTE(val) asm volatile ("dmtc2 %[rt],0x0204" : : [rt] "d" (val)) argument
[all …]
/freebsd-11-stable/cddl/contrib/opensolaris/lib/libnvpair/
HDnvpair_json.c205 hrtime_t val; in nvlist_print_json() local
212 double val; in nvlist_print_json() local
226 char **val; in nvlist_print_json() local
241 nvlist_t **val; in nvlist_print_json() local
256 boolean_t *val; in nvlist_print_json() local
271 uchar_t *val; in nvlist_print_json() local
285 uint8_t *val; in nvlist_print_json() local
299 int8_t *val; in nvlist_print_json() local
313 uint16_t *val; in nvlist_print_json() local
327 int16_t *val; in nvlist_print_json() local
[all …]
HDlibnvpair.c115 #define RENDER(pctl, type, nvl, name, val) \ argument
591 boolean_t val; in nvlist_print_with_indent() local
597 uchar_t val; in nvlist_print_with_indent() local
603 int8_t val; in nvlist_print_with_indent() local
609 uint8_t val; in nvlist_print_with_indent() local
615 int16_t val; in nvlist_print_with_indent() local
621 uint16_t val; in nvlist_print_with_indent() local
627 int32_t val; in nvlist_print_with_indent() local
633 uint32_t val; in nvlist_print_with_indent() local
639 int64_t val; in nvlist_print_with_indent() local
[all …]
/freebsd-11-stable/contrib/gdb/gdb/
HDvalue.h187 #define VALUE_TYPE(val) (val)->type argument
188 #define VALUE_ENCLOSING_TYPE(val) (val)->enclosing_type argument
189 #define VALUE_LAZY(val) (val)->lazy argument
204 #define VALUE_CONTENTS_RAW(val) \ argument
206 #define VALUE_CONTENTS(val) \ argument
212 #define VALUE_CONTENTS_ALL_RAW(val) ((char *) (val)->aligner.contents) argument
213 #define VALUE_CONTENTS_ALL(val) \ argument
219 #define VALUE_LVAL(val) (val)->lval argument
220 #define VALUE_ADDRESS(val) (val)->location.address argument
221 #define VALUE_INTERNALVAR(val) (val)->location.internalvar argument
[all …]
/freebsd-11-stable/contrib/ofed/libibmad/
HDdump.c47 void mad_dump_int(char *buf, int bufsz, void *val, int valsz) in mad_dump_int()
72 void mad_dump_uint(char *buf, int bufsz, void *val, int valsz) in mad_dump_uint()
97 void mad_dump_hex(char *buf, int bufsz, void *val, int valsz) in mad_dump_hex()
133 void mad_dump_rhex(char *buf, int bufsz, void *val, int valsz) in mad_dump_rhex()
169 void mad_dump_linkwidth(char *buf, int bufsz, void *val, int valsz) in mad_dump_linkwidth()
219 void mad_dump_linkwidthsup(char *buf, int bufsz, void *val, int valsz) in mad_dump_linkwidthsup()
246 void mad_dump_linkwidthen(char *buf, int bufsz, void *val, int valsz) in mad_dump_linkwidthen()
253 void mad_dump_linkspeed(char *buf, int bufsz, void *val, int valsz) in mad_dump_linkspeed()
311 void mad_dump_linkspeedsup(char *buf, int bufsz, void *val, int valsz) in mad_dump_linkspeedsup()
318 void mad_dump_linkspeeden(char *buf, int bufsz, void *val, int valsz) in mad_dump_linkspeeden()
[all …]
HDfields.c1131 uint64_t val) in _set_field64()
1142 uint64_t val; in _get_field64() local
1149 uint32_t val) in _set_field()
1187 uint32_t val = 0, v = 0, i; in _get_field() local
1210 void *val) in _set_array()
1221 void *val) in _get_array()
1237 uint32_t val) in mad_set_field()
1248 uint64_t val) in mad_set_field64()
1253 void mad_set_array(void *buf, int base_offs, enum MAD_FIELDS field, void *val) in mad_set_array()
1258 void mad_get_array(void *buf, int base_offs, enum MAD_FIELDS field, void *val) in mad_get_array()
[all …]
/freebsd-11-stable/contrib/llvm-project/lldb/source/Plugins/SymbolFile/DWARF/
HDDWARFDefines.cpp17 const char *DW_TAG_value_to_name(uint32_t val) { in DW_TAG_value_to_name()
31 const char *DW_AT_value_to_name(uint32_t val) { in DW_AT_value_to_name()
41 const char *DW_FORM_value_to_name(uint32_t val) { in DW_FORM_value_to_name()
51 const char *DW_OP_value_to_name(uint32_t val) { in DW_OP_value_to_name()
61 DRC_class DW_OP_value_to_class(uint32_t val) { in DW_OP_value_to_class()
376 const char *DW_ATE_value_to_name(uint32_t val) { in DW_ATE_value_to_name()
386 const char *DW_LANG_value_to_name(uint32_t val) { in DW_LANG_value_to_name()
396 const char *DW_LNS_value_to_name(uint32_t val) { in DW_LNS_value_to_name()
/freebsd-11-stable/sbin/ifconfig/
HDifbridge.c101 u_long val; in get_val() local
293 setbridge_add(const char *val, int d, int s, const struct afswtch *afp) in setbridge_add()
304 setbridge_delete(const char *val, int d, int s, const struct afswtch *afp) in setbridge_delete()
315 setbridge_discover(const char *val, int d, int s, const struct afswtch *afp) in setbridge_discover()
322 unsetbridge_discover(const char *val, int d, int s, const struct afswtch *afp) in unsetbridge_discover()
329 setbridge_learn(const char *val, int d, int s, const struct afswtch *afp) in setbridge_learn()
336 unsetbridge_learn(const char *val, int d, int s, const struct afswtch *afp) in unsetbridge_learn()
343 setbridge_sticky(const char *val, int d, int s, const struct afswtch *afp) in setbridge_sticky()
350 unsetbridge_sticky(const char *val, int d, int s, const struct afswtch *afp) in unsetbridge_sticky()
357 setbridge_span(const char *val, int d, int s, const struct afswtch *afp) in setbridge_span()
[all …]
/freebsd-11-stable/contrib/ntp/lib/isc/x86_32/include/isc/
HDatomic.h31 isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) { in isc_atomic_xadd()
48 isc_atomic_xaddq(isc_int64_t *p, isc_int64_t val) { in isc_atomic_xaddq()
68 isc_atomic_store(isc_int32_t *p, isc_int32_t val) { in isc_atomic_store()
90 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) { in isc_atomic_cmpxchg()
114 isc_atomic_xadd(isc_int32_t *p, isc_int32_t val) { in isc_atomic_xadd()
136 isc_atomic_store(isc_int32_t *p, isc_int32_t val) { in isc_atomic_store()
151 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val) { in isc_atomic_cmpxchg()
/freebsd-11-stable/sys/contrib/ncsw/inc/Peripherals/
HDdpaa_ext.h111 #define DPAA_FD_SET_DD(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_DD_… argument
113 #define DPAA_FD_SET_PID(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~(DPAA_FD_PI… argument
114 #define DPAA_FD_SET_BPID(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_BPI… argument
115 #define DPAA_FD_SET_ADDRH(fd,val) (((t_DpaaFD *)fd)->id = ((((t_DpaaFD *)fd)->id & ~DPAA_FD_ADD… argument
116 #define DPAA_FD_SET_ADDRL(fd,val) ((t_DpaaFD *)fd)->addrl = (val) … argument
117 #define DPAA_FD_SET_ADDR(fd,val) \ argument
123 #define DPAA_FD_SET_FORMAT(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPA… argument
124 #define DPAA_FD_SET_OFFSET(fd,val) (((t_DpaaFD *)fd)->length = ((((t_DpaaFD *)fd)->length & ~DPA… argument
125 #define DPAA_FD_SET_LENGTH(fd,val) (((t_DpaaFD *)fd)->length = (((t_DpaaFD *)fd)->length & ~DPAA… argument
126 #define DPAA_FD_SET_STATUS(fd,val) ((t_DpaaFD *)fd)->status = (val) … argument
[all …]
/freebsd-11-stable/sys/contrib/ena-com/ena_defs/
HDena_eth_io_defs.h424 static inline void set_ena_eth_io_tx_desc_length(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_length()
434 static inline void set_ena_eth_io_tx_desc_req_id_hi(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_req_id_hi()
444 static inline void set_ena_eth_io_tx_desc_meta_desc(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_meta_desc()
454 static inline void set_ena_eth_io_tx_desc_phase(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_phase()
464 static inline void set_ena_eth_io_tx_desc_first(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_first()
474 static inline void set_ena_eth_io_tx_desc_last(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_last()
484 static inline void set_ena_eth_io_tx_desc_comp_req(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_comp_req()
494 static inline void set_ena_eth_io_tx_desc_l3_proto_idx(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_l3_proto_idx()
504 static inline void set_ena_eth_io_tx_desc_DF(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_DF()
514 static inline void set_ena_eth_io_tx_desc_tso_en(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_tso_en()
[all …]
/freebsd-11-stable/sys/mips/nlm/hal/
HDfmn.c141 uint64_t val; in nlm_cms_setup_credits() local
185 void nlm_cms_set_onchip_queue (uint64_t base, int qid, uint64_t val) in nlm_cms_set_onchip_queue()
197 uint64_t val; in nlm_cms_per_queue_level_intr() local
212 uint64_t val; in nlm_cms_per_queue_timer_intr() local
227 uint64_t val; in nlm_cms_outputq_intr_check() local
235 uint64_t val; in nlm_cms_outputq_clr_intr() local
243 uint64_t val; in nlm_cms_illegal_dst_error_intr() local
252 uint64_t val; in nlm_cms_timeout_error_intr() local
261 uint64_t val; in nlm_cms_biu_error_resp_intr() local
270 uint64_t val; in nlm_cms_spill_uncorrectable_ecc_error_intr() local
[all …]
/freebsd-11-stable/sys/contrib/ena-com/
HDena_eth_io_defs.h424 static inline void set_ena_eth_io_tx_desc_length(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_length()
434 static inline void set_ena_eth_io_tx_desc_req_id_hi(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_req_id_hi()
444 static inline void set_ena_eth_io_tx_desc_meta_desc(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_meta_desc()
454 static inline void set_ena_eth_io_tx_desc_phase(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_phase()
464 static inline void set_ena_eth_io_tx_desc_first(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_first()
474 static inline void set_ena_eth_io_tx_desc_last(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_last()
484 static inline void set_ena_eth_io_tx_desc_comp_req(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_comp_req()
494 static inline void set_ena_eth_io_tx_desc_l3_proto_idx(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_l3_proto_idx()
504 static inline void set_ena_eth_io_tx_desc_DF(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_DF()
514 static inline void set_ena_eth_io_tx_desc_tso_en(struct ena_eth_io_tx_desc *p, uint32_t val) in set_ena_eth_io_tx_desc_tso_en()
[all …]
/freebsd-11-stable/sys/dev/sound/pcm/
HDpcm.h118 #define _PCM_WRITE_S16_LE(b8, val) do { \ argument
121 #define _PCM_WRITE_S32_LE(b8, val) do { \ argument
149 #define _PCM_WRITE_U16_LE(b8, val) do { \ argument
152 #define _PCM_WRITE_U32_LE(b8, val) do { \ argument
201 #define _PCM_WRITE_S16_BE(b8, val) do { \ argument
204 #define _PCM_WRITE_S32_BE(b8, val) do { \ argument
232 #define _PCM_WRITE_U16_BE(b8, val) do { \ argument
235 #define _PCM_WRITE_U32_BE(b8, val) do { \ argument
311 #define _PCM_WRITE_S8_NE(b8, val) do { \ argument
314 #define _PCM_WRITE_U8_NE(b8, val) do { \ argument
[all …]
/freebsd-11-stable/sys/dev/ath/ath_hal/ar5416/
HDar5416_spectral.c50 uint32_t val; in ar5416DisableRadar() local
86 uint32_t val; in ar5416ConfigureSpectralScan() local
153 uint32_t val; in ar5416GetSpectralParams() local
173 uint32_t val; in ar5416IsSpectralActive() local
182 uint32_t val; in ar5416IsSpectralEnabled() local
191 uint32_t val; in ar5416StartSpectralScan() local
208 uint32_t val; in ar5416StopSpectralScan() local
223 uint32_t val; in ar5416GetSpectralConfig() local

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