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Searched defs:Mask (Results 1 – 25 of 147) sorted by relevance

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/NextBSD/contrib/llvm/lib/Transforms/InstCombine/
HDInstCombineShifts.cpp241 APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits)); in GetShiftedValue() local
281 APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits)); in GetShiftedValue() local
437 Constant *Mask = ConstantInt::get(I.getContext(), Bits); in FoldShiftByConstant() local
473 Constant *Mask = ConstantInt::get(I.getContext(), Bits); in FoldShiftByConstant() local
588 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1)); in FoldShiftByConstant() local
624 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2)); in FoldShiftByConstant() local
672 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2)); in FoldShiftByConstant() local
HDInstCombineVectorOps.cpp282 SmallVectorImpl<Constant*> &Mask) { in CollectSingleShuffleElements()
367 SmallVectorImpl<Constant *> &Mask, in CollectShuffleElements()
514 SmallVector<Constant*, 16> Mask; in visitInsertElementInst() local
544 static bool CanEvaluateShuffled(Value *V, ArrayRef<int> Mask, in CanEvaluateShuffled()
697 InstCombiner::EvaluateInDifferentElementOrder(Value *V, ArrayRef<int> Mask) { in EvaluateInDifferentElementOrder()
795 static void RecognizeIdentityMask(const SmallVectorImpl<int> &Mask, in RecognizeIdentityMask()
816 SmallVector<int, 16> &Mask) { in isShuffleExtractingFromLHS()
833 SmallVector<int, 16> Mask = SVI.getShuffleMask(); in visitShuffleVectorInst() local
/NextBSD/contrib/llvm/lib/CodeGen/
HDInterleavedAccessPass.cpp104 static bool isDeInterleaveMaskOfFactor(ArrayRef<int> Mask, unsigned Factor, in isDeInterleaveMaskOfFactor()
128 static bool isDeInterleaveMask(ArrayRef<int> Mask, unsigned &Factor, in isDeInterleaveMask()
147 static bool isReInterleaveMask(ArrayRef<int> Mask, unsigned &Factor) { in isReInterleaveMask()
HDStackMapLivenessAnalysis.cpp149 uint32_t *Mask = createRegisterMask(MF); in addLiveOutSetToMI() local
158 uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs()); in createRegisterMask() local
HDLiveRangeCalc.cpp67 unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate() local
141 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, unsigned Mask) { in extendToUses()
/NextBSD/contrib/llvm/lib/Analysis/
HDCostModel.cpp92 static bool isReverseVectorMask(SmallVectorImpl<int> &Mask) { in isReverseVectorMask()
99 static bool isAlternateVectorMask(SmallVectorImpl<int> &Mask) { in isAlternateVectorMask()
147 SmallVector<int, 32> Mask(SI->getType()->getVectorNumElements(), -1); in matchPairwiseShuffleMask() local
367 SmallVector<int, 16> Mask = Shuffle->getShuffleMask(); in matchVectorSplittingReduction() local
493 SmallVector<int, 16> Mask = Shuffle->getShuffleMask(); in getInstructionCost() local
HDAliasAnalysis.cpp105 ModRefResult Mask = ModRef; in getModRefInfo() local
161 AliasAnalysis::ModRefResult Mask = ModRef; in getModRefInfo() local
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsSEISelLowering.h46 bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, in isShuffleMaskLegal()
/NextBSD/contrib/llvm/include/llvm/ADT/
HDBitVector.h240 BitWord Mask = EMask - IMask; in set() local
279 BitWord Mask = EMask - IMask; in reset() local
318 BitWord Mask = BitWord(1) << (Idx % BITWORD_SIZE); variable
544 void applyMask(const uint32_t *Mask, unsigned MaskWords) { in applyMask()
HDSmallBitVector.h307 uintptr_t Mask = EMask - IMask; in set() local
338 uintptr_t Mask = EMask - IMask; in reset() local
555 void applyMask(const uint32_t *Mask, unsigned MaskWords) { in applyMask()
/NextBSD/contrib/llvm/include/llvm/Support/
HDMathExtras.h53 T Mask = std::numeric_limits<T>::max() >> Shift; in count() local
/NextBSD/contrib/llvm/tools/llvm-readobj/
HDARMWinEHPrinter.h29 uint8_t Mask; member
/NextBSD/sys/contrib/dev/acpica/components/executer/
HDexfldio.c617 UINT64 Mask, in AcpiExWriteWithUpdateRule()
886 UINT64 Mask; in AcpiExInsertIntoField() local
/NextBSD/contrib/llvm/lib/Target/X86/
HDX86ISelLowering.cpp3261 const uint32_t *Mask = RegInfo->getCallPreservedMask(MF, CallConv); in LowerCall() local
3975 static bool isUndefInRange(ArrayRef<int> Mask, unsigned Pos, unsigned Size) { in isUndefInRange()
3997 static bool isSequentialOrUndefInRange(ArrayRef<int> Mask, in isSequentialOrUndefInRange()
4288 SDValue Mask = DAG.getConstant(MaskVal, dl, MVT::i8); in Insert128BitVector() local
4304 SDValue Mask = DAG.getConstant(0x0f, dl, MVT::i8); in Insert128BitVector() local
4368 SmallVector<int, 8> Mask; in getMOVL() local
4379 SmallVector<int, 8> Mask; in getUnpackl() local
4391 SmallVector<int, 8> Mask; in getUnpackh() local
4425 SmallVectorImpl<int> &Mask, bool &IsUnary) { in getTargetShuffleMask()
4797 int Mask[4]; in LowerBuildVectorv4x32() local
[all …]
HDX86MCInstLower.cpp992 ArrayRef<int> Mask) { in getShuffleComment()
1224 SmallVector<int, 16> Mask; in EmitInstruction() local
1244 SmallVector<int, 16> Mask; in EmitInstruction() local
/NextBSD/contrib/llvm/tools/clang/include/clang/AST/
HDDeclAccessPair.h33 enum { Mask = 0x3 }; enumerator
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDR600ExpandSpecialInstrs.cpp206 bool Mask = (Chan != TRI.getHWRegChan(DstReg)); in runOnMachineFunction() local
298 bool Mask = false; in runOnMachineFunction() local
/NextBSD/sys/contrib/dev/acpica/components/resources/
HDrsutils.c69 UINT16 Mask, in AcpiRsDecodeBitmask()
115 UINT16 Mask; in AcpiRsEncodeBitmask() local
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64ExpandPseudoInsts.cpp247 const uint64_t Mask = 0xFFFF; in updateImm() local
278 const uint64_t Mask = 0xFFFF; in trySequenceOfOnes() local
396 const unsigned Mask = 0xFFFF; in expandMOVImm() local
/NextBSD/contrib/llvm/tools/clang/include/clang/Basic/
HDSanitizers.h73 SanitizerMask Mask; member
/NextBSD/contrib/llvm/lib/Target/SystemZ/
HDSystemZRegisterInfo.cpp93 int64_t Mask = 0xffff; in eliminateFrameIndex() local
/NextBSD/contrib/llvm/lib/Target/ARM/
HDThumb2InstrInfo.cpp80 unsigned Mask = MBBI->getOperand(1).getImm(); in ReplaceTailWithBranchTo() local
597 unsigned Mask = (1 << NumBits) - 1; in rewriteT2FrameIndex() local
/NextBSD/sys/contrib/dev/acpica/components/disassembler/
HDdmresrc.c193 UINT16 Mask) in AcpiDmBitList()
/NextBSD/contrib/llvm/lib/Target/ARM/MCTargetDesc/
HDARMUnwindOpAsm.cpp75 uint32_t Mask = RegSave & 0xff0u; in EmitRegSave() local
/NextBSD/contrib/llvm/lib/Transforms/IPO/
HDLowerBitSets.cpp102 uint64_t Mask = 0; in build() local
184 Constant *Mask; member
337 uint8_t Mask; in allocateByteArrays() local

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