Lines Matching defs:Mask
3261 const uint32_t *Mask = RegInfo->getCallPreservedMask(MF, CallConv); in LowerCall() local
3975 static bool isUndefInRange(ArrayRef<int> Mask, unsigned Pos, unsigned Size) { in isUndefInRange()
3997 static bool isSequentialOrUndefInRange(ArrayRef<int> Mask, in isSequentialOrUndefInRange()
4288 SDValue Mask = DAG.getConstant(MaskVal, dl, MVT::i8); in Insert128BitVector() local
4304 SDValue Mask = DAG.getConstant(0x0f, dl, MVT::i8); in Insert128BitVector() local
4368 SmallVector<int, 8> Mask; in getMOVL() local
4379 SmallVector<int, 8> Mask; in getUnpackl() local
4391 SmallVector<int, 8> Mask; in getUnpackh() local
4425 SmallVectorImpl<int> &Mask, bool &IsUnary) { in getTargetShuffleMask()
4797 int Mask[4]; in LowerBuildVectorv4x32() local
4942 SmallVector<int, 8> Mask(NumElems, EltNo); in LowerAsSplatVectorLoad() local
5274 SmallVector<int, 8> Mask(NumElems, -1); in buildFromShuffleMostly() local
6294 static bool isNoopShuffleMask(ArrayRef<int> Mask) { in isNoopShuffleMask()
6309 static bool isSingleInputShuffleMask(ArrayRef<int> Mask) { in isSingleInputShuffleMask()
6321 static bool is128BitLaneCrossingShuffleMask(MVT VT, ArrayRef<int> Mask) { in is128BitLaneCrossingShuffleMask()
6342 is128BitLaneRepeatedShuffleMask(MVT VT, ArrayRef<int> Mask, in is128BitLaneRepeatedShuffleMask()
6376 static bool isShuffleEquivalent(SDValue V1, SDValue V2, ArrayRef<int> Mask, in isShuffleEquivalent()
6409 static SDValue getV4X86ShuffleImm8ForMask(ArrayRef<int> Mask, SDLoc DL, in getV4X86ShuffleImm8ForMask()
6431 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsBitBlend()
6463 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsBlend()
6593 ArrayRef<int> Mask, in lowerVectorShuffleAsBlendAndPermute()
6628 ArrayRef<int> Mask, in lowerVectorShuffleAsDecomposedShuffleBlend()
6677 ArrayRef<int> Mask, in lowerVectorShuffleAsByteRotate()
6796 static SmallBitVector computeZeroableShuffleElements(ArrayRef<int> Mask, in computeZeroableShuffleElements()
6837 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsBitMask()
6898 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsShift()
6966 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleWithSSE4A()
7101 ArrayRef<int> Mask, const X86Subtarget *Subtarget, SelectionDAG &DAG) { in lowerVectorShuffleAsSpecificZeroOrAnyExtend()
7203 SDLoc DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsZeroOrAnyExtend()
7337 SDLoc DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsElementInsertion()
7440 ArrayRef<int> Mask, in lowerVectorShuffleAsBroadcast()
7518 ArrayRef<int> Mask, in lowerVectorShuffleAsInsertPS()
7599 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsUnpack()
7719 ArrayRef<int> Mask = SVOp->getMask(); in lowerV2F64VectorShuffle() local
7801 ArrayRef<int> Mask = SVOp->getMask(); in lowerV2I64VectorShuffle() local
7904 static bool isSingleSHUFPSMask(ArrayRef<int> Mask) { in isSingleSHUFPSMask()
7924 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithSHUFPS()
8021 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4F32VectorShuffle() local
8105 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4I32VectorShuffle() local
8219 SDLoc DL, MVT VT, SDValue V, MutableArrayRef<int> Mask, in lowerV8I16GeneralSingleInputVectorShuffle()
8653 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsPSHUFB()
8726 MutableArrayRef<int> Mask(MaskStorage); in lowerV8I16VectorShuffle() local
8854 static int canLowerByDroppingEvenElements(ArrayRef<int> Mask) { in canLowerByDroppingEvenElements()
8916 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16I8VectorShuffle() local
8957 auto canWidenViaDuplication = [](ArrayRef<int> Mask) { in lowerV16I8VectorShuffle()
9235 static bool canWidenShuffleElements(ArrayRef<int> Mask, in canWidenShuffleElements()
9287 SDValue V2, ArrayRef<int> Mask, in splitAndLowerVectorShuffle()
9418 SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleAsSplitOrBlend()
9478 ArrayRef<int> Mask, in lowerVectorShuffleAsLanePermuteAndBlend()
9522 SDValue V2, ArrayRef<int> Mask, in lowerV2X128VectorShuffle()
9615 SDLoc DL, MVT VT, SDValue V1, SDValue V2, ArrayRef<int> Mask, in lowerVectorShuffleByMerging128BitLanes()
9690 static bool isShuffleMaskInputInPlace(int Input, ArrayRef<int> Mask) { in isShuffleMaskInputInPlace()
9701 ArrayRef<int> Mask, SDValue V1, in lowerVectorShuffleWithSHUFPD()
9742 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4F64VectorShuffle() local
9830 ArrayRef<int> Mask = SVOp->getMask(); in lowerV4I64VectorShuffle() local
9914 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8F32VectorShuffle() local
10013 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8I32VectorShuffle() local
10097 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16I16VectorShuffle() local
10197 ArrayRef<int> Mask = SVOp->getMask(); in lowerV32I8VectorShuffle() local
10285 ArrayRef<int> Mask = SVOp->getMask(); in lower256BitVectorShuffle() local
10345 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8F64VectorShuffle() local
10367 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16F32VectorShuffle() local
10396 ArrayRef<int> Mask = SVOp->getMask(); in lowerV8I64VectorShuffle() local
10418 ArrayRef<int> Mask = SVOp->getMask(); in lowerV16I32VectorShuffle() local
10447 ArrayRef<int> Mask = SVOp->getMask(); in lowerV32I16VectorShuffle() local
10463 ArrayRef<int> Mask = SVOp->getMask(); in lowerV64I8VectorShuffle() local
10481 ArrayRef<int> Mask = SVOp->getMask(); in lower512BitVectorShuffle() local
10530 ArrayRef<int> Mask = SVOp->getMask(); in lowerVectorShuffle() local
10710 SmallVector<int, 32> Mask; in lowerVSELECTtoVectorShuffle() local
10883 SDValue Mask = DAG.getNode(X86ISD::VINSERT, dl, MaskVT, in LowerEXTRACT_VECTOR_ELT() local
10942 int Mask[4] = { static_cast<int>(Idx), -1, -1, -1 }; in LowerEXTRACT_VECTOR_ELT() local
10961 int Mask[2] = { 1, -1 }; in LowerEXTRACT_VECTOR_ELT() local
12678 SDValue Mask = DAG.getLoad(LogicVT, dl, DAG.getEntryNode(), CPIdx, in LowerFABSorFNEG() local
13032 APInt Mask = ArithOp.getOpcode() == ISD::SRL in EmitTest() local
13766 static const int Mask[] = { 1, 0, 3, 2 }; in LowerVSETCC() local
15242 static SDValue getVectorMaskingNode(SDValue Op, SDValue Mask, in getVectorMaskingNode()
15284 static SDValue getScalarMaskingNode(SDValue Op, SDValue Mask, in getScalarMaskingNode()
15377 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
15398 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
15406 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
15428 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
15451 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
15469 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_WO_CHAIN() local
15496 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_WO_CHAIN() local
15540 SDValue Mask = Op.getOperand((IntrData->Type == CMP_MASK_CC) ? 4 : 3); in LowerINTRINSIC_WO_CHAIN() local
15598 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
15609 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_WO_CHAIN() local
15831 SDValue Src, SDValue Mask, SDValue Base, in getGatherNode()
15871 SDValue Src, SDValue Mask, SDValue Base, in getScatterNode()
15907 SDValue Mask, SDValue Base, SDValue Index, in getPrefetchNode()
16139 SDValue Mask = Op.getOperand(5); in LowerINTRINSIC_W_CHAIN() local
16148 SDValue Mask = Op.getOperand(3); in LowerINTRINSIC_W_CHAIN() local
16161 SDValue Mask = Op.getOperand(2); in LowerINTRINSIC_W_CHAIN() local
16212 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_W_CHAIN() local
16232 SDValue Mask = Op.getOperand(4); in LowerINTRINSIC_W_CHAIN() local
16983 const int Mask[] = {1, -1, 3, -1, 5, -1, 7, -1}; in LowerMUL_LOHI() local
17181 SDValue Mask = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, V); in LowerScalarImmediateShift() local
18237 auto GetMask = [&](SDValue V, APInt Mask) { in LowerVectorCTPOPBitmath()
19269 X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, in isVectorClearMaskLegal()
20953 static bool combineX86ShuffleChain(SDValue Op, SDValue Root, ArrayRef<int> Mask, in combineX86ShuffleChain()
21198 SmallVector<int, 16> Mask; in combineX86ShufflesRecursively() local
21272 SmallVector<int, 4> Mask; in getPSHUFShuffleMask() local
21313 combineRedundantDWordShuffle(SDValue N, MutableArrayRef<int> Mask, in combineRedundantDWordShuffle()
21446 static bool combineRedundantHalfShuffle(SDValue N, MutableArrayRef<int> Mask, in combineRedundantHalfShuffle()
21514 SmallVector<int, 4> Mask; in PerformTargetShuffleCombine() local
21627 ArrayRef<int> Mask = SVN->getMask(); in combineShuffleToAddSub() local
23127 SDValue Mask = N->getOperand(3); in PerformINTRINSIC_WO_CHAINCombine() local
23279 APInt Mask = cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue(); in PerformSHLCombine() local
23556 APInt Mask = APInt::getAllOnesValue(InBits); in WidenMaskArithmetic() local
23646 SmallVector<int, 8> Mask; in VectorZextCombine() local
23685 uint64_t Mask = MaskNode->getZExtValue(); in PerformAndCombine() local
23746 SDValue Mask = N1.getOperand(0); in PerformOrCombine() local
24022 SDValue Mask = Mld->getMask(); in PerformMLOADCombine() local
24107 SDValue Mask = Mst->getMask(); in PerformMSTORECombine() local
24443 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(LHS.getNode())->getMask(); in isHorizontalBinOp() local
24461 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(RHS.getNode())->getMask(); in isHorizontalBinOp() local
25002 if (auto *Mask = dyn_cast<ConstantSDNode>(N->getOperand(2))) in PerformBLENDICombine() local