1 /*        $NetBSD: dc503reg.h,v 1.1 2023/02/11 05:59:39 tsutsui Exp $ */
2 /*        $OpenBSD: dc503reg.h,v 1.1 2006/07/23 19:17:23 miod Exp $   */
3 /*        NetBSD: pmreg.h,v 1.7 2005/12/11 12:18:36 christos Exp      */
4 
5 /*
6  * Copyright (c) 1992, 1993
7  *        The Regents of the University of California.  All rights reserved.
8  *
9  * This code is derived from software contributed to Berkeley by
10  * Ralph Campbell.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  *        @(#)pmreg.h         8.1 (Berkeley) 6/10/93
37  */
38 
39 /*
40  * Layout of the programmable cursor chip (DC503) registers.
41  * All registers are 16 bit wide.
42  */
43 
44 #define   PCC_CMD             0x00      /* cursor command register */
45 #define   PCCCMD_TEST         0x8000
46 #define   PCCCMD_HSHI         0x4000
47 #define   PCCCMD_VBHI         0x2000
48 #define   PCCCMD_LODSA        0x1000
49 #define   PCCCMD_FORG2        0x0800
50 #define   PCCCMD_ENRG2        0x0400
51 #define   PCCCMD_FORG1        0x0200
52 #define   PCCCMD_ENRG1        0x0100
53 #define   PCCCMD_XHWID        0x0080
54 #define   PCCCMD_XHCL1        0x0040
55 #define   PCCCMD_XHCLP        0x0020
56 #define   PCCCMD_XHAIR        0x0010
57 #define   PCCCMD_FOPB         0x0008
58 #define   PCCCMD_ENPB         0x0004
59 #define   PCCCMD_FOPA         0x0002
60 #define   PCCCMD_ENPA         0x0001
61 
62 #define   PCC_XPOS  0x04      /* cursor X position */
63 #define   PCC_YPOS  0x08      /* cursor Y position */
64 #define   PCC_XMIN_1          0x0c      /* region 1 left edge */
65 #define   PCC_XMAX_1          0x10      /* region 1 right edge */
66 #define   PCC_YMIN_1          0x14      /* region 1 top edge */
67 #define   PCC_YMAX_1          0x18      /* region 1 bottom edge */
68 #define   PCC_XMIN_2          0x1c      /* region 2 left edge */
69 #define   PCC_XMAX_2          0x20      /* region 2 right edge */
70 #define   PCC_YMIN_2          0x24      /* region 2 top edge */
71 #define   PCC_YMAX_2          0x28      /* region 2 bottom edge */
72 #define   PCC_LOAD  0x2c      /* cursor pattern load */
73 
74 struct dc503reg {
75           volatile uint16_t   cmdr;
76           int16_t   pad1;
77           volatile uint16_t   xpos;
78           int16_t   pad2;
79           volatile uint16_t   ypos;
80           int16_t   pad3;
81           volatile uint16_t   xmin1;
82           int16_t   pad4;
83           volatile uint16_t   xmax1;
84           int16_t   pad5;
85           volatile uint16_t   ymin1;
86           int16_t   pad6;
87           volatile uint16_t   ymax1;
88           int16_t   pad7[9];
89           volatile uint16_t   xmin2;
90           int16_t   pad8;
91           volatile uint16_t   xmax2;
92           int16_t   pad9;
93           volatile uint16_t   ymin2;
94           int16_t   pad10;
95           volatile uint16_t   ymax2;
96           int16_t   pad11;
97           volatile uint16_t   load;
98 };
99 
100 #define   PCC_CURSOR_SIZE     16
101