1 /*-
2 * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: stable/9/sys/mips/cavium/octe/ethernet-mv88e61xx.c 213762 2010-10-13 09:17:44Z jmallett $
27 */
28
29 /*
30 * Interface to the Marvell 88E61XX SMI/MDIO.
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD: stable/9/sys/mips/cavium/octe/ethernet-mv88e61xx.c 213762 2010-10-13 09:17:44Z jmallett $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/endian.h>
40 #include <sys/kernel.h>
41 #include <sys/mbuf.h>
42 #include <sys/socket.h>
43
44 #include <dev/mii/mii.h>
45
46 #include <net/ethernet.h>
47 #include <net/if.h>
48
49 #include "wrapper-cvmx-includes.h"
50 #include "ethernet-headers.h"
51
52 #define MV88E61XX_SMI_REG_CMD 0x00 /* Indirect command register. */
53 #define MV88E61XX_SMI_CMD_BUSY 0x8000 /* Busy bit. */
54 #define MV88E61XX_SMI_CMD_22 0x1000 /* Clause 22 (default 45.) */
55 #define MV88E61XX_SMI_CMD_READ 0x0800 /* Read command. */
56 #define MV88E61XX_SMI_CMD_WRITE 0x0400 /* Write command. */
57 #define MV88E61XX_SMI_CMD_PHY(phy) (((phy) & 0x1f) << 5)
58 #define MV88E61XX_SMI_CMD_REG(reg) ((reg) & 0x1f)
59
60 #define MV88E61XX_SMI_REG_DAT 0x01 /* Indirect data register. */
61
62 static int cvm_oct_mv88e61xx_smi_read(struct ifnet *, int, int);
63 static void cvm_oct_mv88e61xx_smi_write(struct ifnet *, int, int, int);
64 static int cvm_oct_mv88e61xx_smi_wait(struct ifnet *);
65
66 int
cvm_oct_mv88e61xx_setup_device(struct ifnet * ifp)67 cvm_oct_mv88e61xx_setup_device(struct ifnet *ifp)
68 {
69 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
70
71 priv->mdio_read = cvm_oct_mv88e61xx_smi_read;
72 priv->mdio_write = cvm_oct_mv88e61xx_smi_write;
73 priv->phy_device = "mv88e61xxphy";
74
75 return (0);
76 }
77
78 static int
cvm_oct_mv88e61xx_smi_read(struct ifnet * ifp,int phy_id,int location)79 cvm_oct_mv88e61xx_smi_read(struct ifnet *ifp, int phy_id, int location)
80 {
81 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
82 int error;
83
84 error = cvm_oct_mv88e61xx_smi_wait(ifp);
85 if (error != 0)
86 return (0);
87
88 cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD,
89 MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
90 MV88E61XX_SMI_CMD_READ | MV88E61XX_SMI_CMD_PHY(phy_id) |
91 MV88E61XX_SMI_CMD_REG(location));
92
93 error = cvm_oct_mv88e61xx_smi_wait(ifp);
94 if (error != 0)
95 return (0);
96
97 return (cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT));
98 }
99
100 static void
cvm_oct_mv88e61xx_smi_write(struct ifnet * ifp,int phy_id,int location,int val)101 cvm_oct_mv88e61xx_smi_write(struct ifnet *ifp, int phy_id, int location, int val)
102 {
103 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
104
105 cvm_oct_mv88e61xx_smi_wait(ifp);
106 cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_DAT, val);
107 cvm_oct_mdio_write(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD,
108 MV88E61XX_SMI_CMD_BUSY | MV88E61XX_SMI_CMD_22 |
109 MV88E61XX_SMI_CMD_WRITE | MV88E61XX_SMI_CMD_PHY(phy_id) |
110 MV88E61XX_SMI_CMD_REG(location));
111 cvm_oct_mv88e61xx_smi_wait(ifp);
112 }
113
114 static int
cvm_oct_mv88e61xx_smi_wait(struct ifnet * ifp)115 cvm_oct_mv88e61xx_smi_wait(struct ifnet *ifp)
116 {
117 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
118 uint16_t cmd;
119 unsigned i;
120
121 for (i = 0; i < 10000; i++) {
122 cmd = cvm_oct_mdio_read(ifp, priv->phy_id, MV88E61XX_SMI_REG_CMD);
123 if ((cmd & MV88E61XX_SMI_CMD_BUSY) == 0)
124 return (0);
125 }
126 return (ETIMEDOUT);
127 }
128