| /trueos/sys/mips/nlm/dev/net/ |
| HD | mdio.c | 46 int intf_type, int phyaddr, int regidx) in nlm_int_gmac_mdio_read() argument
53 (regidx << INT_MDIO_CTRL_DEVTYPE_POS) | in nlm_int_gmac_mdio_read()
96 int intf_type, int phyaddr, int regidx, uint16_t val) in nlm_int_gmac_mdio_write() argument
103 (regidx << INT_MDIO_CTRL_DEVTYPE_POS) | in nlm_int_gmac_mdio_write()
179 int intf_type, int phyaddr, int regidx) in nlm_gmac_mdio_read() argument
198 (regidx << EXT_G_MDIO_REGADDR_POS); in nlm_gmac_mdio_read()
240 int intf_type, int phyaddr, int regidx, uint16_t val) in nlm_gmac_mdio_write() argument
264 (regidx << EXT_G_MDIO_REGADDR_POS); in nlm_gmac_mdio_write()
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| HD | xlpge.c | 1294 nlm_xlpge_mii_read(struct device *dev, int phyaddr, int regidx) in nlm_xlpge_mii_read() argument
1302 BLOCK_7, LANE_CFG, phyaddr, regidx); in nlm_xlpge_mii_read()
1310 nlm_xlpge_mii_write(struct device *dev, int phyaddr, int regidx, int val) in nlm_xlpge_mii_write() argument
1317 LANE_CFG, phyaddr, regidx, val); in nlm_xlpge_mii_write()
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| /trueos/sys/sparc64/isa/ |
| HD | isa.c | 148 uint32_t *drqs, *regidx; in isa_setup_children() local
212 nregidx = OF_getprop_alloc(node, "reg", sizeof(*regidx), in isa_setup_children()
213 (void **)®idx); in isa_setup_children()
220 start = ISA_REG_PHYS(®s[regidx[i]]); in isa_setup_children()
221 end = start + regs[regidx[i]].size - 1; in isa_setup_children()
232 if (regidx != NULL) in isa_setup_children()
233 free(regidx, M_OFWPROP); in isa_setup_children()
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| /trueos/sys/boot/powerpc/ps3/ |
| HD | ps3stor.c | 118 int ps3stor_read_sectors(struct ps3_stordev *sd, int regidx, in ps3stor_read_sectors() argument
125 struct ps3_storreg *reg = &sd->sd_regs[regidx]; in ps3stor_read_sectors()
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| HD | ps3stor.h | 54 int ps3stor_read_sectors(struct ps3_stordev *sd, int regidx,
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| /trueos/sys/mips/rmi/dev/nlge/ |
| HD | if_nlge.c | 187 int regidx);
189 int regidx, int regval);
832 nlge_mii_write(struct device *dev, int phyaddr, int regidx, int regval) in nlge_mii_write() argument
838 nlge_mii_write_internal(sc->mii_base, phyaddr, regidx, regval); in nlge_mii_write()
844 nlge_mii_read(struct device *dev, int phyaddr, int regidx) in nlge_mii_read() argument
851 nlge_mii_read_internal(sc->mii_base, phyaddr, regidx); in nlge_mii_read()
1937 nlge_mii_read_internal(xlr_reg_t *mii_base, int phyaddr, int regidx) in nlge_mii_read_internal() argument
1943 (phyaddr << 8) | (regidx << 0)); in nlge_mii_read_internal()
1979 nlge_mii_write_internal(xlr_reg_t *mii_base, int phyaddr, int regidx, in nlge_mii_write_internal() argument
1985 (phyaddr << 8) | (regidx << 0)); in nlge_mii_write_internal()
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| /trueos/sys/mips/rmi/dev/xlr/ |
| HD | rge.c | 747 rge_mii_read_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx) in rge_mii_read_internal() argument
753 (phyaddr << 8) | (regidx << 0)); in rge_mii_read_internal()
775 rge_mii_read(device_t dev, int phyaddr, int regidx) in rge_mii_read() argument
779 return rge_mii_read_internal(sc->priv.mii_mmio, phyaddr, regidx); in rge_mii_read()
839 rge_mii_write_internal(xlr_reg_t * mii_mmio, int phyaddr, int regidx, int regval) in rge_mii_write_internal() argument
844 (phyaddr << 8) | (regidx << 0)); in rge_mii_write_internal()
859 rge_mii_write(device_t dev, int phyaddr, int regidx, int regval) in rge_mii_write() argument
863 rge_mii_write_internal(sc->priv.mii_mmio, phyaddr, regidx, regval); in rge_mii_write()
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