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Searched refs:addOperand (Results 1 – 25 of 102) sorted by relevance

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/trueos/contrib/llvm/lib/Target/ARM/AsmParser/
HDARMAsmParser.cpp1531 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
1533 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
1535 Inst.addOperand(MCOperand::CreateExpr(Expr)); in addExpr()
1540 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addCondCodeOperands()
1542 Inst.addOperand(MCOperand::CreateReg(RegNum)); in addCondCodeOperands()
1547 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocNumOperands()
1552 Inst.addOperand(MCOperand::CreateImm(getCoproc())); in addCoprocRegOperands()
1557 Inst.addOperand(MCOperand::CreateImm(CoprocOption.Val)); in addCoprocOptionOperands()
1562 Inst.addOperand(MCOperand::CreateImm(ITMask.Mask)); in addITMaskOperands()
1567 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addITCondCodeOperands()
[all …]
/trueos/contrib/llvm/lib/Target/PowerPC/AsmParser/
HDPPCAsmParser.cpp398 Inst.addOperand(MCOperand::CreateReg(RRegs[getReg()])); in addRegGPRCOperands()
403 Inst.addOperand(MCOperand::CreateReg(RRegsNoR0[getReg()])); in addRegGPRCNoR0Operands()
408 Inst.addOperand(MCOperand::CreateReg(XRegs[getReg()])); in addRegG8RCOperands()
413 Inst.addOperand(MCOperand::CreateReg(XRegsNoX0[getReg()])); in addRegG8RCNoX0Operands()
432 Inst.addOperand(MCOperand::CreateReg(FRegs[getReg()])); in addRegF4RCOperands()
437 Inst.addOperand(MCOperand::CreateReg(FRegs[getReg()])); in addRegF8RCOperands()
442 Inst.addOperand(MCOperand::CreateReg(VRegs[getReg()])); in addRegVRRCOperands()
447 Inst.addOperand(MCOperand::CreateReg(CRBITRegs[getCRBit()])); in addRegCRBITRCOperands()
452 Inst.addOperand(MCOperand::CreateReg(CRRegs[getCCReg()])); in addRegCRRCOperands()
457 Inst.addOperand(MCOperand::CreateReg(CRRegs[getCRBitMask()])); in addCRBitMaskOperands()
[all …]
/trueos/contrib/llvm/lib/Target/Mips/Disassembler/
HDMipsDisassembler.cpp445 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeGPR64RegisterClass()
456 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeGPR32RegisterClass()
485 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFGR64RegisterClass()
497 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFGR32RegisterClass()
509 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFGRH32RegisterClass()
520 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeCCRRegisterClass()
531 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFCCRegisterClass()
547 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeMem()
550 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeMem()
551 Inst.addOperand(MCOperand::CreateReg(Base)); in DecodeMem()
[all …]
/trueos/contrib/llvm/lib/Target/SystemZ/Disassembler/
HDSystemZDisassembler.cpp56 Inst.addOperand(MCOperand::CreateReg(RegNo)); in decodeRegisterClass()
111 Inst.addOperand(MCOperand::CreateImm(Imm)); in decodeUImmOperand()
118 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
172 Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address)); in decodePCDBLOperand()
193 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr12Operand()
194 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDAddr12Operand()
203 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base])); in decodeBDAddr20Operand()
204 Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp))); in decodeBDAddr20Operand()
214 Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base])); in decodeBDXAddr12Operand()
215 Inst.addOperand(MCOperand::CreateImm(Disp)); in decodeBDXAddr12Operand()
[all …]
/trueos/contrib/llvm/include/llvm/CodeGen/
HDMachineInstrBuilder.h68 MI->addOperand(*MF, MachineOperand::CreateReg(RegNo,
84 MI->addOperand(*MF, MachineOperand::CreateImm(Val)); in addImm()
89 MI->addOperand(*MF, MachineOperand::CreateCImm(Val)); in addCImm()
94 MI->addOperand(*MF, MachineOperand::CreateFPImm(Val)); in addFPImm()
100 MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
105 MI->addOperand(*MF, MachineOperand::CreateFI(Idx)); in addFrameIndex()
112 MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
118 MI->addOperand(*MF, MachineOperand::CreateTargetIndex(Idx, Offset,
125 MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
132 MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
[all …]
/trueos/contrib/llvm/lib/Target/ARM/
HDARMExpandPseudoInsts.cpp81 UseMI.addOperand(MO); in TransferImpOps()
83 DefMI.addOperand(MO); in TransferImpOps()
402 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVLD()
405 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVLD()
406 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVLD()
409 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVLD()
419 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVLD()
420 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVLD()
427 MIB.addOperand(MO); in ExpandVLD()
454 MIB.addOperand(MI.getOperand(OpIdx++)); in ExpandVST()
[all …]
HDARMInstrInfo.cpp40 NopInst.addOperand(MCOperand::CreateImm(0)); in getNoopForMachoTarget()
41 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
42 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
45 NopInst.addOperand(MCOperand::CreateReg(ARM::R0)); in getNoopForMachoTarget()
46 NopInst.addOperand(MCOperand::CreateReg(ARM::R0)); in getNoopForMachoTarget()
47 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
48 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
49 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
HDThumb1InstrInfo.cpp31 NopInst.addOperand(MCOperand::CreateReg(ARM::R8)); in getNoopForMachoTarget()
32 NopInst.addOperand(MCOperand::CreateReg(ARM::R8)); in getNoopForMachoTarget()
33 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in getNoopForMachoTarget()
34 NopInst.addOperand(MCOperand::CreateReg(0)); in getNoopForMachoTarget()
HDARMAsmPrinter.cpp1239 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1257 TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); in EmitInstruction()
1260 TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); in EmitInstruction()
1264 TmpInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1265 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1267 TmpInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1276 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1277 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg())); in EmitInstruction()
1295 TmpInst.addOperand(MCOperand::CreateExpr(PCRelExpr)); in EmitInstruction()
1298 TmpInst.addOperand(MCOperand::CreateExpr(RefExpr)); in EmitInstruction()
[all …]
/trueos/contrib/llvm/include/llvm/MC/
HDMCInstBuilder.h33 Inst.addOperand(MCOperand::CreateReg(Reg)); in addReg()
39 Inst.addOperand(MCOperand::CreateImm(Val)); in addImm()
45 Inst.addOperand(MCOperand::CreateFPImm(Val)); in addFPImm()
51 Inst.addOperand(MCOperand::CreateExpr(Val)); in addExpr()
57 Inst.addOperand(MCOperand::CreateInst(Val)); in addInst()
/trueos/contrib/llvm/lib/Target/AArch64/Disassembler/
HDAArch64Disassembler.cpp310 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR64RegisterClass()
321 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR64xspRegisterClass()
332 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR32RegisterClass()
343 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR32wspRegisterClass()
354 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR8RegisterClass()
365 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR16RegisterClass()
377 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR32RegisterClass()
388 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR64RegisterClass()
408 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeFPR128RegisterClass()
429 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPR64noxzrRegisterClass()
[all …]
/trueos/contrib/llvm/lib/Target/ARM/Disassembler/
HDARMDisassembler.cpp882 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeGPRRegisterClass()
906 Inst.addOperand(MCOperand::CreateReg(ARM::APSR_NZCV)); in DecodeGPRwithAPSRRegisterClass()
937 Inst.addOperand(MCOperand::CreateReg(RegisterPair)); in DecodeGPRPairRegisterClass()
967 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodetcGPRRegisterClass()
997 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeSPRRegisterClass()
1018 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeDPRRegisterClass()
1052 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeQPRRegisterClass()
1071 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeDPairRegisterClass()
1094 Inst.addOperand(MCOperand::CreateReg(Register)); in DecodeDPairSpacedRegisterClass()
1104 Inst.addOperand(MCOperand::CreateImm(Val)); in DecodePredicateOperand()
[all …]
/trueos/contrib/llvm/lib/Target/Mips/AsmParser/
HDMipsAsmParser.cpp342 Inst.addOperand(MCOperand::CreateReg(getReg())); in addRegOperands()
347 Inst.addOperand(MCOperand::CreateReg(getPtrReg())); in addPtrRegOperands()
353 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
355 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
357 Inst.addOperand(MCOperand::CreateExpr(Expr)); in addExpr()
369 Inst.addOperand(MCOperand::CreateReg(getMemBase())); in addMemOperands()
473 Inst.addOperand(MCOperand::CreateReg(Reg.RegNum)); in addRegAsmOperands()
572 NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO)); in processInstruction()
573 NopInst.addOperand(MCOperand::CreateReg(Mips::ZERO)); in processInstruction()
574 NopInst.addOperand(MCOperand::CreateImm(0)); in processInstruction()
[all …]
/trueos/contrib/llvm/lib/Target/X86/
HDX86MCInstLower.cpp233 OutMI.addOperand(OutMI.getOperand(0)); in LowerUnaryToTwoAddr()
234 OutMI.addOperand(OutMI.getOperand(0)); in LowerUnaryToTwoAddr()
256 Inst.addOperand(Saved); in SimplifyShortImmForm()
335 Inst.addOperand(Saved); in SimplifyShortMoveForm()
377 OutMI.addOperand(MCOp); in Lower()
460 OutMI.addOperand(Saved); in Lower()
486 OutMI.addOperand(Saved); in Lower()
635 LEA.addOperand(MCOperand::CreateReg(X86::RDI)); // dest in LowerTlsAddr()
636 LEA.addOperand(MCOperand::CreateReg(X86::RIP)); // base in LowerTlsAddr()
637 LEA.addOperand(MCOperand::CreateImm(1)); // scale in LowerTlsAddr()
[all …]
/trueos/contrib/llvm/lib/Target/Hexagon/
HDHexagonSplitConst32AndConst64.cpp87 TII->get(Hexagon::LO), DestReg).addOperand(Symbol); in runOnMachineFunction()
89 TII->get(Hexagon::HI), DestReg).addOperand(Symbol); in runOnMachineFunction()
100 TII->get(Hexagon::LO_jt), DestReg).addOperand(Symbol); in runOnMachineFunction()
102 TII->get(Hexagon::HI_jt), DestReg).addOperand(Symbol); in runOnMachineFunction()
113 TII->get(Hexagon::LO_label), DestReg).addOperand(Symbol); in runOnMachineFunction()
115 TII->get(Hexagon::HI_label), DestReg).addOperand(Symbol); in runOnMachineFunction()
/trueos/contrib/llvm/lib/Target/X86/Disassembler/
HDX86Disassembler.cpp167 mcInst.addOperand(MCOperand::CreateReg(llvmRegnum)); in translateRegister()
288 mcInst.addOperand(MCOperand::CreateReg(X86::XMM0 + (immediate >> 4))); in translateImmediate()
291 mcInst.addOperand(MCOperand::CreateReg(X86::YMM0 + (immediate >> 4))); in translateImmediate()
294 mcInst.addOperand(MCOperand::CreateReg(X86::ZMM0 + (immediate >> 4))); in translateImmediate()
317 mcInst.addOperand(MCOperand::CreateImm(immediate)); in translateImmediate()
348 mcInst.addOperand(MCOperand::CreateReg(X86::x)); break; in translateRMRegister()
529 mcInst.addOperand(baseReg); in translateRMMemory()
530 mcInst.addOperand(scaleAmount); in translateRMMemory()
531 mcInst.addOperand(indexReg); in translateRMMemory()
535 mcInst.addOperand(displacement); in translateRMMemory()
[all …]
/trueos/contrib/llvm/patches/
HDpatch-r262261-llvm-r199775-sparc.diff54 - ORInst.addOperand(RD);
55 - ORInst.addOperand(RS1);
56 - ORInst.addOperand(Imm);
60 + Inst.addOperand(RD);
61 + Inst.addOperand(RS1);
62 + Inst.addOperand(Src2);
76 - ADDInst.addOperand(RD);
77 - ADDInst.addOperand(RS1);
78 - ADDInst.addOperand(RS2);
/trueos/contrib/llvm/lib/Target/SystemZ/
HDSystemZLongBranch.cpp353 .addOperand(MI->getOperand(0)) in splitBranchOnCount()
354 .addOperand(MI->getOperand(1)) in splitBranchOnCount()
359 .addOperand(MI->getOperand(2)); in splitBranchOnCount()
372 .addOperand(MI->getOperand(0)) in splitCompareBranch()
373 .addOperand(MI->getOperand(1)); in splitCompareBranch()
376 .addOperand(MI->getOperand(2)) in splitCompareBranch()
377 .addOperand(MI->getOperand(3)); in splitCompareBranch()
HDSystemZElimCompare.cpp205 .addOperand(MI->getOperand(0)) in convertToBRCT()
206 .addOperand(MI->getOperand(1)) in convertToBRCT()
207 .addOperand(Target) in convertToBRCT()
408 .addOperand(Compare->getOperand(0)) in fuseCompareAndBranch()
409 .addOperand(Compare->getOperand(1)) in fuseCompareAndBranch()
410 .addOperand(CCMask) in fuseCompareAndBranch()
411 .addOperand(Target) in fuseCompareAndBranch()
/trueos/contrib/llvm/lib/Target/AArch64/AsmParser/
HDAArch64AsmParser.cpp913 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
915 Inst.addOperand(MCOperand::CreateExpr(Expr)); in addExpr()
923 Inst.addOperand(MCOperand::CreateImm(EncodedVal)); in addBFILSBOperands()
929 Inst.addOperand(MCOperand::CreateImm(CE->getValue() - 1)); in addBFIWidthOperands()
938 Inst.addOperand(MCOperand::CreateImm(LSB + CE->getValue() - 1)); in addBFXWidthOperands()
943 Inst.addOperand(MCOperand::CreateImm(getCondCode())); in addCondCodeOperands()
950 Inst.addOperand(MCOperand::CreateImm(64 - CE->getValue())); in addCVTFixedPosOperands()
960 Inst.addOperand(MCOperand::CreateImm(ImmVal)); in addFMOVImmOperands()
965 Inst.addOperand(MCOperand::CreateImm(0)); in addFPZeroOperands()
971 Inst.addOperand(MCOperand::CreateImm(Encoded)); in addInvCondCodeOperands()
[all …]
/trueos/contrib/llvm/lib/Target/R600/
HDR600ISelLowering.cpp149 NewMI.addOperand(MI->getOperand(i)); in EmitInstrWithCustomInserter()
213 .addOperand(MI->getOperand(0)) in EmitInstrWithCustomInserter()
214 .addOperand(MI->getOperand(1)) in EmitInstrWithCustomInserter()
258 .addOperand(MI->getOperand(3)) in EmitInstrWithCustomInserter()
270 .addOperand(RID) in EmitInstrWithCustomInserter()
271 .addOperand(SID) in EmitInstrWithCustomInserter()
277 .addOperand(MI->getOperand(2)) in EmitInstrWithCustomInserter()
289 .addOperand(RID) in EmitInstrWithCustomInserter()
290 .addOperand(SID) in EmitInstrWithCustomInserter()
296 .addOperand(MI->getOperand(0)) in EmitInstrWithCustomInserter()
[all …]
/trueos/contrib/llvm/lib/Target/Sparc/Disassembler/
HDSparcDisassembler.cpp123 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeIntRegsRegisterClass()
134 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeI64RegsRegisterClass()
146 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeFPRegsRegisterClass()
158 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeDFPRegsRegisterClass()
173 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeQFPRegsRegisterClass()
/trueos/contrib/llvm/lib/Target/Sparc/
HDSparcAsmPrinter.cpp112 CallInst.addOperand(Callee); in EmitCall()
121 SETHIInst.addOperand(RD); in EmitSETHI()
122 SETHIInst.addOperand(Imm); in EmitSETHI()
131 Inst.addOperand(RD); in EmitBinary()
132 Inst.addOperand(RS1); in EmitBinary()
133 Inst.addOperand(Src2); in EmitBinary()
/trueos/contrib/llvm/lib/Target/SystemZ/AsmParser/
HDSystemZAsmParser.cpp114 Inst.addOperand(MCOperand::CreateImm(0)); in addExpr()
116 Inst.addOperand(MCOperand::CreateImm(CE->getValue())); in addExpr()
118 Inst.addOperand(MCOperand::CreateExpr(Expr)); in addExpr()
232 Inst.addOperand(MCOperand::CreateReg(getReg())); in addRegOperands()
237 Inst.addOperand(MCOperand::CreateImm(AccessReg)); in addAccessRegOperands()
246 Inst.addOperand(MCOperand::CreateReg(Mem.Base)); in addBDAddrOperands()
252 Inst.addOperand(MCOperand::CreateReg(Mem.Base)); in addBDXAddrOperands()
254 Inst.addOperand(MCOperand::CreateReg(Mem.Index)); in addBDXAddrOperands()
259 Inst.addOperand(MCOperand::CreateReg(Mem.Base)); in addBDLAddrOperands()
/trueos/contrib/llvm/lib/Target/XCore/Disassembler/
HDXCoreDisassembler.cpp218 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeGRRegsRegisterClass()
230 Inst.addOperand(MCOperand::CreateReg(Reg)); in DecodeRRegsRegisterClass()
241 Inst.addOperand(MCOperand::CreateImm(Values[Val])); in DecodeBitpOperand()
247 Inst.addOperand(MCOperand::CreateImm(-(int64_t)Val)); in DecodeNegImmOperand()
376 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode2RImmInstruction()
417 Inst.addOperand(MCOperand::CreateImm(Op2)); in DecodeRUSInstruction()
566 Inst.addOperand(MCOperand::CreateImm(Op1)); in Decode3RImmInstruction()
581 Inst.addOperand(MCOperand::CreateImm(Op3)); in Decode2RUSInstruction()
637 Inst.addOperand(MCOperand::CreateImm(Op3)); in DecodeL2RUSInstruction()

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