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Searched refs:VEX_4V (Results 1 – 9 of 9) sorted by relevance

/trueos/contrib/llvm/lib/Target/X86/
HDX86InstrXOP.td91 VEX_4V, VEX_W;
137 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, VEX_4V, VEX_I8IMM;
144 VR128:$src3))]>, VEX_4V, VEX_I8IMM;
167 VEX_4V;
174 imm:$src3))]>, VEX_4V;
193 VEX_4V, VEX_I8IMM;
201 VEX_4V, VEX_I8IMM, VEX_W, MemOp4;
209 VEX_4V, VEX_I8IMM;
221 VEX_4V, VEX_I8IMM, VEX_L;
229 VEX_4V, VEX_I8IMM, VEX_W, MemOp4, VEX_L;
[all …]
HDX86InstrSSE.td515 VEX_4V, VEX_LIG;
1158 itin>, VEX_4V;
1348 VEX_4V, Sched<[WriteShuffle]>;
1355 VEX_4V, Sched<[WriteShuffle]>;
1506 XS, VEX_4V, VEX_LIG;
1508 XS, VEX_4V, VEX_W, VEX_LIG;
1510 XD, VEX_4V, VEX_LIG;
1512 XD, VEX_4V, VEX_W, VEX_LIG;
1638 SSE_CVT_Scalar, 0>, XS, VEX_4V;
1641 SSE_CVT_Scalar, 0>, XS, VEX_4V,
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HDX86CodeEmitter.cpp812 bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; in emitVEXOpcodePrefix()
859 unsigned char VEX_4V = 0xf; in emitVEXOpcodePrefix() local
950 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in emitVEXOpcodePrefix()
954 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in emitVEXOpcodePrefix()
969 VEX_4V = getVEXRegisterEncoding(MI, CurOp++); in emitVEXOpcodePrefix()
991 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in emitVEXOpcodePrefix()
1003 VEX_4V = getVEXRegisterEncoding(MI, CurOp+X86::AddrNumOperands); in emitVEXOpcodePrefix()
1013 VEX_4V = getVEXRegisterEncoding(MI, CurOp++); in emitVEXOpcodePrefix()
1034 VEX_4V = getVEXRegisterEncoding(MI, CurOp++); in emitVEXOpcodePrefix()
1043 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in emitVEXOpcodePrefix()
[all …]
HDX86InstrFormats.td145 class VEX_4V : VEX { bit hasVEX_4VPrefix = 1; }
151 class EVEX_4V : VEX_4V { bit hasEVEXPrefix = 1; }
693 OpSize, VEX_4V, Requires<[HasAVX, HasPCLMUL]>;
699 OpSize, VEX_4V, FMASC, Requires<[HasFMA]>;
705 OpSize, VEX_4V, VEX_I8IMM, FMASC, Requires<[HasFMA4]>;
723 OpSize, VEX_4V, VEX_I8IMM, Requires<[HasXOP]>;
HDX86InstrArithmetic.td1308 defm ANDN32 : bmi_andn<"andn{l}", GR32, i32mem, loadi32>, T8, VEX_4V;
1309 defm ANDN64 : bmi_andn<"andn{q}", GR64, i64mem, loadi64>, T8, VEX_4V, VEX_W;
1331 [], IIC_MUL8>, T8XD, VEX_4V, Sched<[WriteIMul, WriteIMulH]>;
1336 [], IIC_MUL8>, T8XD, VEX_4V, Sched<[WriteIMulLd, WriteIMulH]>;
HDX86InstrInfo.td1824 [(set RC:$dst, (OpNode RC:$src)), (implicit EFLAGS)]>, T8, VEX_4V;
1828 T8, VEX_4V;
1903 VEX_4V;
1906 [(set RC:$dst, (Int RC:$src1, (ld_frag addr:$src2)))]>, VEX_4V;
1954 []>, XOP, XOP9, VEX_4V;
1958 []>, XOP, XOP9, VEX_4V;
HDX86InstrAVX512.td922 VEX_4V, VEX_L, TB;
977 VEX_4V, VEX_L, OpSize, TB;
/trueos/contrib/llvm/lib/Target/X86/MCTargetDesc/
HDX86MCCodeEmitter.cpp535 bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; in EmitVEXOpcodePrefix()
583 unsigned char VEX_4V = 0xf; in EmitVEXOpcodePrefix() local
720 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
755 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
777 VEX_4V = getVEXRegisterEncoding(MI, CurOp+X86::AddrNumOperands); in EmitVEXOpcodePrefix()
787 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
823 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
838 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
855 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
873 VEX_4V = getVEXRegisterEncoding(MI, CurOp); in EmitVEXOpcodePrefix()
[all …]
HDX86BaseInfo.h447 VEX_4V = 1U << 2, enumerator
614 bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; in getMemoryOperandNo()
639 bool HasVEX_4V = (TSFlags >> X86II::VEXShift) & X86II::VEX_4V; in getMemoryOperandNo()