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/openbsd/src/gnu/usr.bin/perl/
Dzaphod32_hash.h6 #define ZAPHOD32_WARN6(pat,v0,v1,v2,v3,v4,v5) printf(pat, v0, v1, v2, v3, v4, v5) argument
7 #define ZAPHOD32_WARN5(pat,v0,v1,v2,v3,v4) printf(pat, v0, v1, v2, v3, v4) argument
8 #define ZAPHOD32_WARN4(pat,v0,v1,v2,v3) printf(pat, v0, v1, v2, v3) argument
9 #define ZAPHOD32_WARN3(pat,v0,v1,v2) printf(pat, v0, v1, v2) argument
10 #define ZAPHOD32_WARN2(pat,v0,v1) printf(pat, v0, v1) argument
11 #define NOTE3(pat,v0,v1,v2) printf(pat, v0, v1, v2) argument
13 #define ZAPHOD32_WARN6(pat,v0,v1,v2,v3,v4,v5) argument
14 #define ZAPHOD32_WARN5(pat,v0,v1,v2,v3,v4) argument
15 #define ZAPHOD32_WARN4(pat,v0,v1,v2,v3) argument
16 #define ZAPHOD32_WARN3(pat,v0,v1,v2) argument
[all …]
Dperl_siphash.h19 v0 += v1; v1=ROTL64(v1,13); v1 ^= v0; v0=ROTL64(v0,32); \
21 v0 += v3; v3=ROTL64(v3,21); v3 ^= v0; \
25 #define SIPHASH_SEED_STATE(key,v0,v1,v2,v3) \ argument
27 v0 = v2 = U8TO64_LE(key + 0); \
30 v0 ^= UINT64_C(0x736f6d6570736575); \
52 U64 v0 = U8TO64_LE(state); \
64 v0 ^= m; \
83 v0 ^= b; \
89 b = v0 ^ v1 ^ v2 ^ v3; \
/openbsd/src/gnu/llvm/clang/lib/Headers/
Dvelintrin_approx.h12 static inline __vr _vel_approx_vfdivs_vvvl(__vr v0, __vr v1, int l) { in _vel_approx_vfdivs_vvvl() argument
19 v2 = _vel_vfmuls_vvvl(v0, v3, l); in _vel_approx_vfdivs_vvvl()
20 v4 = _vel_vfnmsbs_vvvvl(v0, v2, v1, l); in _vel_approx_vfdivs_vvvl()
22 v0 = _vel_vfnmsbs_vvvvl(v0, v2, v1, l); in _vel_approx_vfdivs_vvvl()
23 v0 = _vel_vfmads_vvvvl(v2, v3, v0, l); in _vel_approx_vfdivs_vvvl()
24 return v0; in _vel_approx_vfdivs_vvvl()
27 static inline __vr _vel_approx_pvfdiv_vvvl(__vr v0, __vr v1, int l) { in _vel_approx_pvfdiv_vvvl() argument
34 v2 = _vel_pvfmul_vvvl(v0, v3, l); in _vel_approx_pvfdiv_vvvl()
35 v4 = _vel_pvfnmsb_vvvvl(v0, v2, v1, l); in _vel_approx_pvfdiv_vvvl()
37 v0 = _vel_pvfnmsb_vvvvl(v0, v2, v1, l); in _vel_approx_pvfdiv_vvvl()
[all …]
/openbsd/src/sys/arch/arm64/arm64/
Daesv8-armx.S86 eor v0.16b,v0.16b,v0.16b
98 ext v5.16b,v0.16b,v3.16b,#12
100 aese v6.16b,v0.16b
104 ext v5.16b,v0.16b,v5.16b,#12
106 ext v5.16b,v0.16b,v5.16b,#12
116 ext v5.16b,v0.16b,v3.16b,#12
118 aese v6.16b,v0.16b
121 ext v5.16b,v0.16b,v5.16b,#12
123 ext v5.16b,v0.16b,v5.16b,#12
130 ext v5.16b,v0.16b,v3.16b,#12
[all …]
/openbsd/src/sys/arch/mips64/mips64/
Dcp0access.S52 MFC0 v0, COP_0_CAUSE_REG # read cause register
55 or v0, v0, SOFT_INT_MASK_0 # set soft clock interrupt
56 MTC0 v0, COP_0_CAUSE_REG # save it
63 MFC0 v0, COP_0_CAUSE_REG # read cause register
66 and v0, v0, ~SOFT_INT_MASK_0 # clear soft clock interrupt
67 MTC0 v0, COP_0_CAUSE_REG # save it
74 MFC0 v0, COP_0_CAUSE_REG # read cause register
77 or v0, v0, SOFT_INT_MASK_1 # set soft net interrupt
78 MTC0 v0, COP_0_CAUSE_REG # save it
85 MFC0 v0, COP_0_CAUSE_REG # read cause register
[all …]
Dlcore_ddb.S47 li v0, KT_DDBERR
51 sw v0, PCB_ONFAULT(t0)
53 ld v0, (a0)
58 LDHI v0, 0(a0)
59 LDLO v0, 7(a0)
67 li v0, KT_DDBERR
71 sw v0, PCB_ONFAULT(t0)
73 lwu v0, (a0)
78 LWHI v0, 0(a0)
79 LWLO v0, 3(a0)
[all …]
Dlcore_access.S77 LI v0, SYS_sigreturn # sigreturn(scp)
110 move v0, zero
121 LI v0, ENAMETOOLONG # String is longer than maxlength
136 LI v0, PAGE_SIZE
138 PTR_SUBU v0, 8
140 bne zero, v0, 1b
161 LI v0, KT_COPYERR
165 sw v0, PCB_ONFAULT(t3)
191 LI v0, KT_COPYERR
195 sw v0, PCB_ONFAULT(t3)
[all …]
Dtlbhandler.S318 ori v0, v1, SR_INT_ENAB
319 xori v0, v0, SR_INT_ENAB
320 mtc0 v0, COP_0_STATUS_REG # Disable interrupts
323 LA v0, CKSEG0_BASE # invalid address
328 PTR_ADDU v0, v0, ta2
330 dmtc0 v0, COP_0_TLB_HI # Mark entry high as invalid
341 dmtc0 v0, COP_0_TLB_HI # Mark entry high as invalid
343 PTR_ADDU v0, v0, ta2
353 li v0, COP_0_DIAG_ITLB_CLEAR | COP_0_DIAG_BTB_CLEAR | COP_0_DIAG_RAS_DISABLE
354 dmtc0 v0, COP_0_DIAG
[all …]
Dcontext.S55 MFC0 v0, COP_0_STATUS_REG
64 REG_S v0, PCB_CONTEXT+11*REGSZ(a0)
66 move v0, zero
93 MFC0 v0, COP_0_STATUS_REG
105 REG_S v0, PCB_CONTEXT+11*REGSZ(t3)
112 move s1, v0 # save status register
139 GET_CPU_INFO(v0, t2)
140 PTR_L v0, CI_CPUID(v0)
141 PTR_SLL v0, v0, 0x3 # size of pmap_asid_info
142 PTR_ADDU t1, t1, v0
[all …]
/openbsd/src/sys/arch/alpha/include/
Dalpha_cpu.h335 unsigned long v0; in alpha_rpcc() local
337 __asm volatile("rpcc %0" : "=r" (v0)); in alpha_rpcc()
338 return (v0); in alpha_rpcc()
366 register unsigned long v0 __asm("$0"); in alpha_pal_rdmces()
369 : "=r" (v0) in alpha_pal_rdmces()
374 return (v0); in alpha_pal_rdmces()
380 register unsigned long v0 __asm("$0"); in alpha_pal_rdps()
383 : "=r" (v0) in alpha_pal_rdps()
388 return (v0); in alpha_pal_rdps()
394 register unsigned long v0 __asm("$0"); in alpha_pal_rdunique()
[all …]
Dbwx.h53 u_int8_t v0; in alpha_ldbu() local
56 : "=r" (v0) in alpha_ldbu()
59 return (v0); in alpha_ldbu()
65 u_int16_t v0; in alpha_ldwu() local
68 : "=r" (v0) in alpha_ldwu()
71 return (v0); in alpha_ldwu()
113 u_int8_t v0; in alpha_sextb() local
116 : "=r" (v0) in alpha_sextb()
120 return (v0); in alpha_sextb()
126 u_int16_t v0; in alpha_sextw() local
[all …]
/openbsd/src/gnu/gcc/gcc/config/mips/
Dsync.S54 #define NEG_v0 nor $v0, $v0, $0
70 1: ##ll $v0, ($a0); \
71 ##inst $v1, $v0, $a1; \
101 1: ll $v0, ($a0); \
102 ##inst $v1, $v0, $a1; \
105 and $t3, $v0, $t2; /* Get the old bits. */ \
111 and $v0, $v0, $t1; /* Get the old value. */ \
113 srl $v0, $v0, $t0; /* Remove the shift. */ \
137 1: ##ll $v0, ($a0); \
138 ##inst $v0, $v0, $a1; \
[all …]
/openbsd/src/lib/libc/arch/mips64/string/
Dbcopy.S51 lb v0, -1(t0) # copy bytes backwards,
55 sb v0, 0(t1)
61 xor v0, a0, a1 # compare low two bits of addresses
62 and v0, v0, 3
64 beq v0, zero, aligned # addresses can be word aligned
69 LWHI v0, 0(a0) # get next 4 bytes (unaligned)
70 LWLO v0, 3(a0)
72 SWHI v0, 0(a1) # store 1, 2, or 3 bytes to align a1
75 and v0, a2, 3 # compute number of words left
76 dsubu a3, a2, v0
[all …]
Dbcmp.S41 xor v0, a0, a1 # compare low two bits of addresses
42 and v0, v0, 3
44 bne v0, zero, unaligned # not possible to align addresses
49 move v0, v1 # init v0,v1 so unmodified bytes match
50 LWHI v0, 0(a0) # read 1, 2, or 3 bytes
53 bne v0, v1, nomatch
60 lw v0, 0(a0) # compare words
63 bne v0, v1, nomatch
74 lbu v0, 0(a0) # compare bytes until a1 word aligned
77 bne v0, v1, nomatch
[all …]
/openbsd/src/lib/libcrypto/des/
Ddes.c148 DES_LONG v0, v1; in DES_ede3_cfb64_encrypt() local
158 c2l(iv, v0); in DES_ede3_cfb64_encrypt()
161 ti[0] = v0; in DES_ede3_cfb64_encrypt()
164 v0 = ti[0]; in DES_ede3_cfb64_encrypt()
168 l2c(v0, iv); in DES_ede3_cfb64_encrypt()
180 c2l(iv, v0); in DES_ede3_cfb64_encrypt()
183 ti[0] = v0; in DES_ede3_cfb64_encrypt()
186 v0 = ti[0]; in DES_ede3_cfb64_encrypt()
190 l2c(v0, iv); in DES_ede3_cfb64_encrypt()
201 v0 = v1 = ti[0] = ti[1] = c = cc = 0; in DES_ede3_cfb64_encrypt()
[all …]
/openbsd/src/sys/lib/libkern/arch/mips64/
Dbcmp.S43 xor v0, a0, a1 # compare low two bits of addresses
44 and v0, v0, 3
46 bne v0, zero, .Lunalignedcmp # not possible to align addresses
51 move v0, v1 # init v0,v1 so unmodified bytes match
52 LWHI v0, 0(a0) # read 1, 2, or 3 bytes
55 bne v0, v1, .Lnomatch
62 lw v0, 0(a0) # compare words
65 bne v0, v1, .Lnomatch
76 lbu v0, 0(a0) # compare bytes until a1 word aligned
79 bne v0, v1, .Lnomatch
[all …]
/openbsd/src/sys/lib/libkern/arch/alpha/
Dffs.S46 ldil v0, 1
58 addl v0, 16, v0
67 addl v0, 8, v0
76 addl v0, 4, v0
80 addl v0, 2, v0
84 addl v0, 1, v0
90 bis zero, zero, v0
/openbsd/src/lib/libc/arch/alpha/string/
Dffs.S46 ldil v0, 1
58 addl v0, 16, v0
67 addl v0, 8, v0
76 addl v0, 4, v0
80 addl v0, 2, v0
84 addl v0, 1, v0
90 bis zero, zero, v0
/openbsd/src/sys/dev/pci/drm/amd/amdkfd/
Dcwsr_trap_handler_gfx10.asm538 global_store_dword_addtid v0, [s_save_ttmps_lo, s_save_ttmps_hi] V_COHERENCE
539 v_mov_b32 v0, 0x0
556 v_writelane_b32 v0, ttmp4, 0x4
557 v_writelane_b32 v0, ttmp5, 0x5
558 v_writelane_b32 v0, ttmp6, 0x6
559 v_writelane_b32 v0, ttmp7, 0x7
560 v_writelane_b32 v0, ttmp8, 0x8
561 v_writelane_b32 v0, ttmp9, 0x9
562 v_writelane_b32 v0, ttmp10, 0xA
563 v_writelane_b32 v0, ttmp11, 0xB
[all …]
/openbsd/src/usr.sbin/nsd/
Dsiphash.c46 v0 += v1; \
48 v1 ^= v0; \
49 v0 = ROTL(v0, 32); \
53 v0 += v3; \
55 v3 ^= v0; \
65 printf("(%3d) v0 %08x %08x\n", (int)inlen, (uint32_t)(v0 >> 32), \
66 (uint32_t)v0); \
80 uint64_t v0 = 0x736f6d6570736575ULL; in siphash() local
94 v0 ^= k0; in siphash()
108 v0 ^= m; in siphash()
[all …]
/openbsd/src/sbin/unwind/libunbound/util/
Dsiphash.c58 v0 += v1; \
60 v1 ^= v0; \
61 v0 = ROTL(v0, 32); \
65 v0 += v3; \
67 v3 ^= v0; \
77 printf("(%3d) v0 %08x %08x\n", (int)inlen, (uint32_t)(v0 >> 32), \
78 (uint32_t)v0); \
93 uint64_t v0 = 0x736f6d6570736575ULL; in siphash() local
111 v0 ^= k0; in siphash()
124 v0 ^= m; in siphash()
[all …]
/openbsd/src/usr.sbin/unbound/util/
Dsiphash.c58 v0 += v1; \
60 v1 ^= v0; \
61 v0 = ROTL(v0, 32); \
65 v0 += v3; \
67 v3 ^= v0; \
77 printf("(%3d) v0 %08x %08x\n", (int)inlen, (uint32_t)(v0 >> 32), \
78 (uint32_t)v0); \
93 uint64_t v0 = 0x736f6d6570736575ULL; in siphash() local
111 v0 ^= k0; in siphash()
124 v0 ^= m; in siphash()
[all …]
/openbsd/src/lib/libc/arch/mips64/gen/
Dldexp.S63 dsll v0, a1, 52 # position N for addition
65 daddu v0, t3, v0 # multiply by (2**N)
67 dmtc1 v0, $f0 # save result
77 move v0, t2
79 dsrl ta0, v0, 32
82 dsll v0, 32
84 dsrl ta0, v0, 16
87 dsll v0, 16
89 dsrl ta0, v0, 24
92 dsll v0, 8
[all …]
/openbsd/src/lib/libcrypto/bn/asm/
Dmips.pl90 ($zero,$at,$v0,$v1)=map("\$$_",(0..3));
118 move $v0,$zero
120 move $a0,$v0
153 $ADDU $t1,$v0
154 sltu $v0,$t1,$v0 # All manuals say it "compares 32-bit
160 $ADDU $v0,$t0
164 $ADDU $v0,$at
168 $ADDU $t3,$v0
169 sltu $v0,$t3,$v0
173 $ADDU $v0,$t2
[all …]
/openbsd/src/lib/libc/quad/
Dmuldi3.c106 #define v0 v.ul[L] macro
128 prod.q = __lmulq(u0, v0);
136 low.q = __lmulq(u0, v0);
142 if (v0 >= v1)
143 vdiff = v0 - v1;
145 vdiff = v1 - v0, negmid ^= 1;
161 #undef v0
184 u_int u1, u0, v1, v0, udiff, vdiff, high, mid, low; in __lmulq() local
192 v0 = LHALF(v); in __lmulq()
194 low = u0 * v0; in __lmulq()
[all …]

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