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Searched refs:SQ_PERFCOUNTER_CTRL__DISABLE_ME0PIPE0_PERF_MASK (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_sh_mask.h27987 #define SQ_PERFCOUNTER_CTRL__DISABLE_ME0PIPE0_PERF_MASK … macro
Dgc_11_0_0_sh_mask.h32138 #define SQ_PERFCOUNTER_CTRL__DISABLE_ME0PIPE0_PERF_MASK … macro
Dgc_12_0_0_sh_mask.h36149 #define SQ_PERFCOUNTER_CTRL__DISABLE_ME0PIPE0_PERF_MASK … macro
Dgc_11_0_3_sh_mask.h34636 #define SQ_PERFCOUNTER_CTRL__DISABLE_ME0PIPE0_PERF_MASK … macro
Dgc_10_3_0_sh_mask.h30098 #define SQ_PERFCOUNTER_CTRL__DISABLE_ME0PIPE0_PERF_MASK … macro