| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 159 unsigned Ra) { in addIntraChainConstraint() argument 160 if (Rd == Ra) in addIntraChainConstraint() 165 if (Register::isPhysicalRegister(Rd) || Register::isPhysicalRegister(Ra)) { in addIntraChainConstraint() 169 << Register::isPhysicalRegister(Ra) << '\n'); in addIntraChainConstraint() 174 PBQPRAGraph::NodeId node2 = G.getMetadata().getNodeIdForVReg(Ra); in addIntraChainConstraint() 187 const LiveInterval &la = LIs.getInterval(Ra); in addIntraChainConstraint() 243 unsigned Ra) { in addInterChainConstraint() argument 247 if (Chains.count(Ra)) { in addInterChainConstraint() 248 if (Rd != Ra) { in addInterChainConstraint() 249 LLVM_DEBUG(dbgs() << "Moving acc chain from " << printReg(Ra, TRI) in addInterChainConstraint() [all …]
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| D | AArch64PBQPRegAlloc.h | 32 bool addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra); 35 void addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, unsigned Ra);
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| D | AArch64InstrInfo.td | 1939 def : Pat<(i64 (add (mul (sext GPR32:$Rn), (s64imm_32bit:$C)), GPR64:$Ra)), 1940 (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 1941 def : Pat<(i64 (add (mul (zext GPR32:$Rn), (i64imm_32bit:$C)), GPR64:$Ra)), 1942 (UMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 1944 GPR64:$Ra)), 1946 (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 1948 def : Pat<(i64 (sub GPR64:$Ra, (mul (sext GPR32:$Rn), (s64imm_32bit:$C)))), 1949 (SMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; 1950 def : Pat<(i64 (sub GPR64:$Ra, (mul (zext GPR32:$Rn), (i64imm_32bit:$C)))), 1951 (UMSUBLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), GPR64:$Ra)>; [all …]
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| /openbsd/src/gnu/usr.bin/binutils/opcodes/ |
| D | d30v-opc.c | 344 #define Ra (UNUSED + 1) macro 346 #define Ra2 (Ra + 1) 418 { SHORT_M, 0, { Ra, ATPAR, Rb, Rc } }, /* Ra,@(Rb,Rc) */ 419 { SHORT_M, 1, { Ra, ATPAR, Rb, PLUS, Rc } }, /* Ra,@(Rb+,Rc) */ 420 { SHORT_M, 2, { Ra, ATPAR, Rb, IMM6 } }, /* Ra,@(Rb,imm6) */ 421 { SHORT_M, 3, { Ra, ATPAR, Rb, MINUS, Rc } }, /* Ra,@(Rb-,Rc) */ 426 { SHORT_A, 0, { Ra, Rb, Rc } }, /* Ra,Rb,Rc */ 427 { SHORT_A, 2, { Ra, Rb, IMM6 } }, /* Ra,Rb,imm6 */ 439 { SHORT_D1r, 0, { Ra, Rc } }, /* Ra,Rc */ 440 { SHORT_D1r, 2, { Ra, REL12S3 } }, /* Ra,rel12s3 */ [all …]
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| /openbsd/src/gnu/usr.bin/binutils-2.17/opcodes/ |
| D | d30v-opc.c | 348 #define Ra (UNUSED + 1) macro 350 #define Ra2 (Ra + 1) 423 { SHORT_M, 0, { Ra, ATPAR, Rb, Rc } }, /* Ra,@(Rb,Rc) */ 424 { SHORT_M, 1, { Ra, ATPAR, Rb, PLUS, Rc } }, /* Ra,@(Rb+,Rc) */ 425 { SHORT_M, 2, { Ra, ATPAR, Rb, IMM6 } }, /* Ra,@(Rb,imm6) */ 426 { SHORT_M, 3, { Ra, ATPAR, Rb, MINUS, Rc } }, /* Ra,@(Rb-,Rc) */ 431 { SHORT_A, 0, { Ra, Rb, Rc } }, /* Ra,Rb,Rc */ 432 { SHORT_A, 2, { Ra, Rb, IMM6 } }, /* Ra,Rb,imm6 */ 444 { SHORT_D1r, 0, { Ra, Rc } }, /* Ra,Rc */ 445 { SHORT_D1r, 2, { Ra, REL12S3 } }, /* Ra,rel12s3 */ [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVMCCodeEmitter.cpp | 108 MCRegister Ra; in expandFunctionCall() local 111 Ra = RISCV::X6; in expandFunctionCall() 114 Ra = MI.getOperand(0).getReg(); in expandFunctionCall() 117 Ra = RISCV::X1; in expandFunctionCall() 120 Ra = MI.getOperand(0).getReg(); in expandFunctionCall() 129 TmpInst = MCInstBuilder(RISCV::AUIPC).addReg(Ra).addExpr(CallExpr); in expandFunctionCall() 136 TmpInst = MCInstBuilder(RISCV::JALR).addReg(RISCV::X0).addReg(Ra).addImm(0); in expandFunctionCall() 139 TmpInst = MCInstBuilder(RISCV::JALR).addReg(Ra).addReg(Ra).addImm(0); in expandFunctionCall()
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| /openbsd/src/gnu/lib/libstdc++/libstdc++/config/ |
| D | linker-map.gnu | 66 std::locale::_[A-Ra-z]*; 138 _ZNSs[0-9]_[A-Ra-z]*; 139 _ZNSs[0-9][0-9]_[A-Ra-z]*; 145 _ZNSbIwSt11char_traitsIwESaIwEE[A-Ra-z]*; 146 _ZNSbIwSt11char_traitsIwESaIwEE[0-9][A-Ra-z]*; 147 _ZNSbIwSt11char_traitsIwESaIwEE[0-9][0-9][A-Ra-z]*; 148 _ZNSbIwSt11char_traitsIwESaIwEE[0-9]_[A-Ra-z]*; 149 _ZNSbIwSt11char_traitsIwESaIwEE[0-9][0-9]_[A-Ra-z]*;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARC/ |
| D | ARCExpandPseudos.cpp | 90 Register Ra = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ() local 93 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), TII->get(ARC::FLS_f_rr), Ra) in expandCTLZ() 98 .addReg(Ra); in expandCTLZ()
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| /openbsd/src/gnu/usr.bin/perl/cpan/podlators/t/data/snippets/text/ |
| D | non-latin | 29 ... Sébastien Feugère, Raúl Gundín, Raál Gundán, Gábor Szabó, Ævar
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| /openbsd/src/regress/lib/libcrypto/x509/bettertls/certificates/ |
| D | 71.crt | 12 ZafI/Etv7kOL1NJauE0+g/ycOoVJ93YfNNUP+Ra+SuIEfOCK64TeYWg+AxiHBap5
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| D | 153.key | 20 dReVYd18Efv+VOzjPN6wUeeEd8jxe/jnbyDr72c4Ax9Z857Y2GHtI53VExJOJ+Ra
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| D | 1171.key | 19 5rY64EWwLUMv9+XiXmIo01Ui1a80oVe4CfJCIgFWCz94haww5nYrBaoCS4S+z/Ra
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| D | 2328.key | 14 kL7/Ra/gd4zHSFASJ3o72GTbmkk8B9tlIAG7d6AjpCJaiA9Ynl5VZgvyWNFrIr/+
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| D | 54.key | 24 Ra+BAoGAOZAxkAL663hbjKAjnB9rq4m34N7dUTztoVRrg2NeNs4a3XJPAPCDiYtD
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| D | 3024.key | 10 4Dd/3Ra/rtqfaMQF9rou8wHnd97Djd3unpeU59NQyW4Rb9tTJo2dMkDnJ8vgMDX+
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| D | 1238.key | 6 vAp+X3j0wVhojdaAbPYa2hY+A4ZK76bqIYJYmWiyBQw/Ra+AL9DPSW4xySnMepTk
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| D | 710.chain | 43 cyI6eiLucvLZkKmQzLFBUjb+tJpYYCfVn/4Ra/rQD/X/xuN4ZNF79oBQ6p9qnOdo
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| /openbsd/src/sys/arch/arm64/arm64/ |
| D | disasm.c | 2343 OP5FUNC(op_madd, sf, Rm, Ra, Rn, Rd) in OP5FUNC() argument 2346 if (Ra == 31) { in OP5FUNC() 2356 ZREGNAME(sf, Ra)); in OP5FUNC() 2360 OP5FUNC(op_msub, sf, Rm, Ra, Rn, Rd) in OP5FUNC() argument 2363 if (Ra == 31) { in OP5FUNC() 2373 ZREGNAME(sf, Ra)); in OP5FUNC() 2683 OP4FUNC(op_smaddl, Rm, Ra, Rn, Rd) argument 2686 if (Ra == 31) { 2696 ZREGNAME(1, Ra)); 2705 OP4FUNC(op_smsubl, Rm, Ra, Rn, Rd) argument [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 4048 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra), 4050 "\t$Rd, $Rn, $Rm, $Ra", 4051 [(set GPR:$Rd, (int_arm_usada8 GPR:$Rn, GPR:$Rm, GPR:$Ra))]>, 4056 bits<4> Ra; 4060 let Inst{15-12} = Ra; 4332 (ins GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra), 4333 IIC_iMAC32, "mla", "\t$Rd, $Rn, $Rm, $Ra", 4334 [(set GPRnopc:$Rd, (add (mul GPRnopc:$Rn, GPRnopc:$Rm), GPRnopc:$Ra))]>, 4337 bits<4> Ra; 4338 let Inst{15-12} = Ra; [all …]
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| D | ARMInstrThumb2.td | 677 bits<4> Ra; 680 let Inst{15-12} = Ra; 2609 (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), NoItinerary, 2610 "usada8", "\t$Rd, $Rn, $Rm, $Ra", 2611 [(set rGPR:$Rd, (int_arm_usada8 rGPR:$Rn, rGPR:$Rm, rGPR:$Ra))]>, 2969 let Inst{15-12} = 0b1111; // Ra = 0b1111 (no accumulate) 2974 : T2FourReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm, rGPR:$Ra), IIC_iMAC32, 2975 opc, "\t$Rd, $Rn, $Rm, $Ra", pattern>, 2986 rGPR:$Ra))]>; 2988 [(set rGPR:$Rd, (sub rGPR:$Ra, (mul rGPR:$Rn, [all …]
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| D | ARMInstrFormats.td | 975 // MSW multiple w/ Ra operand 979 bits<4> Ra; 980 let Inst{15-12} = Ra; 1005 // AMulxyI with Ra operand 1009 bits<4> Ra; 1010 let Inst{15-12} = Ra;
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| /openbsd/src/games/quiz/datfiles/ |
| D | elements | 88 Ra:88:(226):Radium
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| /openbsd/src/gnu/gcc/libstdc++-v3/config/abi/pre/ |
| D | gnu.ver | 90 std::locale::_[J-Ra-z]*;
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| /openbsd/src/games/fortune/datfiles/ |
| D | fortunes.sp.ok | 938 Ra
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| /openbsd/src/share/zoneinfo/datfiles/ |
| D | southamerica | 1689 # From Carlos Raúl Perasso via Jesper Nørgaard Welen (2006-10-13) 1693 # From Carlos Raúl Perasso (2010-02-18): 1711 # From Carlos Raúl Perasso (2013-03-15): 1714 # From Carlos Raúl Perasso (2014-02-28): 1721 # From Carlos Raúl Perasso (2023-07-27):
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