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Searched refs:ICL_PORT_DPLL_DEFAULT (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/i915/display/
Dintel_dpll_mgr.h185 ICL_PORT_DPLL_DEFAULT, enumerator
Dintel_dpll_mgr.c3293 enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_update_active_dpll()
3314 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_compute_combo_phy_dpll()
3330 icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); in icl_compute_combo_phy_dpll()
3347 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_combo_phy_dpll()
3408 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_compute_tc_phy_dplls()
3412 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_compute_tc_phy_dplls()
3427 icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT); in icl_compute_tc_phy_dplls()
3444 &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3448 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
3475 port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT]; in icl_get_tc_phy_dplls()
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Dintel_tc.c1221 is_connected = port_pll_type == ICL_PORT_DPLL_DEFAULT; in tc_phy_is_connected()
1229 port_pll_type == ICL_PORT_DPLL_DEFAULT ? "tbt" : "non-tbt"); in tc_phy_is_connected()
1527 enum icl_port_dpll_id pll_type = ICL_PORT_DPLL_DEFAULT; in tc_port_has_active_links()
Dintel_ddi.c4010 enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT; in intel_ddi_get_clock()
4090 return ICL_PORT_DPLL_DEFAULT; in icl_ddi_tc_port_pll_type()
4093 return ICL_PORT_DPLL_DEFAULT; in icl_ddi_tc_port_pll_type()
4103 return ICL_PORT_DPLL_DEFAULT; in intel_ddi_port_pll_type()
4121 port_dpll_id = ICL_PORT_DPLL_DEFAULT; in icl_ddi_tc_get_clock()
Dintel_cx0_phy.c3241 return ICL_PORT_DPLL_DEFAULT; in intel_mtl_port_pll_type()