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Searched refs:writeback (Results 1 – 25 of 126) sorted by relevance

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/netbsd/src/external/gpl3/gcc/dist/gcc/config/arm/
Darm1136jfs.md46 ;; and saturation stages. The fourth stage is writeback; see below.
49 ;; MAC1 through MAC3, and a fourth writeback stage.
51 ;; The 4th-stage writeback is shared between the ALU and MAC pipelines,
53 ;; moved into the writeback stage. Because the two pipelines operate
57 ;; data cache (2), and writeback stages. (Note that this pipeline,
58 ;; including the writeback stage, is independent from the ALU & LSU pipes.)
290 ;; the difference between operations with a base register writeback.
300 ;; Load byte results are not available until the writeback stage, where
Dvfp11.md25 ;; - A 8-stage FMAC pipeline (7 execute + writeback) with forward from
28 ;; - A 5-stage DS pipeline (4 execute + writeback) for divide/sqrt insns.
31 ;; - A 4-stage LS pipeline (execute + 2 memory + writeback) with forward from
Dfa626te.md120 ;; the difference between operations with a base register writeback
Dfa526.md105 ;; the difference between operations with a base register writeback
Dfa606te.md108 ;; the difference between operations with a base register writeback
Dfmp626.md112 ;; the difference between operations with a base register writeback
Dldrdstrd.md150 ;; TODO: Handle LDRD/STRD with writeback:
Darm926ejs.md128 ;; the difference between operations with a base register writeback
/netbsd/src/external/gpl3/gdb/dist/gdb/
Darm-tdep.h196 unsigned int writeback : 1; /* Perform base-register writeback. */ member
217 unsigned int writeback : 1; member
Darm-tdep.c5890 if (dsc->u.ldst.writeback) in cleanup_copro_load_store()
5897 int writeback, unsigned int rn) in install_copro_load_store() argument
5915 dsc->u.ldst.writeback = writeback; in install_copro_load_store()
6518 if (dsc->u.ldst.writeback) in cleanup_load()
6544 if (dsc->u.ldst.writeback) in cleanup_store()
6602 dsc->u.ldst.writeback = bit (insn, 24) == 0 || bit (insn, 21) != 0; in arm_copy_extra_ld_st()
6626 int immed, int writeback, int size, int usermode, in install_load_store() argument
6651 dsc->u.ldst.writeback = writeback; in install_load_store()
6719 dsc->u.ldst.writeback = 0; in thumb2_copy_load_literal()
6736 int writeback, int immed) in thumb2_copy_load_reg_imm() argument
[all …]
/netbsd/src/usr.bin/mail/
Dquit.c75 writeback(FILE *res) in writeback() function
411 (void)writeback(rbuf); in quit()
534 (void)writeback(rbuf); in quit()
/netbsd/src/external/gpl3/binutils/dist/opcodes/
Daarch64-dis.c1048 info->addr.writeback = 1; in aarch64_ext_rcpc3_addr_opt_offset()
1116 info->addr.writeback = 1; in aarch64_ext_addr_offset()
1190 info->addr.writeback = 0; in aarch64_ext_addr_simm()
1194 info->addr.writeback = 1; in aarch64_ext_addr_simm()
1237 info->addr.writeback = 1; in aarch64_ext_addr_simm10()
1273 info->addr.writeback = 1; in aarch64_ext_simd_addr_post()
1541 info->addr.writeback = false; in aarch64_ext_sve_addr_reg_mul_vl()
1615 info->addr.writeback = false; in aarch64_ext_sve_addr_reg_imm()
1666 info->addr.writeback = false; in aarch64_ext_sve_addr_rr_lsl()
1688 info->addr.writeback = false; in aarch64_ext_sve_addr_rz_xtw()
[all …]
/netbsd/src/external/gpl3/gdb/dist/opcodes/
Daarch64-dis.c1073 info->addr.writeback = 1; in aarch64_ext_rcpc3_addr_opt_offset()
1145 info->addr.writeback = 1; in aarch64_ext_addr_offset()
1223 info->addr.writeback = 0; in aarch64_ext_addr_simm()
1227 info->addr.writeback = 1; in aarch64_ext_addr_simm()
1274 info->addr.writeback = 1; in aarch64_ext_addr_simm10()
1310 info->addr.writeback = 1; in aarch64_ext_simd_addr_post()
1595 info->addr.writeback = false; in aarch64_ext_sve_addr_reg_mul_vl()
1669 info->addr.writeback = false; in aarch64_ext_sve_addr_reg_imm()
1720 info->addr.writeback = false; in aarch64_ext_sve_addr_rr_lsl()
1742 info->addr.writeback = false; in aarch64_ext_sve_addr_rz_xtw()
[all …]
/netbsd/src/external/gpl3/gdb/dist/sim/m32r/
Dmloop2.in47 SC points to a sufficient number of scache entries for the writeback
106 [not parallelly]. Then the writeback only has to deal
135 [not parallelly]. Then the writeback only has to deal
Dmloopx.in47 SC points to a sufficient number of scache entries for the writeback
106 [not parallelly]. Then the writeback only has to deal
135 [not parallelly]. Then the writeback only has to deal
/netbsd/src/external/gpl3/binutils/dist/gas/config/
Dtc-aarch64.c4111 operand->addr.writeback = 1; in parse_address_main()
4117 operand->addr.writeback = 1; in parse_address_main()
4153 if (operand->addr.writeback) in parse_address_main()
7275 if (info->addr.writeback) in parse_operands()
7293 && info->addr.writeback && info->addr.preind) in parse_operands()
7295 && info->addr.writeback && info->addr.postind)) in parse_operands()
7306 || info->addr.writeback) in parse_operands()
7328 || info->addr.writeback) in parse_operands()
7360 || info->addr.writeback) in parse_operands()
7402 && info->addr.writeback)) in parse_operands()
[all …]
Dtc-arm.c568 unsigned writeback : 1; /* Operand has trailing ! */ member
6208 inst.operands[i].writeback = 1; in parse_address_main()
6235 inst.operands[i].writeback = 1; in parse_address_main()
7769 inst.operands[i].writeback = 1; in parse_operands()
7817 inst.operands[i].writeback = 1; in parse_operands()
8006 inst.operands[i].writeback = 1; in parse_operands()
8165 && (inst.operands[i].writeback || thumb)) in parse_operands()
8533 if (inst.operands[i].writeback) in encode_arm_addr_mode_common()
8539 gas_assert (inst.operands[i].writeback); in encode_arm_addr_mode_common()
8571 || (is_pc && inst.operands[i].writeback)), in encode_arm_addr_mode_2()
[all …]
Dtc-nios2.c1666 nios2_parse_base_register (char *str, int *direction, int *writeback, int *ret) in nios2_parse_base_register() argument
1672 *writeback = 0; in nios2_parse_base_register()
1723 *writeback = 1; in nios2_parse_base_register()
2746 int direction, writeback, ret; in nios2_assemble_arg_B() local
2749 = nios2_parse_base_register (str, &direction, &writeback, &ret); in nios2_assemble_arg_B()
2784 if (writeback) in nios2_assemble_arg_B()
/netbsd/src/external/lgpl3/gmp/dist/mpn/m88k/
Dadd_n.s40 ; load stalls and writeback contention. As a result, the instruction
Dsub_n.s40 ; load stalls and writeback contention. As a result, the instruction
/netbsd/src/sys/arch/hp300/DOC/
DTODO.hp30072 imaginable: internal/external, physical/virtual, writeback/writethrough)
/netbsd/src/external/gpl3/binutils/dist/cpu/
Dm32r.cpu231 (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
232 (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
289 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
302 (pipeline p-o "" () ((fetch) (decode) (execute) (writeback)))
303 (pipeline p-s "" () ((fetch) (decode) (execute) (writeback)))
304 (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
355 (pipeline p-o "" () ((fetch) (decode) (execute) (writeback)))
356 (pipeline p-s "" () ((fetch) (decode) (execute) (writeback)))
357 (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
/netbsd/src/external/gpl3/gdb/dist/cpu/
Dm32r.cpu231 (pipeline p-non-mem "" () ((fetch) (decode) (execute) (writeback)))
232 (pipeline p-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
289 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
302 (pipeline p-o "" () ((fetch) (decode) (execute) (writeback)))
303 (pipeline p-s "" () ((fetch) (decode) (execute) (writeback)))
304 (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
355 (pipeline p-o "" () ((fetch) (decode) (execute) (writeback)))
356 (pipeline p-s "" () ((fetch) (decode) (execute) (writeback)))
357 (pipeline p-o-mem "" () ((fetch) (decode) (execute) (memory) (writeback)))
/netbsd/src/sys/arch/hpc/stand/hpcboot/arm/
Darm_sa1100_asm.asm65 nop ; Fetch nontranslated writeback
/netbsd/src/external/gpl3/gdb/dist/opcodes/po/
Did.po104 msgid "unexpected address writeback"
105 msgstr "unexpected address writeback"
108 msgid "address writeback expected"
109 msgstr "alamat writeback diduga"
248 msgid "address writeback not allowed"
249 msgstr "alamat writeback tidak diijinkan"

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