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Searched refs:SP_REGNO (Results 1 – 11 of 11) sorted by relevance

/netbsd/src/external/gpl3/gcc/dist/gcc/config/m32c/
Dprologue.md34 [(set (mem:HI (plus:HI (reg:HI SP_REGNO) (const_int -2)))
37 (plus:HI (reg:HI SP_REGNO) (const_int -2)))
38 (set (reg:HI SP_REGNO)
39 (minus:HI (reg:HI SP_REGNO)
53 [(set (mem:SI (plus:PSI (reg:PSI SP_REGNO) (const_int -4)))
56 (plus:PSI (reg:PSI SP_REGNO) (const_int -4)))
57 (set (reg:PSI SP_REGNO)
58 (minus:PSI (reg:PSI SP_REGNO)
107 [(set (reg:HI SP_REGNO)
120 [(set (reg:HI SP_REGNO)
[all …]
Dm32c.h441 #ifndef SP_REGNO
442 #define SP_REGNO 8 macro
446 #define STACK_POINTER_REGNUM SP_REGNO
466 {{AP_REGNO, SP_REGNO}, \
468 {FB_REGNO, SP_REGNO}}
Dmov.md215 [(set (mem:SI (pre_dec:PSI (reg:PSI SP_REGNO)))
255 [(set (mem:QI (pre_dec:PSI (reg:PSI SP_REGNO)))
263 [(set (mem:HI (pre_dec:PSI (reg:PSI SP_REGNO)))
274 [(set (mem:HI (pre_dec:HI (reg:HI SP_REGNO)))
284 [(set (mem:HI (pre_dec:PSI (reg:PSI SP_REGNO)))
292 ; [(set (mem:PSI (pre_dec:PSI (reg:PSI SP_REGNO)))
301 [(set (mem:SI (pre_dec:PSI (reg:PSI SP_REGNO)))
310 (mem:HI (post_inc:HI (reg:HI SP_REGNO))))]
321 (mem:HI (post_inc:HI (reg:HI SP_REGNO))))]
331 (mem:HI (post_inc:PSI (reg:PSI SP_REGNO))))]
[all …]
Dm32c.cc320 case SP_REGNO: in reg_push_size()
629 case SP_REGNO: in m32c_regno_reg_class()
760 && REGNO (x) >= SB_REGNO && REGNO (x) <= SP_REGNO) in m32c_secondary_reload_class()
893 if (REGNO (r) == SP_REGNO) in m32c_matches_constraint_p()
912 && (IS_REG (patternr[1], SP_REGNO))) in m32c_matches_constraint_p()
913 || (RTX_IS ("m+ri") && (IS_REG (patternr[2], SP_REGNO)))); in m32c_matches_constraint_p()
978 return gen_rtx_MEM (PSImode, gen_rtx_REG (PSImode, SP_REGNO)); in m32c_incoming_return_addr_rtx()
1043 case SP_REGNO: in m32c_dwarf_frame_regnum()
1272 if (to == SP_REGNO) in m32c_initial_elimination_offset()
1672 && REGNO (XEXP (x, 0)) == SP_REGNO); in m32c_legitimate_address_p()
[all …]
Dm32c.md32 (SP_REGNO 8)
Dpredicates.md114 (match_test "REGNO(op) == SP_REGNO"))))
/netbsd/src/external/gpl3/gdb/dist/sim/v850/
Dsimops.c3468 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_load_mem_test()
3473 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_load_mem_test()
3478 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_load_mem_test()
3483 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_load_mem_test()
3521 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_store_mem_test()
3526 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_store_mem_test()
3531 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_store_mem_test()
3536 && ((SPAL & SPAL_SPS) ? base_reg == SP_REGNO : 1)) in mpu_store_mem_test()
Dv850-sim.h101 #define SP_REGNO 3 macro
102 #define SP (State.regs[SP_REGNO])
DChangeLog-2021557 (SP_REGNO): Define.
558 (SP): Redefine using SP_REGNO.
/netbsd/src/external/gpl3/gcc/dist/gcc/
DChangeLog-200717228 * config/m32c/prologue.md (prologue_enter_16): Only modify SP_REGNO
17232 (epilogue_exitd): Only modify SP_REGNO once inside a PARALLEL.
DChangeLog-201523390 * config/nios2/nios2.md (SP_REGNO): Define stack pointer regno.