| /freebsd-9-stable/contrib/llvm/lib/CodeGen/ |
| D | DFAPacketizer.cpp | 108 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
116 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, in DefaultVLIWScheduler() argument
118 ScheduleDAGInstrs(MF, MLI, MDT, IsPostRA) { in DefaultVLIWScheduler()
129 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, in VLIWPacketizerList() argument
133 VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, MDT, IsPostRA); in VLIWPacketizerList()
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| D | PHIElimination.cpp | 81 MachineLoopInfo *MLI);
139 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); in runOnMachineFunction() local
141 Changed |= SplitPHIEdges(MF, *I, MLI); in runOnMachineFunction()
546 MachineLoopInfo *MLI) { in SplitPHIEdges() argument
550 const MachineLoop *CurLoop = MLI ? MLI->getLoopFor(&MBB) : 0; in SplitPHIEdges()
567 const MachineLoop *PreLoop = MLI ? MLI->getLoopFor(PreMBB) : 0; in SplitPHIEdges()
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| D | UnreachableBlockElim.cpp | 125 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); in runOnMachineFunction() local
144 if (MLI) MLI->removeBlock(BB); in runOnMachineFunction()
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| D | PostRASchedulerList.cpp | 138 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
204 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, in SchedulePostRATDList() argument
208 : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=*/true), AA(AA), in SchedulePostRATDList()
264 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); in runOnMachineFunction() local
298 SchedulePostRATDList Scheduler(Fn, MLI, MDT, AA, RegClassInfo, AntiDepMode, in runOnMachineFunction()
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| D | CalcSpillWeights.cpp | 27 const MachineLoopInfo &MLI, in calculateSpillWeightsAndHints() argument
34 VirtRegAuxInfo VRAI(MF, LIS, MLI, MBFI, norm); in calculateSpillWeightsAndHints()
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| D | MachineBasicBlock.cpp | 921 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>()) in SplitCriticalEdge() local
922 if (MachineLoop *TIL = MLI->getLoopFor(this)) { in SplitCriticalEdge()
925 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) { in SplitCriticalEdge()
928 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
931 TIL->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
934 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
943 P->addBasicBlockToLoop(NMBB, MLI->getBase()); in SplitCriticalEdge()
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| D | MachineBlockPlacement.cpp | 174 const MachineLoopInfo *MLI; member in __anond2ec868d0311::MachineBlockPlacement
683 if (MachineLoop *ExitLoop = MLI->getLoopFor(*SI)) { in findBestLoopExit()
909 for (MachineLoopInfo::iterator LI = MLI->begin(), LE = MLI->end(); LI != LE; in buildCFGChains()
1065 MachineLoop *L = MLI->getLoopFor(*BI); in buildCFGChains()
1111 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
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| D | MachineLICM.cpp | 74 MachineLoopInfo *MLI; // Current MachineLoopInfo member in __anon0cec8a4e0111::MachineLICM
351 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
355 SmallVector<MachineLoop *, 8> Worklist(MLI->begin(), MLI->end()); in runOnMachineFunction()
511 const MachineLoop *ML = MLI->getLoopFor(BB); in HoistRegionPostRA()
705 const MachineLoop *ML = MLI->getLoopFor(BB); in HoistOutOfLoop()
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| D | MachineScheduler.cpp | 84 MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) { in MachineSchedContext()
249 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
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| D | ScheduleDAGInstrs.cpp | 52 : ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()), LIS(lis), in ScheduleDAGInstrs()
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| /freebsd-9-stable/contrib/llvm/lib/Target/R600/ |
| D | AMDILCFGStructurizer.cpp | 163 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
164 DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI);); in runOnMachineFunction()
179 MachineLoopInfo *MLI; member in __anon2f256dda0311::AMDGPUCFGStructurizer
365 MachineLoop *LoopRep = MLI->getLoopFor(MBB); in hasBackEdge()
384 MachineLoop *LoopRep = MLI->getLoopFor(MBB); in isActiveLoophead()
752 for (MachineLoopInfo::iterator It = MLI->begin(), in prepare()
753 E = MLI->end(); It != E; ++It) { in prepare()
1077 for (MachineLoopInfo::iterator It = MLI->begin(), E = MLI->end(); in loopendPatternMatch()
1141 MLI->changeLoopFor(LoopHeader, ParentLoop); in mergeLoop()
1143 MLI->removeBlock(LoopHeader); in mergeLoop()
[all …]
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| D | R600Packetizer.cpp | 149 R600PacketizerList(MachineFunction &MF, MachineLoopInfo &MLI, in R600PacketizerList() argument
151 : VLIWPacketizerList(MF, MLI, MDT, true), in R600PacketizerList()
327 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); in runOnMachineFunction() local
331 R600PacketizerList Packetizer(Fn, MLI, MDT); in runOnMachineFunction()
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| /freebsd-9-stable/contrib/llvm/include/llvm/CodeGen/ |
| D | CalcSpillWeights.h | 71 const MachineLoopInfo &MLI,
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| D | MachineScheduler.h | 101 const MachineLoopInfo *MLI; member
332 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS), in ScheduleDAGMI()
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| D | DFAPacketizer.h | 111 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
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| D | ScheduleDAGInstrs.h | 78 const MachineLoopInfo &MLI;
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| /freebsd-9-stable/contrib/llvm/lib/Target/Hexagon/ |
| D | HexagonVLIWPacketizer.cpp | 120 HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
186 MachineFunction &MF, MachineLoopInfo &MLI,MachineDominatorTree &MDT, in INITIALIZE_PASS_DEPENDENCY()
188 : VLIWPacketizerList(MF, MLI, MDT, true){ in INITIALIZE_PASS_DEPENDENCY()
194 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); in runOnMachineFunction() local
199 HexagonPacketizerList Packetizer(Fn, MLI, MDT, MBPI); in runOnMachineFunction()
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| D | HexagonHardwareLoops.cpp | 64 MachineLoopInfo *MLI; member
301 MLI = &getAnalysis<MachineLoopInfo>(); in runOnMachineFunction()
308 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end(); in runOnMachineFunction()
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| D | HexagonMachineScheduler.cpp | 148 << " at loop depth " << MLI.getLoopDepth(BB) in schedule()
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| /freebsd-9-stable/share/misc/ |
| D | iso3166 | 158 ML MLI 466 Mali
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| /freebsd-9-stable/contrib/gcc/config/ia64/ |
| D | itanium2.md | 560 ;; For the MLI template, the I slot insn is always assigned to port I0
1422 ;; For the MLI template, the I slot insn is always assigned to port I0
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| /freebsd-9-stable/contrib/binutils/opcodes/ |
| D | ChangeLog-0001 | 1577 for MLI templates. Handle IA64_OPND_TGT64.
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