Searched refs:AR91XX_DDR_REG_FLUSH_GE0 (Results 1 – 2 of 2) sorted by relevance
64 #define AR91XX_DDR_REG_FLUSH_GE0 AR91XX_DDR_CTRLBASE + 0x7c macro
144 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0); in ar91xx_chip_ddr_flush()