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Searched refs:dev_warn (Results 1 – 25 of 29) sorted by relevance

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/freebsd-12-stable/sys/dev/drm2/radeon/
Devergreen_cs.c221 dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d\n", in evergreen_surface_check_linear_aligned()
244 dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d (%d %d %d)\n", in evergreen_surface_check_1d()
252 dev_warn(p->dev, "%s:%d %s height %d invalid must be aligned with 8\n", in evergreen_surface_check_1d()
287 dev_warn(p->dev, "%s:%d %s pitch %d invalid must be aligned with %d\n", in evergreen_surface_check_2d()
294 dev_warn(p->dev, "%s:%d %s height %d invalid must be aligned with %d\n", in evergreen_surface_check_2d()
320 dev_warn(p->dev, "%s:%d %s invalid array mode %d\n", in evergreen_surface_check()
339 dev_warn(p->dev, "%s:%d %s invalid array mode %d\n", in evergreen_surface_value_conv_check()
350 dev_warn(p->dev, "%s:%d %s invalid number of banks %d\n", in evergreen_surface_value_conv_check()
360 dev_warn(p->dev, "%s:%d %s invalid bankw %d\n", in evergreen_surface_value_conv_check()
370 dev_warn(p->dev, "%s:%d %s invalid bankh %d\n", in evergreen_surface_value_conv_check()
[all …]
Dr600_cs.c376 dev_warn(p->dev, "%s:%d cb invalid format %d for %d (0x%08X)\n", in r600_cs_track_validate_cb()
399 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__, in r600_cs_track_validate_cb()
417 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__, in r600_cs_track_validate_cb()
424 dev_warn(p->dev, "%s:%d cb pitch (%d, 0x%x, %d) invalid\n", in r600_cs_track_validate_cb()
429 dev_warn(p->dev, "%s:%d cb height (%d, 0x%x, %d) invalid\n", in r600_cs_track_validate_cb()
434 dev_warn(p->dev, "%s offset[%d] 0x%jx 0x%jx, %d not aligned\n", __func__, i, in r600_cs_track_validate_cb()
462 dev_warn(p->dev, "%s offset[%d] %d %ju %d %lu too big (%d %d) (%d %d %d)\n", in r600_cs_track_validate_cb()
493 dev_warn(p->dev, "%s FMASK_TILE_MAX too large " in r600_cs_track_validate_cb()
511 dev_warn(p->dev, "%s CMASK_BLOCK_MAX too large " in r600_cs_track_validate_cb()
521 dev_warn(p->dev, "%s invalid tile mode\n", __func__); in r600_cs_track_validate_cb()
[all …]
Dradeon_device.c257 dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); in radeon_wb_init()
270 dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r); in radeon_wb_init()
278 dev_warn(rdev->dev, "(%d) map WB bo failed\n", r); in radeon_wb_init()
363 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); in radeon_vram_location()
369 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); in radeon_vram_location()
401 dev_warn(rdev->dev, "limiting GTT\n"); in radeon_gtt_location()
407 dev_warn(rdev->dev, "limiting GTT\n"); in radeon_gtt_location()
865 dev_warn(rdev->dev, "vram limit (%d) must be a power of 2\n", in radeon_check_arguments()
872 dev_warn(rdev->dev, "gart size (%d) too small forcing to 512M\n", in radeon_check_arguments()
877 dev_warn(rdev->dev, "gart size (%d) must be a power of 2\n", in radeon_check_arguments()
[all …]
Dr520.c147 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in r520_mc_program()
230 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in r520_resume()
275 dev_warn(rdev->dev, in r520_init()
Dradeon_agp.c158 dev_warn(rdev->dev, "AGP aperture too small (%zuM) " in radeon_agp_init()
272 dev_warn(rdev->dev, "radeon AGP reinit failed\n"); in radeon_agp_resume()
Drs400.c384 dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n"); in rs400_mc_program()
452 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rs400_resume()
523 dev_warn(rdev->dev, in rs400_init()
Drv770.c263 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in rv770_mc_program()
305 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in rv770_mc_program()
815 dev_warn(rdev->dev, "limiting VRAM\n"); in r700_vram_gtt_location()
824 dev_warn(rdev->dev, "limiting VRAM\n"); in r700_vram_gtt_location()
831 dev_warn(rdev->dev, "limiting VRAM\n"); in r700_vram_gtt_location()
1001 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); in rv770_startup()
Drs600.c803 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in rs600_gpu_init()
889 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in rs600_mc_program()
966 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rs600_resume()
1038 dev_warn(rdev->dev, in rs600_init()
Dsi.c2289 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in si_gpu_soft_reset()
2331 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in si_mc_program()
2353 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in si_mc_program()
2367 dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); in si_vram_location()
2385 dev_warn(rdev->dev, "limiting GTT\n"); in si_gtt_location()
2391 dev_warn(rdev->dev, "limiting GTT\n"); in si_gtt_location()
2406 dev_warn(rdev->dev, "limiting VRAM\n"); in si_vram_gtt_location()
3154 dev_warn(rdev->dev, "(%d) reserve RLC sr bo failed\n", r); in si_rlc_fini()
3166 dev_warn(rdev->dev, "(%d) reserve RLC c bo failed\n", r); in si_rlc_fini()
3185 dev_warn(rdev->dev, "(%d) create RLC sr bo failed\n", r); in si_rlc_init()
[all …]
Dr420.c302 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in r420_resume()
390 dev_warn(rdev->dev, in r420_init()
Drs690.c591 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in rs690_mc_program()
663 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rs690_resume()
736 dev_warn(rdev->dev, in rs690_init()
Dradeon_fence.c373 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016jx last fence id 0x%016jx)\n", in radeon_fence_wait_seq()
568 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016jx)\n", in radeon_fence_wait_any_seq()
Drv515.c472 dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); in rv515_mc_program()
568 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in rv515_resume()
645 dev_warn(rdev->dev, in rv515_init()
Devergreen.c1541 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in evergreen_mc_program()
1592 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in evergreen_mc_program()
2549 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in evergreen_gpu_soft_reset()
2652 dev_warn(rdev->dev, "Can't enable IRQ/MSI because no handler is installed\n"); in evergreen_irq_set()
3008 dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n", in evergreen_get_ih_wptr()
3564 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); in evergreen_startup()
3639 dev_warn(rdev->dev, "GPU reset failed !\n"); in evergreen_resume()
3698 dev_warn(rdev->dev, "GPU reset failed !\n"); in evergreen_init()
Dr600.c1053 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in r600_mc_program()
1093 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in r600_mc_program()
1128 dev_warn(rdev->dev, "limiting VRAM\n"); in r600_vram_gtt_location()
1137 dev_warn(rdev->dev, "limiting VRAM\n"); in r600_vram_gtt_location()
1144 dev_warn(rdev->dev, "limiting VRAM\n"); in r600_vram_gtt_location()
1406 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in r600_gpu_soft_reset()
2815 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); in r600_startup()
3841 dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n", in r600_get_ih_wptr()
Dr300.c1427 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", in r300_resume()
1505 dev_warn(rdev->dev, in r300_init()
Dradeon_object.c288 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo); in radeon_bo_unpin()
Dni.c1508 dev_warn(rdev->dev, "Wait for MC idle timedout !\n"); in cayman_gpu_soft_reset()
1603 dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); in cayman_startup()
/freebsd-12-stable/sys/dev/mlx5/mlx5_fpga/
Dcore.h95 dev_warn(&(__adev)->mdev->pdev->dev, "FPGA: %s:%d:(pid %d): " format, \
/freebsd-12-stable/sys/compat/linuxkpi/common/include/linux/
Ddevice.h185 #define dev_warn(dev, fmt, ...) device_printf((dev)->bsddev, fmt, ##__VA_ARGS__) macro
209 dev_warn(dev, __VA_ARGS__); \
/freebsd-12-stable/sys/dev/drm2/
Ddrm_edid.c375 dev_warn(connector->dev->dev, in drm_do_get_edid()
397 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", in drm_do_get_edid()
2017 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", in drm_add_edid_modes()
/freebsd-12-stable/sys/dev/mthca/
Dmthca_main.c945 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); in __mthca_init_one()
954 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " in __mthca_init_one()
Dmthca_dev.h385 dev_warn(&mdev->pdev->dev, format, ## arg)
/freebsd-12-stable/sys/ofed/drivers/infiniband/core/
Dib_user_mad.c710 dev_warn(file->port->dev, in ib_umad_reg_agent()
713 dev_warn(file->port->dev, in ib_umad_reg_agent()
/freebsd-12-stable/sys/dev/mlx4/mlx4_ib/
Dmlx4_ib.h62 dev_warn((ibdev)->dma_device, MLX4_IB_DRV_NAME ": " format, ## arg)

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