Searched refs:max_tile_pipes (Results 1 – 7 of 7) sorted by relevance
315 value = rdev->config.si.max_tile_pipes; in radeon_info_ioctl()317 value = rdev->config.cayman.max_tile_pipes; in radeon_info_ioctl()319 value = rdev->config.evergreen.max_tile_pipes; in radeon_info_ioctl()321 value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()323 value = rdev->config.r600.max_tile_pipes; in radeon_info_ioctl()
403 rdev->config.rv770.max_tile_pipes = 8; in rv770_gpu_init()423 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()447 rdev->config.rv770.max_tile_pipes = 2; in rv770_gpu_init()467 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()540 switch (rdev->config.rv770.max_tile_pipes) { in rv770_gpu_init()555 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; in rv770_gpu_init()
1834 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()1856 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()1878 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()1901 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()1923 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()1945 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()1973 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()1995 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()2017 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()2039 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()[all …]
1314 unsigned max_tile_pipes; member1335 unsigned max_tile_pipes; member1361 unsigned max_tile_pipes; member1387 unsigned max_tile_pipes; member1424 unsigned max_tile_pipes; member
1545 rdev->config.r600.max_tile_pipes = 8; in r600_gpu_init()1561 rdev->config.r600.max_tile_pipes = 2; in r600_gpu_init()1579 rdev->config.r600.max_tile_pipes = 1; in r600_gpu_init()1594 rdev->config.r600.max_tile_pipes = 4; in r600_gpu_init()1625 switch (rdev->config.r600.max_tile_pipes) { in r600_gpu_init()1641 rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; in r600_gpu_init()
483 rdev->config.cayman.max_tile_pipes = 8; in cayman_gpu_init()507 rdev->config.cayman.max_tile_pipes = 2; in cayman_gpu_init()
1575 rdev->config.si.max_tile_pipes = 12; in si_gpu_init()1592 rdev->config.si.max_tile_pipes = 8; in si_gpu_init()1610 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()1645 rdev->config.si.num_tile_pipes = rdev->config.si.max_tile_pipes; in si_gpu_init()