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Searched refs:isPhysicalRegister (Results 1 – 25 of 112) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDRegister.h63 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister() function
64 return MCRegister::isPhysicalRegister(Reg); in isPhysicalRegister()
96 return isPhysicalRegister(Reg); in isPhysical()
HDTargetRegisterInfo.h92 if (!Register::isPhysicalRegister(Reg)) in contains()
101 if (!Register::isPhysicalRegister(Reg1) || in contains()
102 !Register::isPhysicalRegister(Reg2)) in contains()
HDRegisterClassInfo.h113 assert(Register::isPhysicalRegister(PhysReg)); in getLastCalleeSavedAlias()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/
HDThumb1InstrInfo.cpp83 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) && in storeRegToStackSlot()
87 (Register::isPhysicalRegister(SrcReg) && isARMLowRegister(SrcReg))) { in storeRegToStackSlot()
112 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) && in loadRegFromStackSlot()
116 (Register::isPhysicalRegister(DestReg) && isARMLowRegister(DestReg))) { in loadRegFromStackSlot()
HDMLxExpansionPass.cpp90 if (Register::isPhysicalRegister(Reg)) in getAccDefMI()
118 if (Register::isPhysicalRegister(Reg) || !MRI->hasOneNonDBGUse(Reg)) in getDefReg()
128 if (Register::isPhysicalRegister(Reg) || !MRI->hasOneNonDBGUse(Reg)) in getDefReg()
142 if (Register::isPhysicalRegister(Reg)) in hasLoopHazard()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDDeadMachineInstructionElim.cpp80 if (Register::isPhysicalRegister(Reg)) { in isDead()
154 if (Register::isPhysicalRegister(Reg)) { in runOnMachineFunction()
173 if (Register::isPhysicalRegister(Reg)) { in runOnMachineFunction()
HDPeepholeOptimizer.cpp422 if (!Register::isPhysicalRegister(Reg)) { in ValueTracker()
464 if (Register::isPhysicalRegister(DstReg) || in INITIALIZE_PASS_DEPENDENCY()
465 Register::isPhysicalRegister(SrcReg)) in INITIALIZE_PASS_DEPENDENCY()
613 Register::isPhysicalRegister(SrcReg) || in optimizeCmpInstr()
614 (SrcReg2 != 0 && Register::isPhysicalRegister(SrcReg2))) in optimizeCmpInstr()
667 if (Register::isPhysicalRegister(Reg)) in findNextSource()
679 if (Register::isPhysicalRegister(CurSrcPair.Reg)) in findNextSource()
727 if (Register::isPhysicalRegister(CurSrcPair.Reg)) in findNextSource()
1174 if (Register::isPhysicalRegister(MODef.getReg())) in optimizeCoalescableCopy()
1225 assert(!Register::isPhysicalRegister(Def.Reg) && in rewriteSource()
[all …]
HDLivePhysRegs.cpp86 if (!Register::isPhysicalRegister(Reg)) in stepForward()
294 assert(Register::isPhysicalRegister(Reg)); in recomputeLivenessFlags()
311 assert(Register::isPhysicalRegister(Reg)); in recomputeLivenessFlags()
HDTargetRegisterInfo.cpp191 assert(Register::isPhysicalRegister(reg) && in getMinimalPhysRegClass()
412 if (!Register::isPhysicalRegister(Phys)) in getRegAllocationHints()
435 assert(Register::isPhysicalRegister(PhysReg) && in isCalleeSavedPhysReg()
475 if (Register::isPhysicalRegister(Reg)) { in getRegSizeInBits()
HDRDFRegisters.cpp104 assert(isRegMaskId(Reg) || Register::isPhysicalRegister(Reg)); in getAliasSet()
132 assert(Register::isPhysicalRegister(RA.Reg)); in aliasRR()
133 assert(Register::isPhysicalRegister(RB.Reg)); in aliasRR()
163 assert(Register::isPhysicalRegister(RR.Reg) && isRegMaskId(RM.Reg)); in aliasRM()
HDMachineInstrBundle.cpp198 if (!MO.isDead() && Register::isPhysicalRegister(Reg)) { in finalizeBundle()
316 assert(Register::isPhysicalRegister(Reg) && in AnalyzePhysRegInBundle()
330 if (!MOReg || !Register::isPhysicalRegister(MOReg)) in AnalyzePhysRegInBundle()
HDExpandPostRAPseudos.cpp91 assert(Register::isPhysicalRegister(DstReg) && in LowerSubregToReg()
93 assert(Register::isPhysicalRegister(InsReg) && in LowerSubregToReg()
HDRegisterCoalescer.cpp438 if (Register::isPhysicalRegister(Src)) { in setRegisters()
439 if (Register::isPhysicalRegister(Dst)) in setRegisters()
448 if (Register::isPhysicalRegister(Dst)) { in setRegisters()
507 assert(!(Register::isPhysicalRegister(Dst) && DstSub) && in setRegisters()
515 if (Register::isPhysicalRegister(DstReg)) in flip()
539 if (Register::isPhysicalRegister(DstReg)) { in isCoalescable()
540 if (!Register::isPhysicalRegister(Dst)) in isCoalescable()
909 if (Register::isPhysicalRegister(NewReg)) in removeCopyByCommutingDef()
1220 assert(!Register::isPhysicalRegister(Reg) && in definesFullReg()
1241 if (Register::isPhysicalRegister(SrcReg)) in reMaterializeTrivialDef()
[all …]
HDTwoAddressInstructionPass.cpp421 IsSrcPhys = Register::isPhysicalRegister(SrcReg); in isCopyToReg()
422 IsDstPhys = Register::isPhysicalRegister(DstReg); in isCopyToReg()
477 if (Register::isPhysicalRegister(Reg) && in isKilled()
482 if (Register::isPhysicalRegister(Reg)) in isKilled()
538 IsDstPhys = Register::isPhysicalRegister(DstReg); in findOnlyInterestingUse()
554 if (Register::isPhysicalRegister(Reg)) in getMappedReg()
1107 } else if (Register::isPhysicalRegister(MOReg)) { in rescheduleKillAboveMI()
1156 if (Register::isPhysicalRegister(MOReg) && LiveDefs.count(MOReg)) in rescheduleKillAboveMI()
1802 if (MI.getOperand(0).getSubReg() || Register::isPhysicalRegister(DstReg) || in eliminateRegSequence()
1852 if (LV && isKill && !Register::isPhysicalRegister(SrcReg)) in eliminateRegSequence()
HDMachineInstr.cpp994 bool isPhys = Register::isPhysicalRegister(Reg); in findRegisterDefOperandIdx()
1005 if (!Found && TRI && isPhys && Register::isPhysicalRegister(MOReg)) { in findRegisterDefOperandIdx()
1142 if (Register::isPhysicalRegister(ToReg)) { in substituteRegister()
1788 bool isPhysReg = Register::isPhysicalRegister(IncomingReg); in addRegisterKilled()
1819 } else if (hasAliases && MO.isKill() && Register::isPhysicalRegister(Reg)) { in addRegisterKilled()
1853 if (!Register::isPhysicalRegister(Reg)) in clearRegisterKills()
1867 bool isPhysReg = Register::isPhysicalRegister(Reg); in addRegisterDead()
1884 Register::isPhysicalRegister(MOReg)) { in addRegisterDead()
1935 if (Register::isPhysicalRegister(Reg)) { in addRegisterDefined()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIFormMemoryClauses.cpp148 if (Register::isPhysicalRegister(MO.getReg()) && MO.isRenamable()) in getMopState()
156 if (LaneMask.all() || Register::isPhysicalRegister(Reg) || in forAllLanes()
231 if (Register::isPhysicalRegister(Reg)) in canBundle()
393 if (Register::isPhysicalRegister(Reg)) in runOnMachineFunction()
401 if (Register::isPhysicalRegister(Reg)) in runOnMachineFunction()
HDSIPreAllocateWWMRegs.cpp99 if (Register::isPhysicalRegister(Reg)) in processDef()
129 if (Register::isPhysicalRegister(VirtReg)) in rewriteRegs()
HDSIPeepholeSDWA.cpp573 if (Register::isPhysicalRegister(Src1->getReg()) || in matchSDWAOperand()
574 Register::isPhysicalRegister(Dst->getReg())) in matchSDWAOperand()
612 if (Register::isPhysicalRegister(Src1->getReg()) || in matchSDWAOperand()
613 Register::isPhysicalRegister(Dst->getReg())) in matchSDWAOperand()
676 if (Register::isPhysicalRegister(Src0->getReg()) || in matchSDWAOperand()
677 Register::isPhysicalRegister(Dst->getReg())) in matchSDWAOperand()
705 if (Register::isPhysicalRegister(ValSrc->getReg()) || in matchSDWAOperand()
706 Register::isPhysicalRegister(Dst->getReg())) in matchSDWAOperand()
HDSIShrinkInstructions.cpp396 if (Register::isPhysicalRegister(Reg) && in instAccessReg()
397 Register::isPhysicalRegister(MO.getReg())) { in instAccessReg()
426 if (Register::isPhysicalRegister(Reg)) { in getSubRegForIndex()
580 Register::isPhysicalRegister(MI.getOperand(0).getReg())) { in runOnMachineFunction()
674 if (Src.isImm() && Register::isPhysicalRegister(Dst.getReg())) { in runOnMachineFunction()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MC/
HDMCRegister.h52 static bool isPhysicalRegister(unsigned Reg) { in isPhysicalRegister() function
60 return isPhysicalRegister(Reg); in isPhysical()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
HDAArch64PBQPRegAlloc.cpp165 if (Register::isPhysicalRegister(Rd) || Register::isPhysicalRegister(Ra)) { in addIntraChainConstraint()
167 << Register::isPhysicalRegister(Rd) << '\n'); in addIntraChainConstraint()
169 << Register::isPhysicalRegister(Ra) << '\n'); in addIntraChainConstraint()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonBlockRanges.cpp271 if (Register::isPhysicalRegister(R.Reg)) { in expandToSubRegs()
324 if (Register::isPhysicalRegister(R.Reg) && Reserved[R.Reg]) in computeInitialLiveRanges()
341 if (Register::isPhysicalRegister(S.Reg) && Reserved[S.Reg]) in computeInitialLiveRanges()
377 assert(!Register::isPhysicalRegister(S.Reg) || in computeInitialLiveRanges()
386 assert(!Register::isPhysicalRegister(S.Reg) || in computeInitialLiveRanges()
HDRDFCopy.cpp48 assert(Register::isPhysicalRegister(DstR.Reg)); in interpretAsCopy()
49 assert(Register::isPhysicalRegister(SrcR.Reg)); in interpretAsCopy()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
HDUtils.cpp133 if (Register::isPhysicalRegister(Reg)) in constrainSelectedInstRegOperands()
172 if (Register::isPhysicalRegister(Reg) || !MRI.use_nodbg_empty(Reg)) in isTriviallyDead()
257 if (Register::isPhysicalRegister(VReg)) in getConstantVRegValWithLookThrough()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMipsRegisterBankInfo.cpp180 !Register::isPhysicalRegister(NonCopyInstr->getOperand(0).getReg())) in addDefUses()
202 !Register::isPhysicalRegister(Ret->getOperand(0).getReg()) && in skipCopiesOutgoing()
216 !Register::isPhysicalRegister(Ret->getOperand(1).getReg())) in skipCopiesIncoming()
337 assert((Register::isPhysicalRegister(CopyInst->getOperand(Op).getReg())) && in setTypesAccordingToPhysicalRegister()

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