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Searched refs:RF (Results 1 – 25 of 54) sorted by relevance

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/freebsd-11-stable/bin/pax/
HDoptions.h66 #define RF 0x00000800 macro
96 #define ISLIST(x) (((x) & (RF|WF)) == 0)
97 #define ISEXTRACT(x) (((x) & (RF|WF)) == RF)
98 #define ISARCHIVE(x) (((x) & (AF|RF|WF)) == WF)
99 #define ISAPPND(x) (((x) & (AF|RF|WF)) == (AF|WF))
100 #define ISCOPY(x) (((x) & (RF|WF)) == (RF|WF))
101 #define ISWRITE(x) (((x) & (RF|WF)) == WF)
108 #define BDARCH (CF|KF|LF|NF|PF|RF|CDF|CEF|CYF|CZF)
110 #define BDLIST (AF|BF|IF|KF|LF|OF|PF|RF|TF|UF|WF|XF|CBF|CDF|CHF|CLF|CPF|CXF|CYF|CZF)
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/
HDARMWinEH.cpp15 std::pair<uint16_t, uint32_t> SavedRegisterMask(const RuntimeFunction &RF) { in SavedRegisterMask() argument
16 uint8_t NumRegisters = RF.Reg(); in SavedRegisterMask()
17 uint8_t RegistersVFP = RF.R(); in SavedRegisterMask()
18 uint8_t LinkRegister = RF.L(); in SavedRegisterMask()
19 uint8_t ChainedFrame = RF.C(); in SavedRegisterMask()
29 if (PrologueFolding(RF)) in SavedRegisterMask()
30 GPRMask |= (((1 << (NumRegisters + 1)) - 1) << (~RF.StackAdjust() & 0x3)); in SavedRegisterMask()
/freebsd-11-stable/contrib/binutils/gas/config/
HDtc-arm.c15405 cCL(ldfs, c100100, 2, (RF, ADDRGLDC), rd_cpaddr),
15406 cCL(ldfd, c108100, 2, (RF, ADDRGLDC), rd_cpaddr),
15407 cCL(ldfe, c500100, 2, (RF, ADDRGLDC), rd_cpaddr),
15408 cCL(ldfp, c508100, 2, (RF, ADDRGLDC), rd_cpaddr),
15410 cCL(stfs, c000100, 2, (RF, ADDRGLDC), rd_cpaddr),
15411 cCL(stfd, c008100, 2, (RF, ADDRGLDC), rd_cpaddr),
15412 cCL(stfe, c400100, 2, (RF, ADDRGLDC), rd_cpaddr),
15413 cCL(stfp, c408100, 2, (RF, ADDRGLDC), rd_cpaddr),
15415 cCL(mvfs, e008100, 2, (RF, RF_IF), rd_rm),
15416 cCL(mvfsp, e008120, 2, (RF, RF_IF), rd_rm),
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/Support/
HDARMWinEH.h185 inline bool PrologueFolding(const RuntimeFunction &RF) { in PrologueFolding() argument
186 return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x4); in PrologueFolding()
190 inline bool EpilogueFolding(const RuntimeFunction &RF) { in EpilogueFolding() argument
191 return RF.StackAdjust() >= 0x3f4 && (RF.StackAdjust() & 0x8); in EpilogueFolding()
196 inline uint16_t StackAdjustment(const RuntimeFunction &RF) { in StackAdjustment() argument
197 uint16_t Adjustment = RF.StackAdjust(); in StackAdjustment()
205 std::pair<uint16_t, uint32_t> SavedRegisterMask(const RuntimeFunction &RF);
/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-readobj/
HDWin64EHDumper.cpp207 const RuntimeFunction &RF) { in printRuntimeFunctionEntry() argument
209 formatSymbol(Ctx, Section, Offset + 0, RF.StartAddress)); in printRuntimeFunctionEntry()
211 formatSymbol(Ctx, Section, Offset + 4, RF.EndAddress)); in printRuntimeFunctionEntry()
213 formatSymbol(Ctx, Section, Offset + 8, RF.UnwindInfoOffset)); in printRuntimeFunctionEntry()
323 const RuntimeFunction &RF) { in printRuntimeFunction() argument
325 printRuntimeFunctionEntry(Ctx, Section, SectionOffset, RF); in printRuntimeFunction()
330 Offset = Offset + RF.UnwindInfoOffset; in printRuntimeFunction()
333 uint64_t Address = Ctx.COFF.getImageBase() + RF.UnwindInfoOffset; in printRuntimeFunction()
337 Offset = RF.UnwindInfoOffset - XData->VirtualAddress; in printRuntimeFunction()
379 for (const auto &RF : RuntimeFunctions) { in printData() local
[all …]
HDARMWinEHPrinter.cpp923 unsigned Index, const RuntimeFunction &RF) { in dumpUnpackedEntry() argument
924 assert(RF.Flag() == RuntimeFunctionFlag::RFF_Unpacked && in dumpUnpackedEntry()
929 Function = getSymbol(COFF, COFF.getImageBase() + RF.BeginAddress, in dumpUnpackedEntry()
934 XDataRecord = getSymbol(COFF, RF.ExceptionInformationRVA()); in dumpUnpackedEntry()
936 if (!RF.BeginAddress && !Function) in dumpUnpackedEntry()
938 if (!RF.UnwindData && !XDataRecord) in dumpUnpackedEntry()
963 FunctionAddress = COFF.getImageBase() + RF.BeginAddress; in dumpUnpackedEntry()
1000 RF.ExceptionInformationRVA()); in dumpUnpackedEntry()
1002 uint64_t Address = COFF.getImageBase() + RF.ExceptionInformationRVA(); in dumpUnpackedEntry()
1015 unsigned Index, const RuntimeFunction &RF) { in dumpPackedEntry() argument
[all …]
HDWin64EHDumper.h46 const RuntimeFunction &RF);
52 uint64_t SectionOffset, const RuntimeFunction &RF);
/freebsd-11-stable/contrib/llvm-project/llvm/tools/llvm-objdump/
HDCOFFDump.cpp531 const RuntimeFunction &RF) { in printRuntimeFunction() argument
532 if (!RF.StartAddress) in printRuntimeFunction()
536 static_cast<uint32_t>(RF.StartAddress)) in printRuntimeFunction()
538 static_cast<uint32_t>(RF.EndAddress)) in printRuntimeFunction()
540 static_cast<uint32_t>(RF.UnwindInfoOffset)); in printRuntimeFunction()
542 if (Obj->getRvaPtr(RF.UnwindInfoOffset, addr)) in printRuntimeFunction()
554 const RuntimeFunction &RF, in printRuntimeFunctionRels() argument
562 RF.StartAddress); in printRuntimeFunctionRels()
569 RF.EndAddress); in printRuntimeFunctionRels()
576 RF.UnwindInfoOffset); in printRuntimeFunctionRels()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
HDHexagonAsmBackend.cpp47 void ReplaceInstruction(MCCodeEmitter &E, MCRelaxableFragment &RF, in ReplaceInstruction() argument
52 E.encodeInstruction(HMB, VecOS, Fixups, *RF.getSubtargetInfo()); in ReplaceInstruction()
55 RF.setInst(HMB); in ReplaceInstruction()
56 RF.getContents() = Code; in ReplaceInstruction()
57 RF.getFixups() = Fixups; in ReplaceInstruction()
729 auto &RF = cast<MCRelaxableFragment>(*K); in finishLayout() local
730 auto &Inst = const_cast<MCInst &>(RF.getInst()); in finishLayout()
737 Context, *MCII, *RF.getSubtargetInfo(), Inst, in finishLayout()
745 *RF.getSubtargetInfo(), Inst); in finishLayout()
748 ReplaceInstruction(Asm.getEmitter(), RF, Inst); in finishLayout()
[all …]
/freebsd-11-stable/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
HDRegisterFile.cpp49 const MCRegisterFileDesc &RF = Info.RegisterFiles[I]; in initialize() local
50 assert(RF.NumPhysRegs && "Invalid PRF with zero physical registers!"); in initialize()
54 unsigned Length = RF.NumRegisterCostEntries; in initialize()
56 &Info.RegisterCostTable[RF.RegisterCostEntryIdx]; in initialize()
57 addRegisterFile(RF, ArrayRef<MCRegisterCostEntry>(FirstElt, Length)); in initialize()
66 void RegisterFile::addRegisterFile(const MCRegisterFileDesc &RF, in addRegisterFile() argument
74 RegisterFiles.emplace_back(RF.NumPhysRegs, RF.MaxMovesEliminatedPerCycle, in addRegisterFile()
75 RF.AllowZeroMoveEliminationOnly); in addRegisterFile()
HDResourceManager.cpp339 for (const ResourceRef &RF : ResourcesFreed) in cycleEvent() local
340 BusyResources.erase(RF); in cycleEvent()
/freebsd-11-stable/contrib/gcc/config/ia64/
HDia64-modes.def31 FRACTIONAL_FLOAT_MODE (RF, 82, 16, ieee_extended_intel_128_format);
60 ADJUST_FLOAT_FORMAT (RF, (TARGET_ILP32 && !TARGET_HPUX)
63 ADJUST_BYTESIZE (RF, (TARGET_ILP32 && !TARGET_HPUX) ? 12 : 16);
64 ADJUST_ALIGNMENT (RF, (TARGET_ILP32 && !TARGET_HPUX) ? 4 : 16);
/freebsd-11-stable/sys/mips/conf/
HDROUTERSTATION.hints37 # GPIO 2: RF LED
44 # RF led
HDRSPRO.hints38 # GPIO 2: RF LED
45 # RF led
/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
HDRISCVCompressInstEmitter.cpp105 std::vector<Record *> RF, IndexedMap<OpData> &SourceMap, in CompressPat()
107 : Source(S), Dest(D), PatReqFeatures(RF), SourceOperandMap(SourceMap), in CompressPat()
468 std::vector<Record *> RF = Rec->getValueAsListOfDefs("Predicates"); in evaluateCompressPat() local
469 copy_if(RF, std::back_inserter(PatReqFeatures), [](Record *R) { in evaluateCompressPat()
660 std::vector<Record *> RF = Dest.TheDef->getValueAsListOfDefs("Predicates"); in emitCompressInstEmitter() local
661 copy_if(RF, std::back_inserter(ReqFeatures), [](Record *R) { in emitCompressInstEmitter()
HDCodeGenSchedule.cpp1790 for (Record *RF : RegisterFileDefs) { in collectRegisterFiles()
1793 CodeGenProcModel &PM = getProcModel(RF->getValueAsDef("SchedModel")); in collectRegisterFiles()
1794 PM.RegisterFiles.emplace_back(CodeGenRegisterFile(RF->getName(),RF)); in collectRegisterFiles()
1797 RF->getValueAsInt("MaxMovesEliminatedPerCycle"); in collectRegisterFiles()
1799 RF->getValueAsBit("AllowZeroMoveEliminationOnly"); in collectRegisterFiles()
1803 CGRF.NumPhysRegs = RF->getValueAsInt("NumPhysRegs"); in collectRegisterFiles()
1805 PrintFatalError(RF->getLoc(), in collectRegisterFiles()
1809 RecVec RegisterClasses = RF->getValueAsListOfDefs("RegClasses"); in collectRegisterFiles()
1810 std::vector<int64_t> RegisterCosts = RF->getValueAsListOfInts("RegCosts"); in collectRegisterFiles()
1811 ListInit *MoveElimInfo = RF->getValueAsListInit("AllowMoveElimination"); in collectRegisterFiles()
/freebsd-11-stable/tools/tools/ath/athprom/
HDeeprom-311 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
77 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
125 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
HDeeprom-413 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
86 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
151 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
HDeeprom-514 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
100 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
178 | RF Silent $rfKill | XR5 Disable $disableXr5 | XR2 Disable $disableXr2 |
/freebsd-11-stable/contrib/groff/contrib/mm/examples/
HDReferences84 .RF
100 .RF
159 .RF
195 .RF
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDCallGraph.cpp101 if (Function *RF = RHS->getFunction()) in print() local
102 return LF->getName() < RF->getName(); in print()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/ExecutionEngine/Interpreter/
HDExternalFunctions.cpp273 std::map<const Function *, RawFunc>::iterator RF = RawFunctions->find(F); in callExternalFunction() local
275 if (RF == RawFunctions->end()) { in callExternalFunction()
283 RawFn = RF->second; in callExternalFunction()
/freebsd-11-stable/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
HDRegisterFile.h163 void addRegisterFile(const MCRegisterFileDesc &RF,
/freebsd-11-stable/contrib/file/magic/Magdir/
HDsniffer246 >20 belong&0x03FFFFFF 261 (Z-Wave RF profile R1 and R2 packets
247 >20 belong&0x03FFFFFF 262 (Z-Wave RF profile R3 packets
257 >20 belong&0x03FFFFFF 273 (Excentis XRA-31 DOCSIS 3.1 RF sniffer frames
/freebsd-11-stable/share/doc/psd/21.ipc/
HDspell.ok76 RF

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