Searched refs:sys_info (Results 1 – 11 of 11) sorted by relevance
644 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid); in trinity_set_vid()1017 value |= LT((pi->thermal_auto_throttling + 49 - pi->sys_info.htc_hyst_lmt) * 8); in trinity_program_ttt()1195 if (pi->sys_info.nb_dpm_enable) { in trinity_setup_nbp_sim()1317 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit); in trinity_convert_voltage_index_to_value()1350 pi->boot_pl.sclk = pi->sys_info.bootup_sclk; in trinity_construct_boot_state()1351 pi->boot_pl.vddc_index = pi->sys_info.bootup_nb_voltage_index; in trinity_construct_boot_state()1392 for (i = 0; i < pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries; i++) { in trinity_get_valid_engine_clock()1393 … if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit) in trinity_get_valid_engine_clock()1394 … return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency; in trinity_get_valid_engine_clock()1397 if (i == pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries) in trinity_get_valid_engine_clock()[all …]
82 pi->sys_info.csr_m3_arb_cntl_default[i]); in sumo_initialize_m3_arb()86 pi->sys_info.csr_m3_arb_cntl_uvd[i % NUMBER_OF_M3ARB_PARAM_SETS]); in sumo_initialize_m3_arb()90 pi->sys_info.csr_m3_arb_cntl_fs3d[i % NUMBER_OF_M3ARB_PARAM_SETS]); in sumo_initialize_m3_arb()158 WREG32_RCU(RCU_BOOST_MARGIN, pi->sys_info.sclk_dpm_boost_margin); in sumo_enable_boost_timer()159 WREG32_RCU(RCU_THROTTLE_MARGIN, pi->sys_info.sclk_dpm_throttle_margin); in sumo_enable_boost_timer()160 WREG32_RCU(GNB_TDP_LIMIT, pi->sys_info.gnb_tdp_limit); in sumo_enable_boost_timer()161 WREG32_RCU(RCU_SclkDpmTdpLimitPG, pi->sys_info.sclk_dpm_tdp_limit_pg); in sumo_enable_boost_timer()
674 pi->boost_pl.sclk = pi->sys_info.boost_sclk; in sumo_patch_boost_state()675 pi->boost_pl.vddc_index = pi->sys_info.boost_vid_2bit; in sumo_patch_boost_state()676 pi->boost_pl.sclk_dpm_tdp_limit = pi->sys_info.sclk_dpm_tdp_limit_boost; in sumo_patch_boost_state()1037 for (i = 0; i < pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries; i++) { in sumo_get_valid_engine_clock()1038 … if (pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency >= lower_limit) in sumo_get_valid_engine_clock()1039 … return pi->sys_info.sclk_voltage_mapping_table.entries[i].sclk_frequency; in sumo_get_valid_engine_clock()1042 …return pi->sys_info.sclk_voltage_mapping_table.entries[pi->sys_info.sclk_voltage_mapping_table.num… in sumo_get_valid_engine_clock()1050 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_patch_thermal_state()1097 u32 min_sclk = pi->sys_info.min_sclk; /* XXX check against disp reqs */ in sumo_apply_state_adjust_rules()1098 u32 sclk_in_sr = pi->sys_info.min_sclk; /* ??? */ in sumo_apply_state_adjust_rules()[all …]
605 &pi->sys_info.vid_mapping_table, in kv_convert_2bit_index_to_voltage()728 &pi->sys_info.sclk_voltage_mapping_table; in kv_program_bootup_state()1100 &pi->sys_info.sclk_voltage_mapping_table; in kv_calculate_dfs_bypass_settings()1735 &pi->sys_info.sclk_voltage_mapping_table; in kv_set_valid_clock_range()1968 if (pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries > 0) { in kv_construct_max_power_limits_table()1969 int idx = pi->sys_info.sclk_voltage_mapping_table.num_max_dpm_entries - 1; in kv_construct_max_power_limits_table()1971 pi->sys_info.sclk_voltage_mapping_table.entries[idx].sclk_frequency; in kv_construct_max_power_limits_table()1974 … pi->sys_info.sclk_voltage_mapping_table.entries[idx].vid_2bit); in kv_construct_max_power_limits_table()1977 table->mclk = pi->sys_info.nbp_memory_clock[0]; in kv_construct_max_power_limits_table()2026 pi->boot_pl.sclk = pi->sys_info.bootup_sclk; in kv_construct_boot_state()[all …]
98 struct trinity_sys_info sys_info; member
109 struct kv_sys_info sys_info; member
115 struct sumo_sys_info sys_info; member
258 struct smu8_sys_info *sys_info = &data->sys_info; in smu8_construct_max_power_limits_table() local267 table->mclk = sys_info->nbp_memory_clock[0]; in smu8_construct_max_power_limits_table()332 data->sys_info.bootup_uma_clock = in smu8_get_system_info_data()335 data->sys_info.bootup_engine_clock = in smu8_get_system_info_data()338 data->sys_info.dentist_vco_freq = in smu8_get_system_info_data()341 data->sys_info.system_config = in smu8_get_system_info_data()344 data->sys_info.bootup_nb_voltage_index = in smu8_get_system_info_data()347 data->sys_info.htc_hyst_lmt = in smu8_get_system_info_data()350 data->sys_info.htc_tmp_lmt = in smu8_get_system_info_data()353 if (data->sys_info.htc_tmp_lmt <= in smu8_get_system_info_data()[all …]
211 struct smu10_system_info sys_info; member
202 struct smu8_sys_info sys_info; member
180 smu10_data->sys_info.htc_hyst_lmt = 5; in smu10_get_system_info_data()181 smu10_data->sys_info.htc_tmp_lmt = 203; in smu10_get_system_info_data()