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Searched refs:mmCP_SC_PSINVOC_COUNT0_HI (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h537 #define mmCP_SC_PSINVOC_COUNT0_HI 0x212D macro
HDgfx_7_0_d.h398 #define mmCP_SC_PSINVOC_COUNT0_HI 0xc02d macro
HDgfx_7_2_d.h410 #define mmCP_SC_PSINVOC_COUNT0_HI 0xc02d macro
HDgfx_8_0_d.h446 #define mmCP_SC_PSINVOC_COUNT0_HI 0xc02d macro
HDgfx_8_1_d.h446 #define mmCP_SC_PSINVOC_COUNT0_HI 0xc02d macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h4563 #define mmCP_SC_PSINVOC_COUNT0_HI … macro
HDgc_9_2_1_offset.h4806 #define mmCP_SC_PSINVOC_COUNT0_HI … macro
HDgc_9_1_offset.h4850 #define mmCP_SC_PSINVOC_COUNT0_HI … macro