Home
last modified time | relevance | path

Searched refs:mmCGTS_CU12_TA_SQC_CTRL_REG (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h1547 #define mmCGTS_CU12_TA_SQC_CTRL_REG 0xf046 macro
HDgfx_7_2_d.h1568 #define mmCGTS_CU12_TA_SQC_CTRL_REG 0xf046 macro
HDgfx_8_0_d.h1761 #define mmCGTS_CU12_TA_SQC_CTRL_REG 0xf046 macro
HDgfx_8_1_d.h1729 #define mmCGTS_CU12_TA_SQC_CTRL_REG 0xf046 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h6375 #define mmCGTS_CU12_TA_SQC_CTRL_REG … macro
HDgc_9_2_1_offset.h6666 #define mmCGTS_CU12_TA_SQC_CTRL_REG … macro
HDgc_9_1_offset.h6654 #define mmCGTS_CU12_TA_SQC_CTRL_REG … macro