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Searched refs:ira_no_alloc_regs (Results 1 – 25 of 25) sorted by relevance

/dragonfly/contrib/gcc-4.7/gcc/
HDira.h126 #define ira_no_alloc_regs \ macro
HDira-conflicts.c805 AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs); in print_allocno_conflicts()
812 AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs); in print_allocno_conflicts()
885 AND_COMPL_HARD_REG_SET (temp_hard_reg_set, ira_no_alloc_regs); in ira_build_conflicts()
HDira-lives.c325 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_hard_reg_live()
451 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_hard_reg_dead()
1075 AND_COMPL_HARD_REG_SET (hard_regs_live, ira_no_alloc_regs); in process_bb_node_lives()
HDira-costs.c240 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in setup_regno_cost_classes_by_aclass()
252 AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs); in setup_regno_cost_classes_by_aclass()
266 AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs); in setup_regno_cost_classes_by_aclass()
307 IOR_HARD_REG_SET (temp, ira_no_alloc_regs); in setup_regno_cost_classes_by_mode()
HDira.c1799 COPY_HARD_REG_SET (ira_no_alloc_regs, no_unit_alloc_regs); in ira_setup_eliminable_regset()
1818 SET_HARD_REG_BIT (ira_no_alloc_regs, eliminables[i].from); in ira_setup_eliminable_regset()
1831 SET_HARD_REG_BIT (ira_no_alloc_regs, HARD_FRAME_POINTER_REGNUM); in ira_setup_eliminable_regset()
1845 SET_HARD_REG_BIT (ira_no_alloc_regs, FRAME_POINTER_REGNUM); in ira_setup_eliminable_regset()
HDsched-deps.c1944 && TEST_HARD_REG_BIT (ira_no_alloc_regs, i)) in setup_insn_reg_uses()
2031 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_insn_hard_regno_birth()
2113 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_hard_regno_death()
2794 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in sched_analyze_insn()
HDira-color.c678 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i)) in form_allocno_hard_regs_nodes_forest()
699 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in form_allocno_hard_regs_nodes_forest()
1029 ira_no_alloc_regs); in setup_profitable_hard_regs()
HDira-build.c462 COPY_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), ira_no_alloc_regs); in ira_create_object()
463 COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), ira_no_alloc_regs); in ira_create_object()
HDloop-invariant.c1637 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) in get_regno_pressure_class()
HDsel-sched.c2156 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in implicit_clobber_conflict_p()
HDhaifa-sched.c935 && ! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_regno_birth_or_death()
/dragonfly/contrib/gcc-8.0/gcc/
HDira.h163 #define ira_no_alloc_regs \ macro
HDira-conflicts.c659 AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs); in print_allocno_conflicts()
666 AND_COMPL_HARD_REG_SET (conflicting_hard_regs, ira_no_alloc_regs); in print_allocno_conflicts()
739 AND_COMPL_HARD_REG_SET (temp_hard_reg_set, ira_no_alloc_regs); in ira_build_conflicts()
HDira-lives.c341 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_hard_reg_live()
467 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_hard_reg_dead()
1056 AND_COMPL_HARD_REG_SET (hard_regs_live, ira_no_alloc_regs); in process_bb_node_lives()
HDira-costs.c262 AND_COMPL_HARD_REG_SET (valid_for_cl, ira_no_alloc_regs); in restrict_cost_classes()
347 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in setup_regno_cost_classes_by_aclass()
360 AND_COMPL_HARD_REG_SET (temp2, ira_no_alloc_regs); in setup_regno_cost_classes_by_aclass()
HDsched-deps.c1966 && TEST_HARD_REG_BIT (ira_no_alloc_regs, i)) in setup_insn_reg_uses()
2053 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_insn_hard_regno_birth()
2134 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_hard_regno_death()
2877 AND_COMPL_HARD_REG_SET (*temp, ira_no_alloc_regs); in get_implicit_reg_pending_clobbers()
HDira.c2302 COPY_HARD_REG_SET (ira_no_alloc_regs, no_unit_alloc_regs); in ira_setup_eliminable_regset()
2320 SET_HARD_REG_BIT (ira_no_alloc_regs, eliminables[i].from); in ira_setup_eliminable_regset()
2334 SET_HARD_REG_BIT (ira_no_alloc_regs, HARD_FRAME_POINTER_REGNUM); in ira_setup_eliminable_regset()
HDira-build.c459 COPY_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), ira_no_alloc_regs); in ira_create_object()
460 COPY_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), ira_no_alloc_regs); in ira_create_object()
HDloop-invariant.c1996 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) in get_regno_pressure_class()
HDlra.c2357 COPY_HARD_REG_SET (lra_no_alloc_regs, ira_no_alloc_regs); in lra()
HDira-color.c700 if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, i)) in form_allocno_hard_regs_nodes_forest()
721 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in form_allocno_hard_regs_nodes_forest()
HDgcse.c3360 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno) in get_regno_pressure_class()
HDsel-sched.c2114 AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs); in implicit_clobber_conflict_p()
HDlra-constraints.c1876 ira_no_alloc_regs) in update_and_check_small_class_inputs()
HDhaifa-sched.c984 && ! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) in mark_regno_birth_or_death()