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Searched refs:ipp (Results 1 – 25 of 25) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/inc/hw/
HDipp.h71 struct input_pixel_processor *ipp,
76 struct input_pixel_processor *ipp,
83 struct input_pixel_processor *ipp);
87 struct input_pixel_processor *ipp,
95 struct input_pixel_processor *ipp,
99 struct input_pixel_processor *ipp,
104 struct input_pixel_processor *ipp,
108 struct input_pixel_processor *ipp,
111 void (*ipp_destroy)(struct input_pixel_processor **ipp);
/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_ipp.c42 struct input_pixel_processor *ipp, in dce_ipp_cursor_set_position() argument
46 struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); in dce_ipp_cursor_set_position()
68 struct input_pixel_processor *ipp, in dce_ipp_cursor_set_attributes() argument
71 struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); in dce_ipp_cursor_set_attributes()
138 static void dce_ipp_program_prescale(struct input_pixel_processor *ipp, in dce_ipp_program_prescale() argument
141 struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); in dce_ipp_program_prescale()
170 struct input_pixel_processor *ipp, in dce_ipp_program_input_lut() argument
174 struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); in dce_ipp_program_input_lut()
218 struct input_pixel_processor *ipp, in dce_ipp_set_degamma() argument
221 struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); in dce_ipp_set_degamma()
[all …]
HDdce_ipp.h31 #define TO_DCE_IPP(ipp)\ argument
32 container_of(ipp, struct dce_ipp, base)
236 void dce_ipp_destroy(struct input_pixel_processor **ipp);
/dragonfly/sys/vfs/ext2fs/
HDext2_ihash.c127 struct inode **ipp; in ext2_ihashins() local
132 ipp = INOHASH(ip->i_dev, ip->i_number); in ext2_ihashins()
133 while ((iq = *ipp) != NULL) { in ext2_ihashins()
138 ipp = &iq->i_next; in ext2_ihashins()
141 *ipp = ip; in ext2_ihashins()
153 struct inode **ipp; in ext2_ihashrem() local
158 ipp = INOHASH(ip->i_dev, ip->i_number); in ext2_ihashrem()
159 while ((iq = *ipp) != NULL) { in ext2_ihashrem()
162 ipp = &iq->i_next; in ext2_ihashrem()
165 *ipp = ip->i_next; in ext2_ihashrem()
/dragonfly/sys/vfs/ufs/
HDufs_ihash.c151 struct inode **ipp; in ufs_ihashins() local
155 ipp = INOHASH(ump, ip->i_number); in ufs_ihashins()
156 while ((iq = *ipp) != NULL) { in ufs_ihashins()
160 ipp = &iq->i_next; in ufs_ihashins()
163 *ipp = ip; in ufs_ihashins()
174 struct inode **ipp; in ufs_ihashrem() local
178 ipp = INOHASH(ump, ip->i_number); in ufs_ihashrem()
179 while ((iq = *ipp) != NULL) { in ufs_ihashrem()
182 ipp = &iq->i_next; in ufs_ihashrem()
185 *ipp = ip->i_next; in ufs_ihashrem()
/dragonfly/sys/vfs/isofs/cd9660/
HDcd9660_node.c145 struct iso_node **ipp, *iq; in cd9660_ihashins() local
148 ipp = &isohashtbl[INOHASH(ip->i_dev, ip->i_number)]; in cd9660_ihashins()
149 while ((iq = *ipp) != NULL) { in cd9660_ihashins()
154 ipp = &iq->i_next; in cd9660_ihashins()
157 *ipp = ip; in cd9660_ihashins()
168 struct iso_node **ipp, *iq; in cd9660_ihashrem() local
171 ipp = &isohashtbl[INOHASH(ip->i_dev, ip->i_number)]; in cd9660_ihashrem()
172 while ((iq = *ipp) != NULL) { in cd9660_ihashrem()
175 ipp = &iq->i_next; in cd9660_ihashrem()
178 *ipp = ip->i_next; in cd9660_ihashrem()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
HDdcn10_ipp.c44 static void dcn10_ipp_destroy(struct input_pixel_processor **ipp) in dcn10_ipp_destroy() argument
46 kfree(TO_DCN10_IPP(*ipp)); in dcn10_ipp_destroy()
47 *ipp = NULL; in dcn10_ipp_destroy()
HDdcn10_ipp.h31 #define TO_DCN10_IPP(ipp)\ argument
32 container_of(ipp, struct dcn10_ipp, base)
HDdcn10_resource.c567 struct dcn10_ipp *ipp = in dcn10_ipp_create() local
570 if (!ipp) { in dcn10_ipp_create()
575 dcn10_ipp_construct(ipp, ctx, inst, in dcn10_ipp_create()
577 return &ipp->base; in dcn10_ipp_create()
1043 idle_pipe->plane_res.ipp = pool->ipps[idle_pipe->pipe_idx]; in dcn10_acquire_idle_pipe_for_layer()
/dragonfly/sys/vfs/ntfs/
HDntfs_ihash.c111 struct nthashhead *ipp; in ntfs_nthashins() local
114 ipp = NTNOHASH(ip->i_dev, ip->i_number); in ntfs_nthashins()
115 LIST_INSERT_HEAD(ipp, ip, i_hash); in ntfs_nthashins()
HDntfs_subr.c362 ntfs_ntlookup(struct ntfsmount *ntmp, ino_t ino, struct ntnode **ipp) in ntfs_ntlookup() argument
373 *ipp = ip; in ntfs_ntlookup()
399 *ipp = ip; in ntfs_ntlookup()
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
HDdce110_hw_sequencer.c270 struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; in dce110_set_input_transfer_func() local
275 if (ipp == NULL) in dce110_set_input_transfer_func()
282 ipp->funcs->ipp_program_prescale(ipp, &prescale_params); in dce110_set_input_transfer_func()
287 ipp->funcs->ipp_program_input_lut(ipp, plane_state->gamma_correction); in dce110_set_input_transfer_func()
291 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); in dce110_set_input_transfer_func()
295 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); in dce110_set_input_transfer_func()
298 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC); in dce110_set_input_transfer_func()
301 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func()
309 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func()
2832 struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; in dce110_set_cursor_position() local
[all …]
HDdce110_resource.c554 struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); in dce110_ipp_create() local
556 if (!ipp) { in dce110_ipp_create()
561 dce_ipp_construct(ipp, ctx, inst, in dce110_ipp_create()
563 return &ipp->base; in dce110_ipp_create()
/dragonfly/sys/kern/
HDsys_pipe.c229 pipe_start_uio(int *ipp) in pipe_start_uio() argument
233 while (*ipp) { in pipe_start_uio()
234 *ipp = -1; in pipe_start_uio()
235 error = tsleep(ipp, PCATCH, "pipexx", 0); in pipe_start_uio()
239 *ipp = 1; in pipe_start_uio()
244 pipe_end_uio(int *ipp) in pipe_end_uio() argument
246 if (*ipp < 0) { in pipe_end_uio()
247 *ipp = 0; in pipe_end_uio()
248 wakeup(ipp); in pipe_end_uio()
250 KKASSERT(*ipp > 0); in pipe_end_uio()
[all …]
/dragonfly/sys/dev/drm/amd/display/dc/dce100/
HDdce100_resource.c538 struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); in dce100_ipp_create() local
540 if (!ipp) { in dce100_ipp_create()
545 dce_ipp_construct(ipp, ctx, inst, in dce100_ipp_create()
547 return &ipp->base; in dce100_ipp_create()
/dragonfly/sys/dev/drm/amd/display/dc/dce120/
HDdce120_resource.c600 struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); in dce120_ipp_create() local
602 if (!ipp) { in dce120_ipp_create()
607 dce_ipp_construct(ipp, ctx, inst, in dce120_ipp_create()
609 return &ipp->base; in dce120_ipp_create()
/dragonfly/sys/dev/drm/amd/display/dc/dce112/
HDdce112_resource.c584 struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); in dce112_ipp_create() local
586 if (!ipp) { in dce112_ipp_create()
591 dce_ipp_construct(ipp, ctx, inst, in dce112_ipp_create()
593 return &ipp->base; in dce112_ipp_create()
/dragonfly/sys/dev/drm/amd/display/dc/dce80/
HDdce80_resource.c662 struct dce_ipp *ipp = kzalloc(sizeof(struct dce_ipp), GFP_KERNEL); in dce80_ipp_create() local
664 if (!ipp) { in dce80_ipp_create()
669 dce_ipp_construct(ipp, ctx, inst, in dce80_ipp_create()
671 return &ipp->base; in dce80_ipp_create()
/dragonfly/sys/dev/drm/amd/display/dc/inc/
HDcore_types.h201 struct input_pixel_processor *ipp; member
/dragonfly/sys/dev/drm/amd/display/dc/core/
HDdc_stream.c257 !pipe_ctx->plane_res.ipp) in dc_stream_set_cursor_position()
HDdc_resource.c1272 pipe_ctx->plane_res.ipp = pool->ipps[i]; in acquire_first_split_pipe()
1643 pipe_ctx->plane_res.ipp = pool->ipps[i]; in acquire_first_free_pipe()
/dragonfly/sys/vfs/hammer/
HDhammer_inode.c762 hammer_pseudofs_inmem_t pfsm, hammer_inode_t *ipp) in hammer_create_inode() argument
779 *ipp = NULL; in hammer_create_inode()
935 *ipp = ip; in hammer_create_inode()
HDhammer.h1259 hammer_inode_t *ipp);
/dragonfly/sys/dev/drm/amd/display/dc/calcs/
HDdcn_calcs.c512 secondary_pipe->plane_res.ipp = pool->ipps[secondary_pipe->pipe_idx]; in split_stream_across_pipes()
/dragonfly/etc/
HDservices1162 ipp 631/tcp #IPP (Internet Printing Protocol)
1163 ipp 631/udp #IPP (Internet Printing Protocol)