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Searched refs:Src1Reg (Results 1 – 9 of 9) sorted by relevance

/NextBSD/contrib/llvm/lib/Target/Hexagon/MCTargetDesc/
HDHexagonMCCompound.cpp84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
101 Src1Reg = MI.getOperand(1).getReg(); in getCompoundCandidateGroup()
104 HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) && in getCompoundCandidateGroup()
146 Src1Reg = MI.getOperand(1).getReg(); in getCompoundCandidateGroup()
149 HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) && in getCompoundCandidateGroup()
161 Src1Reg = MI.getOperand(0).getReg(); in getCompoundCandidateGroup()
162 if (Hexagon::P0 == Src1Reg || Hexagon::P1 == Src1Reg) in getCompoundCandidateGroup()
HDHexagonMCDuplexInfo.cpp182 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
325 Src1Reg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
327 if (HexagonMCInstrInfo::isIntReg(Src1Reg) && in getDuplexCandidateGroup()
329 Hexagon::R29 == Src1Reg && MCI.getOperand(1).isImm() && in getDuplexCandidateGroup()
334 if (HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) && in getDuplexCandidateGroup()
343 Src1Reg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
345 if (HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) && in getDuplexCandidateGroup()
362 Src1Reg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
364 if (HexagonMCInstrInfo::isIntRegForSubInst(Src1Reg) && in getDuplexCandidateGroup()
373 Src1Reg = MCI.getOperand(0).getReg(); in getDuplexCandidateGroup()
[all …]
/NextBSD/contrib/llvm/lib/Target/ARM/
HDMLxExpansionPass.cpp278 unsigned Src1Reg = MI->getOperand(2).getReg(); in ExpandFPMLxInstruction() local
294 .addReg(Src1Reg, getKillRegState(Src1Kill)) in ExpandFPMLxInstruction()
/NextBSD/contrib/llvm/lib/Target/Mips/
HDMipsFastISel.cpp978 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
982 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
1000 .addReg(Src1Reg).addReg(ZExtCondReg).addReg(TempReg); in selectSelect()
1671 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectDivRem() local
1672 if (!Src0Reg || !Src1Reg) in selectDivRem()
1675 emitInst(DivOpc).addReg(Src0Reg).addReg(Src1Reg); in selectDivRem()
1676 emitInst(Mips::TEQ).addReg(Src1Reg).addReg(Mips::ZERO).addImm(7); in selectDivRem()
/NextBSD/contrib/llvm/lib/Target/Hexagon/
HDHexagonInstrInfo.cpp725 unsigned Src1Reg = MI->getOperand(1).getReg(); in expandPostRAPseudo() local
727 unsigned Src1SubHi = TRI.getSubReg(Src1Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
728 unsigned Src1SubLo = TRI.getSubReg(Src1Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
747 unsigned Src1Reg = MI->getOperand(1).getReg(); in expandPostRAPseudo() local
750 unsigned Src1SubHi = TRI.getSubReg(Src1Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
751 unsigned Src1SubLo = TRI.getSubReg(Src1Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
/NextBSD/contrib/llvm/lib/Target/AArch64/
HDAArch64FastISel.cpp2573 unsigned Src1Reg = getRegForValue(Src1Val); in optimizeSelect() local
2574 if (!Src1Reg) in optimizeSelect()
2584 Src1Reg = emitLogicalOp_ri(ISD::XOR, MVT::i32, Src1Reg, Src1IsKill, 1); in optimizeSelect()
2587 unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32RegClass, Src1Reg, in optimizeSelect()
2703 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
2709 if (!Src1Reg || !Src2Reg) in selectSelect()
2713 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
2717 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
4489 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectRem() local
4490 if (!Src1Reg) in selectRem()
[all …]
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDR600InstrInfo.h246 unsigned Src1Reg = 0) const;
HDR600InstrInfo.cpp1180 unsigned Src1Reg) const { in buildDefaultInstruction()
1184 if (Src1Reg) { in buildDefaultInstruction()
1198 if (Src1Reg) { in buildDefaultInstruction()
1199 MIB.addReg(Src1Reg) // $src1 in buildDefaultInstruction()
HDSIInstrInfo.cpp970 unsigned Src1Reg = Src1->getReg(); in FoldImmediate() local
974 Src0->setReg(Src1Reg); in FoldImmediate()