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Searched refs:LoadVT (Results 1 – 7 of 7) sorted by relevance

/NextBSD/contrib/llvm/lib/CodeGen/SelectionDAG/
HDLegalizeVectorOps.cpp531 EVT LoadVT = WideVT; in ExpandLoad() local
534 LoadVT = EVT::getIntegerVT(*DAG.getContext(), LoadBytes << 3); in ExpandLoad()
538 LoadVT, LD->isVolatile(), in ExpandLoad()
HDSelectionDAGBuilder.cpp5178 static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT, in getMemCmpLoad() argument
5209 SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurSDLoc(), Root, in getMemCmpLoad()
5273 MVT LoadVT; in visitMemCmpCall() local
5277 LoadVT = MVT::Other; in visitMemCmpCall()
5282 LoadVT = MVT::i16; in visitMemCmpCall()
5286 LoadVT = MVT::i32; in visitMemCmpCall()
5290 LoadVT = MVT::i64; in visitMemCmpCall()
5316 if (!TLI.isTypeLegal(LoadVT) || in visitMemCmpCall()
5317 !TLI.allowsMisalignedMemoryAccesses(LoadVT, SrcAS) || in visitMemCmpCall()
5318 !TLI.allowsMisalignedMemoryAccesses(LoadVT, DstAS)) in visitMemCmpCall()
[all …]
HDLegalizeDAG.cpp1114 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps() local
1116 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps()
1120 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps()
1122 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps()
/NextBSD/contrib/llvm/lib/Target/AMDGPU/
HDSIISelLowering.cpp1461 EVT LoadVT = getEquivalentMemType(*DAG.getContext(), SrcVT); in performUCharToFloatCombine() local
1468 Type *Ty = LoadVT.getTypeForEVT(*DAG.getContext()); in performUCharToFloatCombine()
1475 !allowsMisalignedMemoryAccesses(LoadVT, AS, Align, nullptr)) { in performUCharToFloatCombine()
1482 LoadVT, in performUCharToFloatCombine()
HDAMDGPUISelLowering.cpp1215 EVT LoadVT = Op.getValueType(); in ScalarizeVectorLoad() local
1216 EVT EltVT = LoadVT.getVectorElementType(); in ScalarizeVectorLoad()
1242 DAG.getNode(ISD::BUILD_VECTOR, SL, LoadVT, Loads), in ScalarizeVectorLoad()
2402 EVT LoadVT = getEquivalentMemType(*DAG.getContext(), MemVT); in performStoreCombine() local
2405 LoadVT, SL, in performStoreCombine()
2409 LoadVT, in performStoreCombine()
/NextBSD/contrib/llvm/lib/CodeGen/
HDCodeGenPrepare.cpp3748 EVT LoadVT = TLI->getValueType(*DL, LI->getType()); in MoveExtToFormExtLoad() local
3753 (TLI->isTypeLegal(LoadVT) || !TLI->isTypeLegal(VT)) && in MoveExtToFormExtLoad()
3768 if (TLI && !TLI->isLoadExtLegal(LType, VT, LoadVT)) { in MoveExtToFormExtLoad()
/NextBSD/contrib/llvm/lib/Target/PowerPC/
HDPPCISelLowering.cpp10201 MVT LoadVT = VT.getSimpleVT(); in PerformDAGCombine() local
10203 (LoadVT == MVT::v2f64 || LoadVT == MVT::v2i64 || in PerformDAGCombine()
10204 LoadVT == MVT::v4f32 || LoadVT == MVT::v4i32)) in PerformDAGCombine()