1 /*-
2 * Copyright (c) 2018 Emmanuel Vadot <manu@freebsd.org>
3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: stable/12/sys/arm/allwinner/axp81x.c 362350 2020-06-18 23:21:12Z manu $
28 */
29
30 /*
31 * X-Powers AXP803/813/818 PMU for Allwinner SoCs
32 */
33
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD: stable/12/sys/arm/allwinner/axp81x.c 362350 2020-06-18 23:21:12Z manu $");
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/eventhandler.h>
40 #include <sys/bus.h>
41 #include <sys/rman.h>
42 #include <sys/kernel.h>
43 #include <sys/reboot.h>
44 #include <sys/gpio.h>
45 #include <sys/module.h>
46 #include <machine/bus.h>
47
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/iicbus/iiconf.h>
50
51 #include <dev/gpio/gpiobusvar.h>
52
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
55
56 #include <dev/extres/regulator/regulator.h>
57
58 #include "gpio_if.h"
59 #include "iicbus_if.h"
60 #include "regdev_if.h"
61
62 MALLOC_DEFINE(M_AXP8XX_REG, "AXP8xx regulator", "AXP8xx power regulator");
63
64 #define AXP_POWERSRC 0x00
65 #define AXP_POWERSRC_ACIN (1 << 7)
66 #define AXP_POWERSRC_VBUS (1 << 5)
67 #define AXP_POWERSRC_VBAT (1 << 3)
68 #define AXP_POWERSRC_CHARING (1 << 2) /* Charging Direction */
69 #define AXP_POWERSRC_SHORTED (1 << 1)
70 #define AXP_POWERSRC_STARTUP (1 << 0)
71 #define AXP_POWERMODE 0x01
72 #define AXP_POWERMODE_BAT_CHARGING (1 << 6)
73 #define AXP_POWERMODE_BAT_PRESENT (1 << 5)
74 #define AXP_POWERMODE_BAT_VALID (1 << 4)
75 #define AXP_ICTYPE 0x03
76 #define AXP_POWERCTL1 0x10
77 #define AXP_POWERCTL1_DCDC7 (1 << 6) /* AXP813/818 only */
78 #define AXP_POWERCTL1_DCDC6 (1 << 5)
79 #define AXP_POWERCTL1_DCDC5 (1 << 4)
80 #define AXP_POWERCTL1_DCDC4 (1 << 3)
81 #define AXP_POWERCTL1_DCDC3 (1 << 2)
82 #define AXP_POWERCTL1_DCDC2 (1 << 1)
83 #define AXP_POWERCTL1_DCDC1 (1 << 0)
84 #define AXP_POWERCTL2 0x12
85 #define AXP_POWERCTL2_DC1SW (1 << 7) /* AXP803 only */
86 #define AXP_POWERCTL2_DLDO4 (1 << 6)
87 #define AXP_POWERCTL2_DLDO3 (1 << 5)
88 #define AXP_POWERCTL2_DLDO2 (1 << 4)
89 #define AXP_POWERCTL2_DLDO1 (1 << 3)
90 #define AXP_POWERCTL2_ELDO3 (1 << 2)
91 #define AXP_POWERCTL2_ELDO2 (1 << 1)
92 #define AXP_POWERCTL2_ELDO1 (1 << 0)
93 #define AXP_POWERCTL3 0x13
94 #define AXP_POWERCTL3_ALDO3 (1 << 7)
95 #define AXP_POWERCTL3_ALDO2 (1 << 6)
96 #define AXP_POWERCTL3_ALDO1 (1 << 5)
97 #define AXP_POWERCTL3_FLDO3 (1 << 4) /* AXP813/818 only */
98 #define AXP_POWERCTL3_FLDO2 (1 << 3)
99 #define AXP_POWERCTL3_FLDO1 (1 << 2)
100 #define AXP_VOLTCTL_DLDO1 0x15
101 #define AXP_VOLTCTL_DLDO2 0x16
102 #define AXP_VOLTCTL_DLDO3 0x17
103 #define AXP_VOLTCTL_DLDO4 0x18
104 #define AXP_VOLTCTL_ELDO1 0x19
105 #define AXP_VOLTCTL_ELDO2 0x1A
106 #define AXP_VOLTCTL_ELDO3 0x1B
107 #define AXP_VOLTCTL_FLDO1 0x1C
108 #define AXP_VOLTCTL_FLDO2 0x1D
109 #define AXP_VOLTCTL_DCDC1 0x20
110 #define AXP_VOLTCTL_DCDC2 0x21
111 #define AXP_VOLTCTL_DCDC3 0x22
112 #define AXP_VOLTCTL_DCDC4 0x23
113 #define AXP_VOLTCTL_DCDC5 0x24
114 #define AXP_VOLTCTL_DCDC6 0x25
115 #define AXP_VOLTCTL_DCDC7 0x26
116 #define AXP_VOLTCTL_ALDO1 0x28
117 #define AXP_VOLTCTL_ALDO2 0x29
118 #define AXP_VOLTCTL_ALDO3 0x2A
119 #define AXP_VOLTCTL_STATUS (1 << 7)
120 #define AXP_VOLTCTL_MASK 0x7f
121 #define AXP_POWERBAT 0x32
122 #define AXP_POWERBAT_SHUTDOWN (1 << 7)
123 #define AXP_CHARGERCTL1 0x33
124 #define AXP_CHARGERCTL1_MIN 0
125 #define AXP_CHARGERCTL1_MAX 13
126 #define AXP_CHARGERCTL1_CMASK 0xf
127 #define AXP_IRQEN1 0x40
128 #define AXP_IRQEN1_ACIN_HI (1 << 6)
129 #define AXP_IRQEN1_ACIN_LO (1 << 5)
130 #define AXP_IRQEN1_VBUS_HI (1 << 3)
131 #define AXP_IRQEN1_VBUS_LO (1 << 2)
132 #define AXP_IRQEN2 0x41
133 #define AXP_IRQEN2_BAT_IN (1 << 7)
134 #define AXP_IRQEN2_BAT_NO (1 << 6)
135 #define AXP_IRQEN2_BATCHGC (1 << 3)
136 #define AXP_IRQEN2_BATCHGD (1 << 2)
137 #define AXP_IRQEN3 0x42
138 #define AXP_IRQEN4 0x43
139 #define AXP_IRQEN4_BATLVL_LO1 (1 << 1)
140 #define AXP_IRQEN4_BATLVL_LO0 (1 << 0)
141 #define AXP_IRQEN5 0x44
142 #define AXP_IRQEN5_POKSIRQ (1 << 4)
143 #define AXP_IRQEN5_POKLIRQ (1 << 3)
144 #define AXP_IRQEN6 0x45
145 #define AXP_IRQSTAT1 0x48
146 #define AXP_IRQSTAT1_ACIN_HI (1 << 6)
147 #define AXP_IRQSTAT1_ACIN_LO (1 << 5)
148 #define AXP_IRQSTAT1_VBUS_HI (1 << 3)
149 #define AXP_IRQSTAT1_VBUS_LO (1 << 2)
150 #define AXP_IRQSTAT2 0x49
151 #define AXP_IRQSTAT2_BAT_IN (1 << 7)
152 #define AXP_IRQSTAT2_BAT_NO (1 << 6)
153 #define AXP_IRQSTAT2_BATCHGC (1 << 3)
154 #define AXP_IRQSTAT2_BATCHGD (1 << 2)
155 #define AXP_IRQSTAT3 0x4a
156 #define AXP_IRQSTAT4 0x4b
157 #define AXP_IRQSTAT4_BATLVL_LO1 (1 << 1)
158 #define AXP_IRQSTAT4_BATLVL_LO0 (1 << 0)
159 #define AXP_IRQSTAT5 0x4c
160 #define AXP_IRQSTAT5_POKSIRQ (1 << 4)
161 #define AXP_IRQEN5_POKLIRQ (1 << 3)
162 #define AXP_IRQSTAT6 0x4d
163 #define AXP_BATSENSE_HI 0x78
164 #define AXP_BATSENSE_LO 0x79
165 #define AXP_BATCHG_HI 0x7a
166 #define AXP_BATCHG_LO 0x7b
167 #define AXP_BATDISCHG_HI 0x7c
168 #define AXP_BATDISCHG_LO 0x7d
169 #define AXP_GPIO0_CTRL 0x90
170 #define AXP_GPIO0LDO_CTRL 0x91
171 #define AXP_GPIO1_CTRL 0x92
172 #define AXP_GPIO1LDO_CTRL 0x93
173 #define AXP_GPIO_FUNC (0x7 << 0)
174 #define AXP_GPIO_FUNC_SHIFT 0
175 #define AXP_GPIO_FUNC_DRVLO 0
176 #define AXP_GPIO_FUNC_DRVHI 1
177 #define AXP_GPIO_FUNC_INPUT 2
178 #define AXP_GPIO_FUNC_LDO_ON 3
179 #define AXP_GPIO_FUNC_LDO_OFF 4
180 #define AXP_GPIO_SIGBIT 0x94
181 #define AXP_GPIO_PD 0x97
182 #define AXP_FUEL_GAUGECTL 0xb8
183 #define AXP_FUEL_GAUGECTL_EN (1 << 7)
184
185 #define AXP_BAT_CAP 0xb9
186 #define AXP_BAT_CAP_VALID (1 << 7)
187 #define AXP_BAT_CAP_PERCENT 0x7f
188
189 #define AXP_BAT_MAX_CAP_HI 0xe0
190 #define AXP_BAT_MAX_CAP_VALID (1 << 7)
191 #define AXP_BAT_MAX_CAP_LO 0xe1
192
193 #define AXP_BAT_COULOMB_HI 0xe2
194 #define AXP_BAT_COULOMB_VALID (1 << 7)
195 #define AXP_BAT_COULOMB_LO 0xe3
196
197 #define AXP_BAT_CAP_WARN 0xe6
198 #define AXP_BAT_CAP_WARN_LV1 0xf0 /* Bits 4, 5, 6, 7 */
199 #define AXP_BAP_CAP_WARN_LV1BASE 5 /* 5-20%, 1% per step */
200 #define AXP_BAT_CAP_WARN_LV2 0xf /* Bits 0, 1, 2, 3 */
201
202 /* Sensor conversion macros */
203 #define AXP_SENSOR_BAT_H(hi) ((hi) << 4)
204 #define AXP_SENSOR_BAT_L(lo) ((lo) & 0xf)
205 #define AXP_SENSOR_COULOMB(hi, lo) (((hi & ~(1 << 7)) << 8) | (lo))
206
207 static const struct {
208 const char *name;
209 uint8_t ctrl_reg;
210 } axp8xx_pins[] = {
211 { "GPIO0", AXP_GPIO0_CTRL },
212 { "GPIO1", AXP_GPIO1_CTRL },
213 };
214
215 enum AXP8XX_TYPE {
216 AXP803 = 1,
217 AXP813,
218 };
219
220 static struct ofw_compat_data compat_data[] = {
221 { "x-powers,axp803", AXP803 },
222 { "x-powers,axp813", AXP813 },
223 { "x-powers,axp818", AXP813 },
224 { NULL, 0 }
225 };
226
227 static struct resource_spec axp8xx_spec[] = {
228 { SYS_RES_IRQ, 0, RF_ACTIVE },
229 { -1, 0 }
230 };
231
232 struct axp8xx_regdef {
233 intptr_t id;
234 char *name;
235 char *supply_name;
236 uint8_t enable_reg;
237 uint8_t enable_mask;
238 uint8_t enable_value;
239 uint8_t disable_value;
240 uint8_t voltage_reg;
241 int voltage_min;
242 int voltage_max;
243 int voltage_step1;
244 int voltage_nstep1;
245 int voltage_step2;
246 int voltage_nstep2;
247 };
248
249 enum axp8xx_reg_id {
250 AXP8XX_REG_ID_DCDC1 = 100,
251 AXP8XX_REG_ID_DCDC2,
252 AXP8XX_REG_ID_DCDC3,
253 AXP8XX_REG_ID_DCDC4,
254 AXP8XX_REG_ID_DCDC5,
255 AXP8XX_REG_ID_DCDC6,
256 AXP813_REG_ID_DCDC7,
257 AXP803_REG_ID_DC1SW,
258 AXP8XX_REG_ID_DLDO1,
259 AXP8XX_REG_ID_DLDO2,
260 AXP8XX_REG_ID_DLDO3,
261 AXP8XX_REG_ID_DLDO4,
262 AXP8XX_REG_ID_ELDO1,
263 AXP8XX_REG_ID_ELDO2,
264 AXP8XX_REG_ID_ELDO3,
265 AXP8XX_REG_ID_ALDO1,
266 AXP8XX_REG_ID_ALDO2,
267 AXP8XX_REG_ID_ALDO3,
268 AXP8XX_REG_ID_FLDO1,
269 AXP8XX_REG_ID_FLDO2,
270 AXP813_REG_ID_FLDO3,
271 AXP8XX_REG_ID_GPIO0_LDO,
272 AXP8XX_REG_ID_GPIO1_LDO,
273 };
274
275 static struct axp8xx_regdef axp803_regdefs[] = {
276 {
277 .id = AXP803_REG_ID_DC1SW,
278 .name = "dc1sw",
279 .enable_reg = AXP_POWERCTL2,
280 .enable_mask = (uint8_t) AXP_POWERCTL2_DC1SW,
281 .enable_value = AXP_POWERCTL2_DC1SW,
282 },
283 };
284
285 static struct axp8xx_regdef axp813_regdefs[] = {
286 {
287 .id = AXP813_REG_ID_DCDC7,
288 .name = "dcdc7",
289 .enable_reg = AXP_POWERCTL1,
290 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC7,
291 .enable_value = AXP_POWERCTL1_DCDC7,
292 .voltage_reg = AXP_VOLTCTL_DCDC7,
293 .voltage_min = 600,
294 .voltage_max = 1520,
295 .voltage_step1 = 10,
296 .voltage_nstep1 = 50,
297 .voltage_step2 = 20,
298 .voltage_nstep2 = 21,
299 },
300 };
301
302 static struct axp8xx_regdef axp8xx_common_regdefs[] = {
303 {
304 .id = AXP8XX_REG_ID_DCDC1,
305 .name = "dcdc1",
306 .enable_reg = AXP_POWERCTL1,
307 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC1,
308 .enable_value = AXP_POWERCTL1_DCDC1,
309 .voltage_reg = AXP_VOLTCTL_DCDC1,
310 .voltage_min = 1600,
311 .voltage_max = 3400,
312 .voltage_step1 = 100,
313 .voltage_nstep1 = 18,
314 },
315 {
316 .id = AXP8XX_REG_ID_DCDC2,
317 .name = "dcdc2",
318 .enable_reg = AXP_POWERCTL1,
319 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC2,
320 .enable_value = AXP_POWERCTL1_DCDC2,
321 .voltage_reg = AXP_VOLTCTL_DCDC2,
322 .voltage_min = 500,
323 .voltage_max = 1300,
324 .voltage_step1 = 10,
325 .voltage_nstep1 = 70,
326 .voltage_step2 = 20,
327 .voltage_nstep2 = 5,
328 },
329 {
330 .id = AXP8XX_REG_ID_DCDC3,
331 .name = "dcdc3",
332 .enable_reg = AXP_POWERCTL1,
333 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC3,
334 .enable_value = AXP_POWERCTL1_DCDC3,
335 .voltage_reg = AXP_VOLTCTL_DCDC3,
336 .voltage_min = 500,
337 .voltage_max = 1300,
338 .voltage_step1 = 10,
339 .voltage_nstep1 = 70,
340 .voltage_step2 = 20,
341 .voltage_nstep2 = 5,
342 },
343 {
344 .id = AXP8XX_REG_ID_DCDC4,
345 .name = "dcdc4",
346 .enable_reg = AXP_POWERCTL1,
347 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC4,
348 .enable_value = AXP_POWERCTL1_DCDC4,
349 .voltage_reg = AXP_VOLTCTL_DCDC4,
350 .voltage_min = 500,
351 .voltage_max = 1300,
352 .voltage_step1 = 10,
353 .voltage_nstep1 = 70,
354 .voltage_step2 = 20,
355 .voltage_nstep2 = 5,
356 },
357 {
358 .id = AXP8XX_REG_ID_DCDC5,
359 .name = "dcdc5",
360 .enable_reg = AXP_POWERCTL1,
361 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC5,
362 .enable_value = AXP_POWERCTL1_DCDC5,
363 .voltage_reg = AXP_VOLTCTL_DCDC5,
364 .voltage_min = 800,
365 .voltage_max = 1840,
366 .voltage_step1 = 10,
367 .voltage_nstep1 = 42,
368 .voltage_step2 = 20,
369 .voltage_nstep2 = 36,
370 },
371 {
372 .id = AXP8XX_REG_ID_DCDC6,
373 .name = "dcdc6",
374 .enable_reg = AXP_POWERCTL1,
375 .enable_mask = (uint8_t) AXP_POWERCTL1_DCDC6,
376 .enable_value = AXP_POWERCTL1_DCDC6,
377 .voltage_reg = AXP_VOLTCTL_DCDC6,
378 .voltage_min = 600,
379 .voltage_max = 1520,
380 .voltage_step1 = 10,
381 .voltage_nstep1 = 50,
382 .voltage_step2 = 20,
383 .voltage_nstep2 = 21,
384 },
385 {
386 .id = AXP8XX_REG_ID_DLDO1,
387 .name = "dldo1",
388 .enable_reg = AXP_POWERCTL2,
389 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO1,
390 .enable_value = AXP_POWERCTL2_DLDO1,
391 .voltage_reg = AXP_VOLTCTL_DLDO1,
392 .voltage_min = 700,
393 .voltage_max = 3300,
394 .voltage_step1 = 100,
395 .voltage_nstep1 = 26,
396 },
397 {
398 .id = AXP8XX_REG_ID_DLDO2,
399 .name = "dldo2",
400 .enable_reg = AXP_POWERCTL2,
401 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO2,
402 .enable_value = AXP_POWERCTL2_DLDO2,
403 .voltage_reg = AXP_VOLTCTL_DLDO2,
404 .voltage_min = 700,
405 .voltage_max = 4200,
406 .voltage_step1 = 100,
407 .voltage_nstep1 = 27,
408 .voltage_step2 = 200,
409 .voltage_nstep2 = 4,
410 },
411 {
412 .id = AXP8XX_REG_ID_DLDO3,
413 .name = "dldo3",
414 .enable_reg = AXP_POWERCTL2,
415 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO3,
416 .enable_value = AXP_POWERCTL2_DLDO3,
417 .voltage_reg = AXP_VOLTCTL_DLDO3,
418 .voltage_min = 700,
419 .voltage_max = 3300,
420 .voltage_step1 = 100,
421 .voltage_nstep1 = 26,
422 },
423 {
424 .id = AXP8XX_REG_ID_DLDO4,
425 .name = "dldo4",
426 .enable_reg = AXP_POWERCTL2,
427 .enable_mask = (uint8_t) AXP_POWERCTL2_DLDO4,
428 .enable_value = AXP_POWERCTL2_DLDO4,
429 .voltage_reg = AXP_VOLTCTL_DLDO4,
430 .voltage_min = 700,
431 .voltage_max = 3300,
432 .voltage_step1 = 100,
433 .voltage_nstep1 = 26,
434 },
435 {
436 .id = AXP8XX_REG_ID_ALDO1,
437 .name = "aldo1",
438 .enable_reg = AXP_POWERCTL3,
439 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO1,
440 .enable_value = AXP_POWERCTL3_ALDO1,
441 .voltage_reg = AXP_VOLTCTL_ALDO1,
442 .voltage_min = 700,
443 .voltage_max = 3300,
444 .voltage_step1 = 100,
445 .voltage_nstep1 = 26,
446 },
447 {
448 .id = AXP8XX_REG_ID_ALDO2,
449 .name = "aldo2",
450 .enable_reg = AXP_POWERCTL3,
451 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO2,
452 .enable_value = AXP_POWERCTL3_ALDO2,
453 .voltage_reg = AXP_VOLTCTL_ALDO2,
454 .voltage_min = 700,
455 .voltage_max = 3300,
456 .voltage_step1 = 100,
457 .voltage_nstep1 = 26,
458 },
459 {
460 .id = AXP8XX_REG_ID_ALDO3,
461 .name = "aldo3",
462 .enable_reg = AXP_POWERCTL3,
463 .enable_mask = (uint8_t) AXP_POWERCTL3_ALDO3,
464 .enable_value = AXP_POWERCTL3_ALDO3,
465 .voltage_reg = AXP_VOLTCTL_ALDO3,
466 .voltage_min = 700,
467 .voltage_max = 3300,
468 .voltage_step1 = 100,
469 .voltage_nstep1 = 26,
470 },
471 {
472 .id = AXP8XX_REG_ID_ELDO1,
473 .name = "eldo1",
474 .enable_reg = AXP_POWERCTL2,
475 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO1,
476 .enable_value = AXP_POWERCTL2_ELDO1,
477 .voltage_reg = AXP_VOLTCTL_ELDO1,
478 .voltage_min = 700,
479 .voltage_max = 1900,
480 .voltage_step1 = 50,
481 .voltage_nstep1 = 24,
482 },
483 {
484 .id = AXP8XX_REG_ID_ELDO2,
485 .name = "eldo2",
486 .enable_reg = AXP_POWERCTL2,
487 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO2,
488 .enable_value = AXP_POWERCTL2_ELDO2,
489 .voltage_reg = AXP_VOLTCTL_ELDO2,
490 .voltage_min = 700,
491 .voltage_max = 1900,
492 .voltage_step1 = 50,
493 .voltage_nstep1 = 24,
494 },
495 {
496 .id = AXP8XX_REG_ID_ELDO3,
497 .name = "eldo3",
498 .enable_reg = AXP_POWERCTL2,
499 .enable_mask = (uint8_t) AXP_POWERCTL2_ELDO3,
500 .enable_value = AXP_POWERCTL2_ELDO3,
501 .voltage_reg = AXP_VOLTCTL_ELDO3,
502 .voltage_min = 700,
503 .voltage_max = 1900,
504 .voltage_step1 = 50,
505 .voltage_nstep1 = 24,
506 },
507 {
508 .id = AXP8XX_REG_ID_FLDO1,
509 .name = "fldo1",
510 .enable_reg = AXP_POWERCTL3,
511 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO1,
512 .enable_value = AXP_POWERCTL3_FLDO1,
513 .voltage_reg = AXP_VOLTCTL_FLDO1,
514 .voltage_min = 700,
515 .voltage_max = 1450,
516 .voltage_step1 = 50,
517 .voltage_nstep1 = 15,
518 },
519 {
520 .id = AXP8XX_REG_ID_FLDO2,
521 .name = "fldo2",
522 .enable_reg = AXP_POWERCTL3,
523 .enable_mask = (uint8_t) AXP_POWERCTL3_FLDO2,
524 .enable_value = AXP_POWERCTL3_FLDO2,
525 .voltage_reg = AXP_VOLTCTL_FLDO2,
526 .voltage_min = 700,
527 .voltage_max = 1450,
528 .voltage_step1 = 50,
529 .voltage_nstep1 = 15,
530 },
531 {
532 .id = AXP8XX_REG_ID_GPIO0_LDO,
533 .name = "ldo-io0",
534 .enable_reg = AXP_GPIO0_CTRL,
535 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
536 .enable_value = AXP_GPIO_FUNC_LDO_ON,
537 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
538 .voltage_reg = AXP_GPIO0LDO_CTRL,
539 .voltage_min = 700,
540 .voltage_max = 3300,
541 .voltage_step1 = 100,
542 .voltage_nstep1 = 26,
543 },
544 {
545 .id = AXP8XX_REG_ID_GPIO1_LDO,
546 .name = "ldo-io1",
547 .enable_reg = AXP_GPIO1_CTRL,
548 .enable_mask = (uint8_t) AXP_GPIO_FUNC,
549 .enable_value = AXP_GPIO_FUNC_LDO_ON,
550 .disable_value = AXP_GPIO_FUNC_LDO_OFF,
551 .voltage_reg = AXP_GPIO1LDO_CTRL,
552 .voltage_min = 700,
553 .voltage_max = 3300,
554 .voltage_step1 = 100,
555 .voltage_nstep1 = 26,
556 },
557 };
558
559 enum axp8xx_sensor {
560 AXP_SENSOR_ACIN_PRESENT,
561 AXP_SENSOR_VBUS_PRESENT,
562 AXP_SENSOR_BATT_PRESENT,
563 AXP_SENSOR_BATT_CHARGING,
564 AXP_SENSOR_BATT_CHARGE_STATE,
565 AXP_SENSOR_BATT_VOLTAGE,
566 AXP_SENSOR_BATT_CHARGE_CURRENT,
567 AXP_SENSOR_BATT_DISCHARGE_CURRENT,
568 AXP_SENSOR_BATT_CAPACITY_PERCENT,
569 AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
570 AXP_SENSOR_BATT_CURRENT_CAPACITY,
571 };
572
573 enum battery_capacity_state {
574 BATT_CAPACITY_NORMAL = 1, /* normal cap in battery */
575 BATT_CAPACITY_WARNING, /* warning cap in battery */
576 BATT_CAPACITY_CRITICAL, /* critical cap in battery */
577 BATT_CAPACITY_HIGH, /* high cap in battery */
578 BATT_CAPACITY_MAX, /* maximum cap in battery */
579 BATT_CAPACITY_LOW /* low cap in battery */
580 };
581
582 struct axp8xx_sensors {
583 int id;
584 const char *name;
585 const char *desc;
586 const char *format;
587 };
588
589 static const struct axp8xx_sensors axp8xx_common_sensors[] = {
590 {
591 .id = AXP_SENSOR_ACIN_PRESENT,
592 .name = "acin",
593 .format = "I",
594 .desc = "ACIN Present",
595 },
596 {
597 .id = AXP_SENSOR_VBUS_PRESENT,
598 .name = "vbus",
599 .format = "I",
600 .desc = "VBUS Present",
601 },
602 {
603 .id = AXP_SENSOR_BATT_PRESENT,
604 .name = "bat",
605 .format = "I",
606 .desc = "Battery Present",
607 },
608 {
609 .id = AXP_SENSOR_BATT_CHARGING,
610 .name = "batcharging",
611 .format = "I",
612 .desc = "Battery Charging",
613 },
614 {
615 .id = AXP_SENSOR_BATT_CHARGE_STATE,
616 .name = "batchargestate",
617 .format = "I",
618 .desc = "Battery Charge State",
619 },
620 {
621 .id = AXP_SENSOR_BATT_VOLTAGE,
622 .name = "batvolt",
623 .format = "I",
624 .desc = "Battery Voltage",
625 },
626 {
627 .id = AXP_SENSOR_BATT_CHARGE_CURRENT,
628 .name = "batchargecurrent",
629 .format = "I",
630 .desc = "Average Battery Charging Current",
631 },
632 {
633 .id = AXP_SENSOR_BATT_DISCHARGE_CURRENT,
634 .name = "batdischargecurrent",
635 .format = "I",
636 .desc = "Average Battery Discharging Current",
637 },
638 {
639 .id = AXP_SENSOR_BATT_CAPACITY_PERCENT,
640 .name = "batcapacitypercent",
641 .format = "I",
642 .desc = "Battery Capacity Percentage",
643 },
644 {
645 .id = AXP_SENSOR_BATT_MAXIMUM_CAPACITY,
646 .name = "batmaxcapacity",
647 .format = "I",
648 .desc = "Battery Maximum Capacity",
649 },
650 {
651 .id = AXP_SENSOR_BATT_CURRENT_CAPACITY,
652 .name = "batcurrentcapacity",
653 .format = "I",
654 .desc = "Battery Current Capacity",
655 },
656 };
657
658 struct axp8xx_config {
659 const char *name;
660 int batsense_step; /* uV */
661 int charge_step; /* uA */
662 int discharge_step; /* uA */
663 int maxcap_step; /* uAh */
664 int coulomb_step; /* uAh */
665 };
666
667 static struct axp8xx_config axp803_config = {
668 .name = "AXP803",
669 .batsense_step = 1100,
670 .charge_step = 1000,
671 .discharge_step = 1000,
672 .maxcap_step = 1456,
673 .coulomb_step = 1456,
674 };
675
676 struct axp8xx_softc;
677
678 struct axp8xx_reg_sc {
679 struct regnode *regnode;
680 device_t base_dev;
681 struct axp8xx_regdef *def;
682 phandle_t xref;
683 struct regnode_std_param *param;
684 };
685
686 struct axp8xx_softc {
687 struct resource *res;
688 uint16_t addr;
689 void *ih;
690 device_t gpiodev;
691 struct mtx mtx;
692 int busy;
693
694 int type;
695
696 /* Configs */
697 const struct axp8xx_config *config;
698
699 /* Sensors */
700 const struct axp8xx_sensors *sensors;
701 int nsensors;
702
703 /* Regulators */
704 struct axp8xx_reg_sc **regs;
705 int nregs;
706
707 /* Warning, shutdown thresholds */
708 int warn_thres;
709 int shut_thres;
710 };
711
712 #define AXP_LOCK(sc) mtx_lock(&(sc)->mtx)
713 #define AXP_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
714 static int axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
715 int max_uvolt, int *udelay);
716
717 static int
axp8xx_read(device_t dev,uint8_t reg,uint8_t * data,uint8_t size)718 axp8xx_read(device_t dev, uint8_t reg, uint8_t *data, uint8_t size)
719 {
720 struct axp8xx_softc *sc;
721 struct iic_msg msg[2];
722
723 sc = device_get_softc(dev);
724
725 msg[0].slave = sc->addr;
726 msg[0].flags = IIC_M_WR;
727 msg[0].len = 1;
728 msg[0].buf = ®
729
730 msg[1].slave = sc->addr;
731 msg[1].flags = IIC_M_RD;
732 msg[1].len = size;
733 msg[1].buf = data;
734
735 return (iicbus_transfer(dev, msg, 2));
736 }
737
738 static int
axp8xx_write(device_t dev,uint8_t reg,uint8_t val)739 axp8xx_write(device_t dev, uint8_t reg, uint8_t val)
740 {
741 struct axp8xx_softc *sc;
742 struct iic_msg msg[2];
743
744 sc = device_get_softc(dev);
745
746 msg[0].slave = sc->addr;
747 msg[0].flags = IIC_M_WR;
748 msg[0].len = 1;
749 msg[0].buf = ®
750
751 msg[1].slave = sc->addr;
752 msg[1].flags = IIC_M_WR;
753 msg[1].len = 1;
754 msg[1].buf = &val;
755
756 return (iicbus_transfer(dev, msg, 2));
757 }
758
759 static int
axp8xx_regnode_init(struct regnode * regnode)760 axp8xx_regnode_init(struct regnode *regnode)
761 {
762 struct axp8xx_reg_sc *sc;
763 struct regnode_std_param *param;
764 int rv, udelay;
765
766 sc = regnode_get_softc(regnode);
767 param = regnode_get_stdparam(regnode);
768 if (param->min_uvolt == 0)
769 return (0);
770
771 /*
772 * Set the regulator at the correct voltage
773 * Do not enable it, this is will be done either by a
774 * consumer or by regnode_set_constraint if boot_on is true
775 */
776 rv = axp8xx_regnode_set_voltage(regnode, param->min_uvolt,
777 param->max_uvolt, &udelay);
778 if (rv != 0)
779 DELAY(udelay);
780
781 return (rv);
782 }
783
784 static int
axp8xx_regnode_enable(struct regnode * regnode,bool enable,int * udelay)785 axp8xx_regnode_enable(struct regnode *regnode, bool enable, int *udelay)
786 {
787 struct axp8xx_reg_sc *sc;
788 uint8_t val;
789
790 sc = regnode_get_softc(regnode);
791
792 if (bootverbose)
793 device_printf(sc->base_dev, "%sable %s (%s)\n",
794 enable ? "En" : "Dis",
795 regnode_get_name(regnode),
796 sc->def->name);
797
798 axp8xx_read(sc->base_dev, sc->def->enable_reg, &val, 1);
799 val &= ~sc->def->enable_mask;
800 if (enable)
801 val |= sc->def->enable_value;
802 else {
803 if (sc->def->disable_value)
804 val |= sc->def->disable_value;
805 else
806 val &= ~sc->def->enable_value;
807 }
808 axp8xx_write(sc->base_dev, sc->def->enable_reg, val);
809
810 *udelay = 0;
811
812 return (0);
813 }
814
815 static void
axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc * sc,uint8_t val,int * uv)816 axp8xx_regnode_reg_to_voltage(struct axp8xx_reg_sc *sc, uint8_t val, int *uv)
817 {
818 if (val < sc->def->voltage_nstep1)
819 *uv = sc->def->voltage_min + val * sc->def->voltage_step1;
820 else
821 *uv = sc->def->voltage_min +
822 (sc->def->voltage_nstep1 * sc->def->voltage_step1) +
823 ((val - sc->def->voltage_nstep1) * sc->def->voltage_step2);
824 *uv *= 1000;
825 }
826
827 static int
axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc * sc,int min_uvolt,int max_uvolt,uint8_t * val)828 axp8xx_regnode_voltage_to_reg(struct axp8xx_reg_sc *sc, int min_uvolt,
829 int max_uvolt, uint8_t *val)
830 {
831 uint8_t nval;
832 int nstep, uvolt;
833
834 nval = 0;
835 uvolt = sc->def->voltage_min * 1000;
836
837 for (nstep = 0; nstep < sc->def->voltage_nstep1 && uvolt < min_uvolt;
838 nstep++) {
839 ++nval;
840 uvolt += (sc->def->voltage_step1 * 1000);
841 }
842 for (nstep = 0; nstep < sc->def->voltage_nstep2 && uvolt < min_uvolt;
843 nstep++) {
844 ++nval;
845 uvolt += (sc->def->voltage_step2 * 1000);
846 }
847 if (uvolt > max_uvolt)
848 return (EINVAL);
849
850 *val = nval;
851 return (0);
852 }
853
854 static int
axp8xx_regnode_set_voltage(struct regnode * regnode,int min_uvolt,int max_uvolt,int * udelay)855 axp8xx_regnode_set_voltage(struct regnode *regnode, int min_uvolt,
856 int max_uvolt, int *udelay)
857 {
858 struct axp8xx_reg_sc *sc;
859 uint8_t val;
860
861 sc = regnode_get_softc(regnode);
862
863 if (bootverbose)
864 device_printf(sc->base_dev, "Setting %s (%s) to %d<->%d\n",
865 regnode_get_name(regnode),
866 sc->def->name,
867 min_uvolt, max_uvolt);
868
869 if (sc->def->voltage_step1 == 0)
870 return (ENXIO);
871
872 if (axp8xx_regnode_voltage_to_reg(sc, min_uvolt, max_uvolt, &val) != 0)
873 return (ERANGE);
874
875 axp8xx_write(sc->base_dev, sc->def->voltage_reg, val);
876
877 *udelay = 0;
878
879 return (0);
880 }
881
882 static int
axp8xx_regnode_get_voltage(struct regnode * regnode,int * uvolt)883 axp8xx_regnode_get_voltage(struct regnode *regnode, int *uvolt)
884 {
885 struct axp8xx_reg_sc *sc;
886 uint8_t val;
887
888 sc = regnode_get_softc(regnode);
889
890 if (!sc->def->voltage_step1 || !sc->def->voltage_step2)
891 return (ENXIO);
892
893 axp8xx_read(sc->base_dev, sc->def->voltage_reg, &val, 1);
894 axp8xx_regnode_reg_to_voltage(sc, val & AXP_VOLTCTL_MASK, uvolt);
895
896 return (0);
897 }
898
899 static regnode_method_t axp8xx_regnode_methods[] = {
900 /* Regulator interface */
901 REGNODEMETHOD(regnode_init, axp8xx_regnode_init),
902 REGNODEMETHOD(regnode_enable, axp8xx_regnode_enable),
903 REGNODEMETHOD(regnode_set_voltage, axp8xx_regnode_set_voltage),
904 REGNODEMETHOD(regnode_get_voltage, axp8xx_regnode_get_voltage),
905 REGNODEMETHOD(regnode_check_voltage, regnode_method_check_voltage),
906 REGNODEMETHOD_END
907 };
908 DEFINE_CLASS_1(axp8xx_regnode, axp8xx_regnode_class, axp8xx_regnode_methods,
909 sizeof(struct axp8xx_reg_sc), regnode_class);
910
911 static void
axp8xx_shutdown(void * devp,int howto)912 axp8xx_shutdown(void *devp, int howto)
913 {
914 device_t dev;
915
916 if ((howto & RB_POWEROFF) == 0)
917 return;
918
919 dev = devp;
920
921 if (bootverbose)
922 device_printf(dev, "Shutdown Axp8xx\n");
923
924 axp8xx_write(dev, AXP_POWERBAT, AXP_POWERBAT_SHUTDOWN);
925 }
926
927 static int
axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS)928 axp8xx_sysctl_chargecurrent(SYSCTL_HANDLER_ARGS)
929 {
930 device_t dev = arg1;
931 uint8_t data;
932 int val, error;
933
934 error = axp8xx_read(dev, AXP_CHARGERCTL1, &data, 1);
935 if (error != 0)
936 return (error);
937
938 if (bootverbose)
939 device_printf(dev, "Raw CHARGECTL1 val: 0x%0x\n", data);
940 val = (data & AXP_CHARGERCTL1_CMASK);
941 error = sysctl_handle_int(oidp, &val, 0, req);
942 if (error || !req->newptr) /* error || read request */
943 return (error);
944
945 if ((val < AXP_CHARGERCTL1_MIN) || (val > AXP_CHARGERCTL1_MAX))
946 return (EINVAL);
947
948 val |= (data & (AXP_CHARGERCTL1_CMASK << 4));
949 axp8xx_write(dev, AXP_CHARGERCTL1, val);
950
951 return (0);
952 }
953
954 static int
axp8xx_sysctl(SYSCTL_HANDLER_ARGS)955 axp8xx_sysctl(SYSCTL_HANDLER_ARGS)
956 {
957 struct axp8xx_softc *sc;
958 device_t dev = arg1;
959 enum axp8xx_sensor sensor = arg2;
960 const struct axp8xx_config *c;
961 uint8_t data;
962 int val, i, found, batt_val;
963 uint8_t lo, hi;
964
965 sc = device_get_softc(dev);
966 c = sc->config;
967
968 for (found = 0, i = 0; i < sc->nsensors; i++) {
969 if (sc->sensors[i].id == sensor) {
970 found = 1;
971 break;
972 }
973 }
974
975 if (found == 0)
976 return (ENOENT);
977
978 switch (sensor) {
979 case AXP_SENSOR_ACIN_PRESENT:
980 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0)
981 val = !!(data & AXP_POWERSRC_ACIN);
982 break;
983 case AXP_SENSOR_VBUS_PRESENT:
984 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0)
985 val = !!(data & AXP_POWERSRC_VBUS);
986 break;
987 case AXP_SENSOR_BATT_PRESENT:
988 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0) {
989 if (data & AXP_POWERMODE_BAT_VALID)
990 val = !!(data & AXP_POWERMODE_BAT_PRESENT);
991 }
992 break;
993 case AXP_SENSOR_BATT_CHARGING:
994 if (axp8xx_read(dev, AXP_POWERMODE, &data, 1) == 0)
995 val = !!(data & AXP_POWERMODE_BAT_CHARGING);
996 break;
997 case AXP_SENSOR_BATT_CHARGE_STATE:
998 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 &&
999 (data & AXP_BAT_CAP_VALID) != 0) {
1000 batt_val = (data & AXP_BAT_CAP_PERCENT);
1001 if (batt_val <= sc->shut_thres)
1002 val = BATT_CAPACITY_CRITICAL;
1003 else if (batt_val <= sc->warn_thres)
1004 val = BATT_CAPACITY_WARNING;
1005 else
1006 val = BATT_CAPACITY_NORMAL;
1007 }
1008 break;
1009 case AXP_SENSOR_BATT_CAPACITY_PERCENT:
1010 if (axp8xx_read(dev, AXP_BAT_CAP, &data, 1) == 0 &&
1011 (data & AXP_BAT_CAP_VALID) != 0)
1012 val = (data & AXP_BAT_CAP_PERCENT);
1013 break;
1014 case AXP_SENSOR_BATT_VOLTAGE:
1015 if (axp8xx_read(dev, AXP_BATSENSE_HI, &hi, 1) == 0 &&
1016 axp8xx_read(dev, AXP_BATSENSE_LO, &lo, 1) == 0) {
1017 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1018 val *= c->batsense_step;
1019 }
1020 break;
1021 case AXP_SENSOR_BATT_CHARGE_CURRENT:
1022 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 &&
1023 (data & AXP_POWERSRC_CHARING) != 0 &&
1024 axp8xx_read(dev, AXP_BATCHG_HI, &hi, 1) == 0 &&
1025 axp8xx_read(dev, AXP_BATCHG_LO, &lo, 1) == 0) {
1026 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1027 val *= c->charge_step;
1028 }
1029 break;
1030 case AXP_SENSOR_BATT_DISCHARGE_CURRENT:
1031 if (axp8xx_read(dev, AXP_POWERSRC, &data, 1) == 0 &&
1032 (data & AXP_POWERSRC_CHARING) == 0 &&
1033 axp8xx_read(dev, AXP_BATDISCHG_HI, &hi, 1) == 0 &&
1034 axp8xx_read(dev, AXP_BATDISCHG_LO, &lo, 1) == 0) {
1035 val = (AXP_SENSOR_BAT_H(hi) | AXP_SENSOR_BAT_L(lo));
1036 val *= c->discharge_step;
1037 }
1038 break;
1039 case AXP_SENSOR_BATT_MAXIMUM_CAPACITY:
1040 if (axp8xx_read(dev, AXP_BAT_MAX_CAP_HI, &hi, 1) == 0 &&
1041 axp8xx_read(dev, AXP_BAT_MAX_CAP_LO, &lo, 1) == 0) {
1042 val = AXP_SENSOR_COULOMB(hi, lo);
1043 val *= c->maxcap_step;
1044 }
1045 break;
1046 case AXP_SENSOR_BATT_CURRENT_CAPACITY:
1047 if (axp8xx_read(dev, AXP_BAT_COULOMB_HI, &hi, 1) == 0 &&
1048 axp8xx_read(dev, AXP_BAT_COULOMB_LO, &lo, 1) == 0) {
1049 val = AXP_SENSOR_COULOMB(hi, lo);
1050 val *= c->coulomb_step;
1051 }
1052 break;
1053 }
1054
1055 return sysctl_handle_opaque(oidp, &val, sizeof(val), req);
1056 }
1057
1058 static void
axp8xx_intr(void * arg)1059 axp8xx_intr(void *arg)
1060 {
1061 device_t dev;
1062 uint8_t val;
1063 int error;
1064
1065 dev = arg;
1066
1067 error = axp8xx_read(dev, AXP_IRQSTAT1, &val, 1);
1068 if (error != 0)
1069 return;
1070
1071 if (val) {
1072 if (bootverbose)
1073 device_printf(dev, "AXP_IRQSTAT1 val: %x\n", val);
1074 if (val & AXP_IRQSTAT1_ACIN_HI)
1075 devctl_notify("PMU", "AC", "plugged", NULL);
1076 if (val & AXP_IRQSTAT1_ACIN_LO)
1077 devctl_notify("PMU", "AC", "unplugged", NULL);
1078 if (val & AXP_IRQSTAT1_VBUS_HI)
1079 devctl_notify("PMU", "USB", "plugged", NULL);
1080 if (val & AXP_IRQSTAT1_VBUS_LO)
1081 devctl_notify("PMU", "USB", "unplugged", NULL);
1082 /* Acknowledge */
1083 axp8xx_write(dev, AXP_IRQSTAT1, val);
1084 }
1085
1086 error = axp8xx_read(dev, AXP_IRQSTAT2, &val, 1);
1087 if (error != 0)
1088 return;
1089
1090 if (val) {
1091 if (bootverbose)
1092 device_printf(dev, "AXP_IRQSTAT2 val: %x\n", val);
1093 if (val & AXP_IRQSTAT2_BATCHGD)
1094 devctl_notify("PMU", "Battery", "charged", NULL);
1095 if (val & AXP_IRQSTAT2_BATCHGC)
1096 devctl_notify("PMU", "Battery", "charging", NULL);
1097 if (val & AXP_IRQSTAT2_BAT_NO)
1098 devctl_notify("PMU", "Battery", "absent", NULL);
1099 if (val & AXP_IRQSTAT2_BAT_IN)
1100 devctl_notify("PMU", "Battery", "plugged", NULL);
1101 /* Acknowledge */
1102 axp8xx_write(dev, AXP_IRQSTAT2, val);
1103 }
1104
1105 error = axp8xx_read(dev, AXP_IRQSTAT3, &val, 1);
1106 if (error != 0)
1107 return;
1108
1109 if (val) {
1110 /* Acknowledge */
1111 axp8xx_write(dev, AXP_IRQSTAT3, val);
1112 }
1113
1114 error = axp8xx_read(dev, AXP_IRQSTAT4, &val, 1);
1115 if (error != 0)
1116 return;
1117
1118 if (val) {
1119 if (bootverbose)
1120 device_printf(dev, "AXP_IRQSTAT4 val: %x\n", val);
1121 if (val & AXP_IRQSTAT4_BATLVL_LO0)
1122 devctl_notify("PMU", "Battery", "shutdown threshold", NULL);
1123 if (val & AXP_IRQSTAT4_BATLVL_LO1)
1124 devctl_notify("PMU", "Battery", "warning threshold", NULL);
1125 /* Acknowledge */
1126 axp8xx_write(dev, AXP_IRQSTAT4, val);
1127 }
1128
1129 error = axp8xx_read(dev, AXP_IRQSTAT5, &val, 1);
1130 if (error != 0)
1131 return;
1132
1133 if (val != 0) {
1134 if ((val & AXP_IRQSTAT5_POKSIRQ) != 0) {
1135 if (bootverbose)
1136 device_printf(dev, "Power button pressed\n");
1137 shutdown_nice(RB_POWEROFF);
1138 }
1139 /* Acknowledge */
1140 axp8xx_write(dev, AXP_IRQSTAT5, val);
1141 }
1142
1143 error = axp8xx_read(dev, AXP_IRQSTAT6, &val, 1);
1144 if (error != 0)
1145 return;
1146
1147 if (val) {
1148 /* Acknowledge */
1149 axp8xx_write(dev, AXP_IRQSTAT6, val);
1150 }
1151 }
1152
1153 static device_t
axp8xx_gpio_get_bus(device_t dev)1154 axp8xx_gpio_get_bus(device_t dev)
1155 {
1156 struct axp8xx_softc *sc;
1157
1158 sc = device_get_softc(dev);
1159
1160 return (sc->gpiodev);
1161 }
1162
1163 static int
axp8xx_gpio_pin_max(device_t dev,int * maxpin)1164 axp8xx_gpio_pin_max(device_t dev, int *maxpin)
1165 {
1166 *maxpin = nitems(axp8xx_pins) - 1;
1167
1168 return (0);
1169 }
1170
1171 static int
axp8xx_gpio_pin_getname(device_t dev,uint32_t pin,char * name)1172 axp8xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
1173 {
1174 if (pin >= nitems(axp8xx_pins))
1175 return (EINVAL);
1176
1177 snprintf(name, GPIOMAXNAME, "%s", axp8xx_pins[pin].name);
1178
1179 return (0);
1180 }
1181
1182 static int
axp8xx_gpio_pin_getcaps(device_t dev,uint32_t pin,uint32_t * caps)1183 axp8xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
1184 {
1185 if (pin >= nitems(axp8xx_pins))
1186 return (EINVAL);
1187
1188 *caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT;
1189
1190 return (0);
1191 }
1192
1193 static int
axp8xx_gpio_pin_getflags(device_t dev,uint32_t pin,uint32_t * flags)1194 axp8xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
1195 {
1196 struct axp8xx_softc *sc;
1197 uint8_t data, func;
1198 int error;
1199
1200 if (pin >= nitems(axp8xx_pins))
1201 return (EINVAL);
1202
1203 sc = device_get_softc(dev);
1204
1205 AXP_LOCK(sc);
1206 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1207 if (error == 0) {
1208 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1209 if (func == AXP_GPIO_FUNC_INPUT)
1210 *flags = GPIO_PIN_INPUT;
1211 else if (func == AXP_GPIO_FUNC_DRVLO ||
1212 func == AXP_GPIO_FUNC_DRVHI)
1213 *flags = GPIO_PIN_OUTPUT;
1214 else
1215 *flags = 0;
1216 }
1217 AXP_UNLOCK(sc);
1218
1219 return (error);
1220 }
1221
1222 static int
axp8xx_gpio_pin_setflags(device_t dev,uint32_t pin,uint32_t flags)1223 axp8xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
1224 {
1225 struct axp8xx_softc *sc;
1226 uint8_t data;
1227 int error;
1228
1229 if (pin >= nitems(axp8xx_pins))
1230 return (EINVAL);
1231
1232 sc = device_get_softc(dev);
1233
1234 AXP_LOCK(sc);
1235 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1236 if (error == 0) {
1237 data &= ~AXP_GPIO_FUNC;
1238 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) != 0) {
1239 if ((flags & GPIO_PIN_OUTPUT) == 0)
1240 data |= AXP_GPIO_FUNC_INPUT;
1241 }
1242 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1243 }
1244 AXP_UNLOCK(sc);
1245
1246 return (error);
1247 }
1248
1249 static int
axp8xx_gpio_pin_get(device_t dev,uint32_t pin,unsigned int * val)1250 axp8xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
1251 {
1252 struct axp8xx_softc *sc;
1253 uint8_t data, func;
1254 int error;
1255
1256 if (pin >= nitems(axp8xx_pins))
1257 return (EINVAL);
1258
1259 sc = device_get_softc(dev);
1260
1261 AXP_LOCK(sc);
1262 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1263 if (error == 0) {
1264 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1265 switch (func) {
1266 case AXP_GPIO_FUNC_DRVLO:
1267 *val = 0;
1268 break;
1269 case AXP_GPIO_FUNC_DRVHI:
1270 *val = 1;
1271 break;
1272 case AXP_GPIO_FUNC_INPUT:
1273 error = axp8xx_read(dev, AXP_GPIO_SIGBIT, &data, 1);
1274 if (error == 0)
1275 *val = (data & (1 << pin)) ? 1 : 0;
1276 break;
1277 default:
1278 error = EIO;
1279 break;
1280 }
1281 }
1282 AXP_UNLOCK(sc);
1283
1284 return (error);
1285 }
1286
1287 static int
axp8xx_gpio_pin_set(device_t dev,uint32_t pin,unsigned int val)1288 axp8xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int val)
1289 {
1290 struct axp8xx_softc *sc;
1291 uint8_t data, func;
1292 int error;
1293
1294 if (pin >= nitems(axp8xx_pins))
1295 return (EINVAL);
1296
1297 sc = device_get_softc(dev);
1298
1299 AXP_LOCK(sc);
1300 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1301 if (error == 0) {
1302 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1303 switch (func) {
1304 case AXP_GPIO_FUNC_DRVLO:
1305 case AXP_GPIO_FUNC_DRVHI:
1306 data &= ~AXP_GPIO_FUNC;
1307 data |= (val << AXP_GPIO_FUNC_SHIFT);
1308 break;
1309 default:
1310 error = EIO;
1311 break;
1312 }
1313 }
1314 if (error == 0)
1315 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1316 AXP_UNLOCK(sc);
1317
1318 return (error);
1319 }
1320
1321
1322 static int
axp8xx_gpio_pin_toggle(device_t dev,uint32_t pin)1323 axp8xx_gpio_pin_toggle(device_t dev, uint32_t pin)
1324 {
1325 struct axp8xx_softc *sc;
1326 uint8_t data, func;
1327 int error;
1328
1329 if (pin >= nitems(axp8xx_pins))
1330 return (EINVAL);
1331
1332 sc = device_get_softc(dev);
1333
1334 AXP_LOCK(sc);
1335 error = axp8xx_read(dev, axp8xx_pins[pin].ctrl_reg, &data, 1);
1336 if (error == 0) {
1337 func = (data & AXP_GPIO_FUNC) >> AXP_GPIO_FUNC_SHIFT;
1338 switch (func) {
1339 case AXP_GPIO_FUNC_DRVLO:
1340 data &= ~AXP_GPIO_FUNC;
1341 data |= (AXP_GPIO_FUNC_DRVHI << AXP_GPIO_FUNC_SHIFT);
1342 break;
1343 case AXP_GPIO_FUNC_DRVHI:
1344 data &= ~AXP_GPIO_FUNC;
1345 data |= (AXP_GPIO_FUNC_DRVLO << AXP_GPIO_FUNC_SHIFT);
1346 break;
1347 default:
1348 error = EIO;
1349 break;
1350 }
1351 }
1352 if (error == 0)
1353 error = axp8xx_write(dev, axp8xx_pins[pin].ctrl_reg, data);
1354 AXP_UNLOCK(sc);
1355
1356 return (error);
1357 }
1358
1359 static int
axp8xx_gpio_map_gpios(device_t bus,phandle_t dev,phandle_t gparent,int gcells,pcell_t * gpios,uint32_t * pin,uint32_t * flags)1360 axp8xx_gpio_map_gpios(device_t bus, phandle_t dev, phandle_t gparent,
1361 int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
1362 {
1363 if (gpios[0] >= nitems(axp8xx_pins))
1364 return (EINVAL);
1365
1366 *pin = gpios[0];
1367 *flags = gpios[1];
1368
1369 return (0);
1370 }
1371
1372 static phandle_t
axp8xx_get_node(device_t dev,device_t bus)1373 axp8xx_get_node(device_t dev, device_t bus)
1374 {
1375 return (ofw_bus_get_node(dev));
1376 }
1377
1378 static struct axp8xx_reg_sc *
axp8xx_reg_attach(device_t dev,phandle_t node,struct axp8xx_regdef * def)1379 axp8xx_reg_attach(device_t dev, phandle_t node,
1380 struct axp8xx_regdef *def)
1381 {
1382 struct axp8xx_reg_sc *reg_sc;
1383 struct regnode_init_def initdef;
1384 struct regnode *regnode;
1385
1386 memset(&initdef, 0, sizeof(initdef));
1387 if (regulator_parse_ofw_stdparam(dev, node, &initdef) != 0)
1388 return (NULL);
1389 if (initdef.std_param.min_uvolt == 0)
1390 initdef.std_param.min_uvolt = def->voltage_min * 1000;
1391 if (initdef.std_param.max_uvolt == 0)
1392 initdef.std_param.max_uvolt = def->voltage_max * 1000;
1393 initdef.id = def->id;
1394 initdef.ofw_node = node;
1395 regnode = regnode_create(dev, &axp8xx_regnode_class, &initdef);
1396 if (regnode == NULL) {
1397 device_printf(dev, "cannot create regulator\n");
1398 return (NULL);
1399 }
1400
1401 reg_sc = regnode_get_softc(regnode);
1402 reg_sc->regnode = regnode;
1403 reg_sc->base_dev = dev;
1404 reg_sc->def = def;
1405 reg_sc->xref = OF_xref_from_node(node);
1406 reg_sc->param = regnode_get_stdparam(regnode);
1407
1408 regnode_register(regnode);
1409
1410 return (reg_sc);
1411 }
1412
1413 static int
axp8xx_regdev_map(device_t dev,phandle_t xref,int ncells,pcell_t * cells,intptr_t * num)1414 axp8xx_regdev_map(device_t dev, phandle_t xref, int ncells, pcell_t *cells,
1415 intptr_t *num)
1416 {
1417 struct axp8xx_softc *sc;
1418 int i;
1419
1420 sc = device_get_softc(dev);
1421 for (i = 0; i < sc->nregs; i++) {
1422 if (sc->regs[i] == NULL)
1423 continue;
1424 if (sc->regs[i]->xref == xref) {
1425 *num = sc->regs[i]->def->id;
1426 return (0);
1427 }
1428 }
1429
1430 return (ENXIO);
1431 }
1432
1433 static int
axp8xx_probe(device_t dev)1434 axp8xx_probe(device_t dev)
1435 {
1436 if (!ofw_bus_status_okay(dev))
1437 return (ENXIO);
1438
1439 switch (ofw_bus_search_compatible(dev, compat_data)->ocd_data)
1440 {
1441 case AXP803:
1442 device_set_desc(dev, "X-Powers AXP803 Power Management Unit");
1443 break;
1444 case AXP813:
1445 device_set_desc(dev, "X-Powers AXP813 Power Management Unit");
1446 break;
1447 default:
1448 return (ENXIO);
1449 }
1450
1451 return (BUS_PROBE_DEFAULT);
1452 }
1453
1454 static int
axp8xx_attach(device_t dev)1455 axp8xx_attach(device_t dev)
1456 {
1457 struct axp8xx_softc *sc;
1458 struct axp8xx_reg_sc *reg;
1459 uint8_t chip_id, val;
1460 phandle_t rnode, child;
1461 int error, i;
1462
1463 sc = device_get_softc(dev);
1464
1465 sc->addr = iicbus_get_addr(dev);
1466 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
1467
1468 error = bus_alloc_resources(dev, axp8xx_spec, &sc->res);
1469 if (error != 0) {
1470 device_printf(dev, "cannot allocate resources for device\n");
1471 return (error);
1472 }
1473
1474 if (bootverbose) {
1475 axp8xx_read(dev, AXP_ICTYPE, &chip_id, 1);
1476 device_printf(dev, "chip ID 0x%02x\n", chip_id);
1477 }
1478
1479 sc->nregs = nitems(axp8xx_common_regdefs);
1480 sc->type = ofw_bus_search_compatible(dev, compat_data)->ocd_data;
1481 switch (sc->type) {
1482 case AXP803:
1483 sc->nregs += nitems(axp803_regdefs);
1484 break;
1485 case AXP813:
1486 sc->nregs += nitems(axp813_regdefs);
1487 break;
1488 }
1489 sc->config = &axp803_config;
1490 sc->sensors = axp8xx_common_sensors;
1491 sc->nsensors = nitems(axp8xx_common_sensors);
1492
1493 sc->regs = malloc(sizeof(struct axp8xx_reg_sc *) * sc->nregs,
1494 M_AXP8XX_REG, M_WAITOK | M_ZERO);
1495
1496 /* Attach known regulators that exist in the DT */
1497 rnode = ofw_bus_find_child(ofw_bus_get_node(dev), "regulators");
1498 if (rnode > 0) {
1499 for (i = 0; i < sc->nregs; i++) {
1500 char *regname;
1501 struct axp8xx_regdef *regdef;
1502
1503 if (i <= nitems(axp8xx_common_regdefs)) {
1504 regname = axp8xx_common_regdefs[i].name;
1505 regdef = &axp8xx_common_regdefs[i];
1506 } else {
1507 int off;
1508
1509 off = i - nitems(axp8xx_common_regdefs);
1510 switch (sc->type) {
1511 case AXP803:
1512 regname = axp803_regdefs[off].name;
1513 regdef = &axp803_regdefs[off];
1514 break;
1515 case AXP813:
1516 regname = axp813_regdefs[off].name;
1517 regdef = &axp813_regdefs[off];
1518 break;
1519 }
1520 }
1521 child = ofw_bus_find_child(rnode,
1522 regname);
1523 if (child == 0)
1524 continue;
1525 reg = axp8xx_reg_attach(dev, child,
1526 regdef);
1527 if (reg == NULL) {
1528 device_printf(dev,
1529 "cannot attach regulator %s\n",
1530 regname);
1531 continue;
1532 }
1533 sc->regs[i] = reg;
1534 }
1535 }
1536
1537 /* Add sensors */
1538 for (i = 0; i < sc->nsensors; i++) {
1539 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1540 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1541 OID_AUTO, sc->sensors[i].name,
1542 CTLTYPE_INT | CTLFLAG_RD,
1543 dev, sc->sensors[i].id, axp8xx_sysctl,
1544 sc->sensors[i].format,
1545 sc->sensors[i].desc);
1546 }
1547 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
1548 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
1549 OID_AUTO, "batchargecurrentstep",
1550 CTLTYPE_INT | CTLFLAG_RW,
1551 dev, 0, axp8xx_sysctl_chargecurrent,
1552 "I", "Battery Charging Current Step, "
1553 "0: 200mA, 1: 400mA, 2: 600mA, 3: 800mA, "
1554 "4: 1000mA, 5: 1200mA, 6: 1400mA, 7: 1600mA, "
1555 "8: 1800mA, 9: 2000mA, 10: 2200mA, 11: 2400mA, "
1556 "12: 2600mA, 13: 2800mA");
1557
1558 /* Get thresholds */
1559 if (axp8xx_read(dev, AXP_BAT_CAP_WARN, &val, 1) == 0) {
1560 sc->warn_thres = (val & AXP_BAT_CAP_WARN_LV1) >> 4;
1561 sc->warn_thres += AXP_BAP_CAP_WARN_LV1BASE;
1562 sc->shut_thres = (val & AXP_BAT_CAP_WARN_LV2);
1563 if (bootverbose) {
1564 device_printf(dev,
1565 "Raw reg val: 0x%02x\n", val);
1566 device_printf(dev,
1567 "Warning threshold: 0x%02x\n", sc->warn_thres);
1568 device_printf(dev,
1569 "Shutdown threshold: 0x%02x\n", sc->shut_thres);
1570 }
1571 }
1572
1573 /* Enable interrupts */
1574 axp8xx_write(dev, AXP_IRQEN1,
1575 AXP_IRQEN1_VBUS_LO |
1576 AXP_IRQEN1_VBUS_HI |
1577 AXP_IRQEN1_ACIN_LO |
1578 AXP_IRQEN1_ACIN_HI);
1579 axp8xx_write(dev, AXP_IRQEN2,
1580 AXP_IRQEN2_BATCHGD |
1581 AXP_IRQEN2_BATCHGC |
1582 AXP_IRQEN2_BAT_NO |
1583 AXP_IRQEN2_BAT_IN);
1584 axp8xx_write(dev, AXP_IRQEN3, 0);
1585 axp8xx_write(dev, AXP_IRQEN4,
1586 AXP_IRQEN4_BATLVL_LO0 |
1587 AXP_IRQEN4_BATLVL_LO1);
1588 axp8xx_write(dev, AXP_IRQEN5,
1589 AXP_IRQEN5_POKSIRQ |
1590 AXP_IRQEN5_POKLIRQ);
1591 axp8xx_write(dev, AXP_IRQEN6, 0);
1592
1593 /* Install interrupt handler */
1594 error = bus_setup_intr(dev, sc->res, INTR_TYPE_MISC | INTR_MPSAFE,
1595 NULL, axp8xx_intr, dev, &sc->ih);
1596 if (error != 0) {
1597 device_printf(dev, "cannot setup interrupt handler\n");
1598 return (error);
1599 }
1600
1601 EVENTHANDLER_REGISTER(shutdown_final, axp8xx_shutdown, dev,
1602 SHUTDOWN_PRI_LAST);
1603
1604 sc->gpiodev = gpiobus_attach_bus(dev);
1605
1606 return (0);
1607 }
1608
1609 static device_method_t axp8xx_methods[] = {
1610 /* Device interface */
1611 DEVMETHOD(device_probe, axp8xx_probe),
1612 DEVMETHOD(device_attach, axp8xx_attach),
1613
1614 /* GPIO interface */
1615 DEVMETHOD(gpio_get_bus, axp8xx_gpio_get_bus),
1616 DEVMETHOD(gpio_pin_max, axp8xx_gpio_pin_max),
1617 DEVMETHOD(gpio_pin_getname, axp8xx_gpio_pin_getname),
1618 DEVMETHOD(gpio_pin_getcaps, axp8xx_gpio_pin_getcaps),
1619 DEVMETHOD(gpio_pin_getflags, axp8xx_gpio_pin_getflags),
1620 DEVMETHOD(gpio_pin_setflags, axp8xx_gpio_pin_setflags),
1621 DEVMETHOD(gpio_pin_get, axp8xx_gpio_pin_get),
1622 DEVMETHOD(gpio_pin_set, axp8xx_gpio_pin_set),
1623 DEVMETHOD(gpio_pin_toggle, axp8xx_gpio_pin_toggle),
1624 DEVMETHOD(gpio_map_gpios, axp8xx_gpio_map_gpios),
1625
1626 /* Regdev interface */
1627 DEVMETHOD(regdev_map, axp8xx_regdev_map),
1628
1629 /* OFW bus interface */
1630 DEVMETHOD(ofw_bus_get_node, axp8xx_get_node),
1631
1632 DEVMETHOD_END
1633 };
1634
1635 static driver_t axp8xx_driver = {
1636 "axp8xx_pmu",
1637 axp8xx_methods,
1638 sizeof(struct axp8xx_softc),
1639 };
1640
1641 static devclass_t axp8xx_devclass;
1642 extern devclass_t ofwgpiobus_devclass, gpioc_devclass;
1643 extern driver_t ofw_gpiobus_driver, gpioc_driver;
1644
1645 EARLY_DRIVER_MODULE(axp8xx, iicbus, axp8xx_driver, axp8xx_devclass, 0, 0,
1646 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1647 EARLY_DRIVER_MODULE(ofw_gpiobus, axp8xx_pmu, ofw_gpiobus_driver,
1648 ofwgpiobus_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LAST);
1649 DRIVER_MODULE(gpioc, axp8xx_pmu, gpioc_driver, gpioc_devclass, 0, 0);
1650 MODULE_VERSION(axp8xx, 1);
1651 MODULE_DEPEND(axp8xx, iicbus, 1, 1, 1);
1652 SIMPLEBUS_PNP_INFO(compat_data);
1653