1 /*- 2 * Copyright (c) 2003-2008, Joseph Koshy 3 * Copyright (c) 2007 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by A. Joseph Koshy under 7 * sponsorship from the FreeBSD Foundation and Google, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD: stable/9/sys/sys/pmc.h 267403 2014-06-12 15:59:36Z emaste $ 31 */ 32 33 #ifndef _SYS_PMC_H_ 34 #define _SYS_PMC_H_ 35 36 #include <dev/hwpmc/pmc_events.h> 37 38 #include <machine/pmc_mdep.h> 39 #include <machine/profile.h> 40 41 #define PMC_MODULE_NAME "hwpmc" 42 #define PMC_NAME_MAX 64 /* HW counter name size */ 43 #define PMC_CLASS_MAX 8 /* max #classes of PMCs per-system */ 44 45 /* 46 * Kernel<->userland API version number [MMmmpppp] 47 * 48 * Major numbers are to be incremented when an incompatible change to 49 * the ABI occurs that older clients will not be able to handle. 50 * 51 * Minor numbers are incremented when a backwards compatible change 52 * occurs that allows older correct programs to run unchanged. For 53 * example, when support for a new PMC type is added. 54 * 55 * The patch version is incremented for every bug fix. 56 */ 57 #define PMC_VERSION_MAJOR 0x03 58 #define PMC_VERSION_MINOR 0x01 59 #define PMC_VERSION_PATCH 0x0000 60 61 #define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \ 62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH) 63 64 /* 65 * Kinds of CPUs known. 66 * 67 * We keep track of CPU variants that need to be distinguished in 68 * some way for PMC operations. CPU names are grouped by manufacturer 69 * and numbered sparsely in order to minimize changes to the ABI involved 70 * when new CPUs are added. 71 */ 72 73 #define __PMC_CPUS() \ 74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \ 75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \ 76 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \ 77 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \ 78 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \ 79 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \ 80 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \ 81 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \ 82 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \ 83 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \ 84 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \ 85 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \ 86 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \ 87 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \ 88 __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \ 89 __PMC_CPU(INTEL_SANDYBRIDGE, 0x8D, "Intel Sandy Bridge") \ 90 __PMC_CPU(INTEL_IVYBRIDGE, 0x8E, "Intel Ivy Bridge") \ 91 __PMC_CPU(INTEL_SANDYBRIDGE_XEON, 0x8F, "Intel Sandy Bridge Xeon") \ 92 __PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \ 93 __PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \ 94 __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ 95 __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ 96 __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ 97 __PMC_CPU(GENERIC, 0x400, "Generic") 98 99 enum pmc_cputype { 100 #undef __PMC_CPU 101 #define __PMC_CPU(S,V,D) PMC_CPU_##S = V, 102 __PMC_CPUS() 103 }; 104 105 #define PMC_CPU_FIRST PMC_CPU_AMD_K7 106 #define PMC_CPU_LAST PMC_CPU_GENERIC 107 108 /* 109 * Classes of PMCs 110 */ 111 112 #define __PMC_CLASSES() \ 113 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \ 114 __PMC_CLASS(K7) /* AMD K7 performance counters */ \ 115 __PMC_CLASS(K8) /* AMD K8 performance counters */ \ 116 __PMC_CLASS(P5) /* Intel Pentium counters */ \ 117 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \ 118 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \ 119 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \ 120 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \ 121 __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \ 122 __PMC_CLASS(UCP) /* Intel Uncore programmable */ \ 123 __PMC_CLASS(XSCALE) /* Intel XScale counters */ \ 124 __PMC_CLASS(MIPS24K) /* MIPS 24K */ \ 125 __PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \ 126 __PMC_CLASS(SOFT) /* Software events */ 127 128 enum pmc_class { 129 #undef __PMC_CLASS 130 #define __PMC_CLASS(N) PMC_CLASS_##N , 131 __PMC_CLASSES() 132 }; 133 134 #define PMC_CLASS_FIRST PMC_CLASS_TSC 135 #define PMC_CLASS_LAST PMC_CLASS_SOFT 136 137 /* 138 * A PMC can be in the following states: 139 * 140 * Hardware states: 141 * DISABLED -- administratively prohibited from being used. 142 * FREE -- HW available for use 143 * Software states: 144 * ALLOCATED -- allocated 145 * STOPPED -- allocated, but not counting events 146 * RUNNING -- allocated, and in operation; 'pm_runcount' 147 * holds the number of CPUs using this PMC at 148 * a given instant 149 * DELETED -- being destroyed 150 */ 151 152 #define __PMC_HWSTATES() \ 153 __PMC_STATE(DISABLED) \ 154 __PMC_STATE(FREE) 155 156 #define __PMC_SWSTATES() \ 157 __PMC_STATE(ALLOCATED) \ 158 __PMC_STATE(STOPPED) \ 159 __PMC_STATE(RUNNING) \ 160 __PMC_STATE(DELETED) 161 162 #define __PMC_STATES() \ 163 __PMC_HWSTATES() \ 164 __PMC_SWSTATES() 165 166 enum pmc_state { 167 #undef __PMC_STATE 168 #define __PMC_STATE(S) PMC_STATE_##S, 169 __PMC_STATES() 170 __PMC_STATE(MAX) 171 }; 172 173 #define PMC_STATE_FIRST PMC_STATE_DISABLED 174 #define PMC_STATE_LAST PMC_STATE_DELETED 175 176 /* 177 * An allocated PMC may used as a 'global' counter or as a 178 * 'thread-private' one. Each such mode of use can be in either 179 * statistical sampling mode or in counting mode. Thus a PMC in use 180 * 181 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling 182 * SC i.e., SYSTEM COUNTER -- system-wide counting mode 183 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling 184 * TC i.e., THREAD COUNTER -- thread virtual, counting mode 185 * 186 * Statistical profiling modes rely on the PMC periodically delivering 187 * a interrupt to the CPU (when the configured number of events have 188 * been measured), so the PMC must have the ability to generate 189 * interrupts. 190 * 191 * In counting modes, the PMC counts its configured events, with the 192 * value of the PMC being read whenever needed by its owner process. 193 * 194 * The thread specific modes "virtualize" the PMCs -- the PMCs appear 195 * to be thread private and count events only when the profiled thread 196 * actually executes on the CPU. 197 * 198 * The system-wide "global" modes keep the PMCs running all the time 199 * and are used to measure the behaviour of the whole system. 200 */ 201 202 #define __PMC_MODES() \ 203 __PMC_MODE(SS, 0) \ 204 __PMC_MODE(SC, 1) \ 205 __PMC_MODE(TS, 2) \ 206 __PMC_MODE(TC, 3) 207 208 enum pmc_mode { 209 #undef __PMC_MODE 210 #define __PMC_MODE(M,N) PMC_MODE_##M = N, 211 __PMC_MODES() 212 }; 213 214 #define PMC_MODE_FIRST PMC_MODE_SS 215 #define PMC_MODE_LAST PMC_MODE_TC 216 217 #define PMC_IS_COUNTING_MODE(mode) \ 218 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) 219 #define PMC_IS_SYSTEM_MODE(mode) \ 220 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) 221 #define PMC_IS_SAMPLING_MODE(mode) \ 222 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) 223 #define PMC_IS_VIRTUAL_MODE(mode) \ 224 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) 225 226 /* 227 * PMC row disposition 228 */ 229 230 #define __PMC_DISPOSITIONS(N) \ 231 __PMC_DISP(STANDALONE) /* global/disabled counters */ \ 232 __PMC_DISP(FREE) /* free/available */ \ 233 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \ 234 __PMC_DISP(UNKNOWN) /* sentinel */ 235 236 enum pmc_disp { 237 #undef __PMC_DISP 238 #define __PMC_DISP(D) PMC_DISP_##D , 239 __PMC_DISPOSITIONS() 240 }; 241 242 #define PMC_DISP_FIRST PMC_DISP_STANDALONE 243 #define PMC_DISP_LAST PMC_DISP_THREAD 244 245 /* 246 * Counter capabilities 247 * 248 * __PMC_CAPS(NAME, VALUE, DESCRIPTION) 249 */ 250 251 #define __PMC_CAPS() \ 252 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \ 253 __PMC_CAP(USER, 1, "count user-mode events") \ 254 __PMC_CAP(SYSTEM, 2, "count system-mode events") \ 255 __PMC_CAP(EDGE, 3, "do edge detection of events") \ 256 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \ 257 __PMC_CAP(READ, 5, "read PMC counter") \ 258 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \ 259 __PMC_CAP(INVERT, 7, "invert comparision sense") \ 260 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \ 261 __PMC_CAP(PRECISE, 9, "perform precise sampling") \ 262 __PMC_CAP(TAGGING, 10, "tag upstream events") \ 263 __PMC_CAP(CASCADE, 11, "cascade counters") 264 265 enum pmc_caps 266 { 267 #undef __PMC_CAP 268 #define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) , 269 __PMC_CAPS() 270 }; 271 272 #define PMC_CAP_FIRST PMC_CAP_INTERRUPT 273 #define PMC_CAP_LAST PMC_CAP_CASCADE 274 275 /* 276 * PMC Event Numbers 277 * 278 * These are generated from the definitions in "dev/hwpmc/pmc_events.h". 279 */ 280 281 enum pmc_event { 282 #undef __PMC_EV 283 #undef __PMC_EV_BLOCK 284 #define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 , 285 #define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N , 286 __PMC_EVENTS() 287 }; 288 289 /* 290 * PMC SYSCALL INTERFACE 291 */ 292 293 /* 294 * "PMC_OPS" -- these are the commands recognized by the kernel 295 * module, and are used when performing a system call from userland. 296 */ 297 #define __PMC_OPS() \ 298 __PMC_OP(CONFIGURELOG, "Set log file") \ 299 __PMC_OP(FLUSHLOG, "Flush log file") \ 300 __PMC_OP(GETCPUINFO, "Get system CPU information") \ 301 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \ 302 __PMC_OP(GETMODULEVERSION, "Get module version") \ 303 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \ 304 __PMC_OP(PMCADMIN, "Set PMC state") \ 305 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \ 306 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \ 307 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \ 308 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ 309 __PMC_OP(PMCRELEASE, "Release a PMC") \ 310 __PMC_OP(PMCRW, "Read/Set a PMC") \ 311 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ 312 __PMC_OP(PMCSTART, "Start a PMC") \ 313 __PMC_OP(PMCSTOP, "Stop a PMC") \ 314 __PMC_OP(WRITELOG, "Write a cookie to the log file") \ 315 __PMC_OP(CLOSELOG, "Close log file") \ 316 __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") 317 318 319 enum pmc_ops { 320 #undef __PMC_OP 321 #define __PMC_OP(N, D) PMC_OP_##N, 322 __PMC_OPS() 323 }; 324 325 326 /* 327 * Flags used in operations on PMCs. 328 */ 329 330 #define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */ 331 #define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */ 332 #define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */ 333 #define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */ 334 #define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */ 335 #define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */ 336 #define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */ 337 /* V2 API */ 338 #define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */ 339 340 /* internal flags */ 341 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/ 342 #define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */ 343 #define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */ 344 345 #define PMC_CALLCHAIN_DEPTH_MAX 32 346 347 #define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/ 348 349 /* 350 * Cookies used to denote allocated PMCs, and the values of PMCs. 351 */ 352 353 typedef uint32_t pmc_id_t; 354 typedef uint64_t pmc_value_t; 355 356 #define PMC_ID_INVALID (~ (pmc_id_t) 0) 357 358 /* 359 * PMC IDs have the following format: 360 * 361 * +--------+----------+-----------+-----------+ 362 * | CPU | PMC MODE | PMC CLASS | ROW INDEX | 363 * +--------+----------+-----------+-----------+ 364 * 365 * where each field is 8 bits wide. Field 'CPU' is set to the 366 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode 367 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC 368 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index 369 * for the PMC. 370 * 371 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total 372 * number of hardware PMCs on this cpu. 373 */ 374 375 376 #define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF) 377 #define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8) 378 #define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16) 379 #define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24) 380 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \ 381 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \ 382 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF)) 383 384 /* 385 * Data structures for system calls supported by the pmc driver. 386 */ 387 388 /* 389 * OP PMCALLOCATE 390 * 391 * Allocate a PMC on the named CPU. 392 */ 393 394 #define PMC_CPU_ANY ~0 395 396 struct pmc_op_pmcallocate { 397 uint32_t pm_caps; /* PMC_CAP_* */ 398 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */ 399 enum pmc_class pm_class; /* class of PMC desired */ 400 enum pmc_event pm_ev; /* [enum pmc_event] desired */ 401 uint32_t pm_flags; /* additional modifiers PMC_F_* */ 402 enum pmc_mode pm_mode; /* desired mode */ 403 pmc_id_t pm_pmcid; /* [return] process pmc id */ 404 405 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */ 406 }; 407 408 /* 409 * OP PMCADMIN 410 * 411 * Set the administrative state (i.e., whether enabled or disabled) of 412 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an 413 * absolute PMC number and need not have been first allocated by the 414 * calling process. 415 */ 416 417 struct pmc_op_pmcadmin { 418 int pm_cpu; /* CPU# */ 419 uint32_t pm_flags; /* flags */ 420 int pm_pmc; /* PMC# */ 421 enum pmc_state pm_state; /* desired state */ 422 }; 423 424 /* 425 * OP PMCATTACH / OP PMCDETACH 426 * 427 * Attach/detach a PMC and a process. 428 */ 429 430 struct pmc_op_pmcattach { 431 pmc_id_t pm_pmc; /* PMC to attach to */ 432 pid_t pm_pid; /* target process */ 433 }; 434 435 /* 436 * OP PMCSETCOUNT 437 * 438 * Set the sampling rate (i.e., the reload count) for statistical counters. 439 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE. 440 */ 441 442 struct pmc_op_pmcsetcount { 443 pmc_value_t pm_count; /* initial/sample count */ 444 pmc_id_t pm_pmcid; /* PMC id to set */ 445 }; 446 447 448 /* 449 * OP PMCRW 450 * 451 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs 452 * to have been previously allocated using PMCALLOCATE. 453 */ 454 455 456 struct pmc_op_pmcrw { 457 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ 458 pmc_id_t pm_pmcid; /* pmc id */ 459 pmc_value_t pm_value; /* new&returned value */ 460 }; 461 462 463 /* 464 * OP GETPMCINFO 465 * 466 * retrieve PMC state for a named CPU. The caller is expected to 467 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return 468 * values. 469 */ 470 471 struct pmc_info { 472 char pm_name[PMC_NAME_MAX]; /* pmc name */ 473 enum pmc_class pm_class; /* enum pmc_class */ 474 int pm_enabled; /* whether enabled */ 475 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */ 476 pid_t pm_ownerpid; /* owner, or -1 */ 477 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */ 478 enum pmc_event pm_event; /* current event */ 479 uint32_t pm_flags; /* current flags */ 480 pmc_value_t pm_reloadcount; /* sampling counters only */ 481 }; 482 483 struct pmc_op_getpmcinfo { 484 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ 485 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ 486 }; 487 488 489 /* 490 * OP GETCPUINFO 491 * 492 * Retrieve system CPU information. 493 */ 494 495 496 struct pmc_classinfo { 497 enum pmc_class pm_class; /* class id */ 498 uint32_t pm_caps; /* counter capabilities */ 499 uint32_t pm_width; /* width of the PMC */ 500 uint32_t pm_num; /* number of PMCs in class */ 501 }; 502 503 struct pmc_op_getcpuinfo { 504 enum pmc_cputype pm_cputype; /* what kind of CPU */ 505 uint32_t pm_ncpu; /* max CPU number */ 506 uint32_t pm_npmc; /* #PMCs per CPU */ 507 uint32_t pm_nclass; /* #classes of PMCs */ 508 struct pmc_classinfo pm_classes[PMC_CLASS_MAX]; 509 }; 510 511 /* 512 * OP CONFIGURELOG 513 * 514 * Configure a log file for writing system-wide statistics to. 515 */ 516 517 struct pmc_op_configurelog { 518 int pm_flags; 519 int pm_logfd; /* logfile fd (or -1) */ 520 }; 521 522 /* 523 * OP GETDRIVERSTATS 524 * 525 * Retrieve pmc(4) driver-wide statistics. 526 */ 527 528 struct pmc_op_getdriverstats { 529 int pm_intr_ignored; /* #interrupts ignored */ 530 int pm_intr_processed; /* #interrupts processed */ 531 int pm_intr_bufferfull; /* #interrupts with ENOSPC */ 532 int pm_syscalls; /* #syscalls */ 533 int pm_syscall_errors; /* #syscalls with errors */ 534 int pm_buffer_requests; /* #buffer requests */ 535 int pm_buffer_requests_failed; /* #failed buffer requests */ 536 int pm_log_sweeps; /* #sample buffer processing passes */ 537 }; 538 539 /* 540 * OP RELEASE / OP START / OP STOP 541 * 542 * Simple operations on a PMC id. 543 */ 544 545 struct pmc_op_simple { 546 pmc_id_t pm_pmcid; 547 }; 548 549 /* 550 * OP WRITELOG 551 * 552 * Flush the current log buffer and write 4 bytes of user data to it. 553 */ 554 555 struct pmc_op_writelog { 556 uint32_t pm_userdata; 557 }; 558 559 /* 560 * OP GETMSR 561 * 562 * Retrieve the machine specific address assoicated with the allocated 563 * PMC. This number can be used subsequently with a read-performance-counter 564 * instruction. 565 */ 566 567 struct pmc_op_getmsr { 568 uint32_t pm_msr; /* machine specific address */ 569 pmc_id_t pm_pmcid; /* allocated pmc id */ 570 }; 571 572 /* 573 * OP GETDYNEVENTINFO 574 * 575 * Retrieve a PMC dynamic class events list. 576 */ 577 578 struct pmc_dyn_event_descr { 579 char pm_ev_name[PMC_NAME_MAX]; 580 enum pmc_event pm_ev_code; 581 }; 582 583 struct pmc_op_getdyneventinfo { 584 enum pmc_class pm_class; 585 unsigned int pm_nevent; 586 struct pmc_dyn_event_descr pm_events[PMC_EV_DYN_COUNT]; 587 }; 588 589 #ifdef _KERNEL 590 591 #include <sys/malloc.h> 592 #include <sys/sysctl.h> 593 594 #include <machine/frame.h> 595 596 #define PMC_HASH_SIZE 1024 597 #define PMC_MTXPOOL_SIZE 2048 598 #define PMC_LOG_BUFFER_SIZE 4 599 #define PMC_NLOGBUFFERS 1024 600 #define PMC_NSAMPLES 1024 601 #define PMC_CALLCHAIN_DEPTH 16 602 603 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "." 604 605 /* 606 * Locking keys 607 * 608 * (b) - pmc_bufferlist_mtx (spin lock) 609 * (k) - pmc_kthread_mtx (sleep lock) 610 * (o) - po->po_mtx (spin lock) 611 */ 612 613 /* 614 * PMC commands 615 */ 616 617 struct pmc_syscall_args { 618 uint32_t pmop_code; /* one of PMC_OP_* */ 619 void *pmop_data; /* syscall parameter */ 620 }; 621 622 /* 623 * Interface to processor specific s1tuff 624 */ 625 626 /* 627 * struct pmc_descr 628 * 629 * Machine independent (i.e., the common parts) of a human readable 630 * PMC description. 631 */ 632 633 struct pmc_descr { 634 char pd_name[PMC_NAME_MAX]; /* name */ 635 uint32_t pd_caps; /* capabilities */ 636 enum pmc_class pd_class; /* class of the PMC */ 637 uint32_t pd_width; /* width in bits */ 638 }; 639 640 /* 641 * struct pmc_target 642 * 643 * This structure records all the target processes associated with a 644 * PMC. 645 */ 646 647 struct pmc_target { 648 LIST_ENTRY(pmc_target) pt_next; 649 struct pmc_process *pt_process; /* target descriptor */ 650 }; 651 652 /* 653 * struct pmc 654 * 655 * Describes each allocated PMC. 656 * 657 * Each PMC has precisely one owner, namely the process that allocated 658 * the PMC. 659 * 660 * A PMC may be attached to multiple target processes. The 661 * 'pm_targets' field links all the target processes being monitored 662 * by this PMC. 663 * 664 * The 'pm_savedvalue' field is protected by a mutex. 665 * 666 * On a multi-cpu machine, multiple target threads associated with a 667 * process-virtual PMC could be concurrently executing on different 668 * CPUs. The 'pm_runcount' field is atomically incremented every time 669 * the PMC gets scheduled on a CPU and atomically decremented when it 670 * get descheduled. Deletion of a PMC is only permitted when this 671 * field is '0'. 672 * 673 */ 674 675 struct pmc { 676 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */ 677 LIST_ENTRY(pmc) pm_next; /* owner's list */ 678 679 /* 680 * System-wide PMCs are allocated on a CPU and are not moved 681 * around. For system-wide PMCs we record the CPU the PMC was 682 * allocated on in the 'CPU' field of the pmc ID. 683 * 684 * Virtual PMCs run on whichever CPU is currently executing 685 * their targets' threads. For these PMCs we need to save 686 * their current PMC counter values when they are taken off 687 * CPU. 688 */ 689 690 union { 691 pmc_value_t pm_savedvalue; /* Virtual PMCS */ 692 } pm_gv; 693 694 /* 695 * For sampling mode PMCs, we keep track of the PMC's "reload 696 * count", which is the counter value to be loaded in when 697 * arming the PMC for the next counting session. For counting 698 * modes on PMCs that are read-only (e.g., the x86 TSC), we 699 * keep track of the initial value at the start of 700 * counting-mode operation. 701 */ 702 703 union { 704 pmc_value_t pm_reloadcount; /* sampling PMC modes */ 705 pmc_value_t pm_initial; /* counting PMC modes */ 706 } pm_sc; 707 708 uint32_t pm_stalled; /* marks stalled sampling PMCs */ 709 uint32_t pm_caps; /* PMC capabilities */ 710 enum pmc_event pm_event; /* event being measured */ 711 uint32_t pm_flags; /* additional flags PMC_F_... */ 712 struct pmc_owner *pm_owner; /* owner thread state */ 713 int pm_runcount; /* #cpus currently on */ 714 enum pmc_state pm_state; /* current PMC state */ 715 716 /* 717 * The PMC ID field encodes the row-index for the PMC, its 718 * mode, class and the CPU# associated with the PMC. 719 */ 720 721 pmc_id_t pm_id; /* allocated PMC id */ 722 723 /* md extensions */ 724 union pmc_md_pmc pm_md; 725 }; 726 727 /* 728 * Accessor macros for 'struct pmc' 729 */ 730 731 #define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id) 732 #define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id) 733 #define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id) 734 #define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id) 735 736 737 /* 738 * struct pmc_process 739 * 740 * Record a 'target' process being profiled. 741 * 742 * The target process being profiled could be different from the owner 743 * process which allocated the PMCs. Each target process descriptor 744 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a 745 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]' 746 * array. The size of this structure is thus PMC architecture 747 * dependent. 748 * 749 */ 750 751 struct pmc_targetstate { 752 struct pmc *pp_pmc; /* target PMC */ 753 pmc_value_t pp_pmcval; /* per-process value */ 754 }; 755 756 struct pmc_process { 757 LIST_ENTRY(pmc_process) pp_next; /* hash chain */ 758 int pp_refcnt; /* reference count */ 759 uint32_t pp_flags; /* flags PMC_PP_* */ 760 struct proc *pp_proc; /* target thread */ 761 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */ 762 }; 763 764 #define PMC_PP_ENABLE_MSR_ACCESS 0x00000001 765 766 /* 767 * struct pmc_owner 768 * 769 * We associate a PMC with an 'owner' process. 770 * 771 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its 772 * lifetime, where NCPUS is the numbers of CPUS in the system and 773 * NHWPMC is the number of hardware PMCs per CPU. These are 774 * maintained in the list headed by the 'po_pmcs' to save on space. 775 * 776 */ 777 778 struct pmc_owner { 779 LIST_ENTRY(pmc_owner) po_next; /* hash chain */ 780 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */ 781 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */ 782 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */ 783 struct mtx po_mtx; /* spin lock for (o) */ 784 struct proc *po_owner; /* owner proc */ 785 uint32_t po_flags; /* (k) flags PMC_PO_* */ 786 struct proc *po_kthread; /* (k) helper kthread */ 787 struct pmclog_buffer *po_curbuf; /* current log buffer */ 788 struct file *po_file; /* file reference */ 789 int po_error; /* recorded error */ 790 short po_sscount; /* # SS PMCs owned */ 791 short po_logprocmaps; /* global mappings done */ 792 }; 793 794 #define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */ 795 #define PMC_PO_SHUTDOWN 0x00000010 /* in the process of shutdown */ 796 #define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020 797 798 /* 799 * struct pmc_hw -- describe the state of the PMC hardware 800 * 801 * When in use, a HW PMC is associated with one allocated 'struct pmc' 802 * pointed to by field 'phw_pmc'. When inactive, this field is NULL. 803 * 804 * On an SMP box, one or more HW PMC's in process virtual mode with 805 * the same 'phw_pmc' could be executing on different CPUs. In order 806 * to handle this case correctly, we need to ensure that only 807 * incremental counts get added to the saved value in the associated 808 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC 809 * value at the time the hardware is started during this context 810 * switch (i.e., the difference between the new (hardware) count and 811 * the saved count is atomically added to the count field in 'struct 812 * pmc' at context switch time). 813 * 814 */ 815 816 struct pmc_hw { 817 uint32_t phw_state; /* see PHW_* macros below */ 818 struct pmc *phw_pmc; /* current thread PMC */ 819 }; 820 821 #define PMC_PHW_RI_MASK 0x000000FF 822 #define PMC_PHW_CPU_SHIFT 8 823 #define PMC_PHW_CPU_MASK 0x0000FF00 824 #define PMC_PHW_FLAGS_SHIFT 16 825 #define PMC_PHW_FLAGS_MASK 0xFFFF0000 826 827 #define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK) 828 #define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK) 829 #define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \ 830 PMC_PHW_CPU_MASK) 831 #define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \ 832 PMC_PHW_CPU_SHIFT) 833 #define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \ 834 PMC_PHW_FLAGS_MASK) 835 #define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \ 836 PMC_PHW_FLAGS_SHIFT) 837 #define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01)) 838 #define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02)) 839 840 /* 841 * struct pmc_sample 842 * 843 * Space for N (tunable) PC samples and associated control data. 844 */ 845 846 struct pmc_sample { 847 uint16_t ps_nsamples; /* callchain depth */ 848 uint8_t ps_cpu; /* cpu number */ 849 uint8_t ps_flags; /* other flags */ 850 pid_t ps_pid; /* process PID or -1 */ 851 struct thread *ps_td; /* which thread */ 852 struct pmc *ps_pmc; /* interrupting PMC */ 853 uintptr_t *ps_pc; /* (const) callchain start */ 854 }; 855 856 #define PMC_SAMPLE_FREE ((uint16_t) 0) 857 #define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF) 858 859 struct pmc_samplebuffer { 860 struct pmc_sample * volatile ps_read; /* read pointer */ 861 struct pmc_sample * volatile ps_write; /* write pointer */ 862 uintptr_t *ps_callchains; /* all saved call chains */ 863 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */ 864 struct pmc_sample ps_samples[]; /* array of sample entries */ 865 }; 866 867 868 /* 869 * struct pmc_cpustate 870 * 871 * A CPU is modelled as a collection of HW PMCs with space for additional 872 * flags. 873 */ 874 875 struct pmc_cpu { 876 uint32_t pc_state; /* physical cpu number + flags */ 877 struct pmc_samplebuffer *pc_sb[2]; /* space for samples */ 878 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */ 879 }; 880 881 #define PMC_PCPU_CPU_MASK 0x000000FF 882 #define PMC_PCPU_FLAGS_MASK 0xFFFFFF00 883 #define PMC_PCPU_FLAGS_SHIFT 8 884 #define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK) 885 #define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT) 886 #define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK) 887 #define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK) 888 #define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1)) 889 890 /* 891 * struct pmc_binding 892 * 893 * CPU binding information. 894 */ 895 896 struct pmc_binding { 897 int pb_bound; /* is bound? */ 898 int pb_cpu; /* if so, to which CPU */ 899 }; 900 901 902 struct pmc_mdep; 903 904 /* 905 * struct pmc_classdep 906 * 907 * PMC class-dependent operations. 908 */ 909 struct pmc_classdep { 910 uint32_t pcd_caps; /* class capabilities */ 911 enum pmc_class pcd_class; /* class id */ 912 int pcd_num; /* number of PMCs */ 913 int pcd_ri; /* row index of the first PMC in class */ 914 int pcd_width; /* width of the PMC */ 915 916 /* configuring/reading/writing the hardware PMCs */ 917 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); 918 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); 919 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); 920 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); 921 922 /* pmc allocation/release */ 923 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, 924 const struct pmc_op_pmcallocate *_a); 925 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); 926 927 /* starting and stopping PMCs */ 928 int (*pcd_start_pmc)(int _cpu, int _ri); 929 int (*pcd_stop_pmc)(int _cpu, int _ri); 930 931 /* description */ 932 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi, 933 struct pmc **_ppmc); 934 935 /* class-dependent initialization & finalization */ 936 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu); 937 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu); 938 939 /* machine-specific interface */ 940 int (*pcd_get_msr)(int _ri, uint32_t *_msr); 941 }; 942 943 /* 944 * struct pmc_mdep 945 * 946 * Machine dependent bits needed per CPU type. 947 */ 948 949 struct pmc_mdep { 950 uint32_t pmd_cputype; /* from enum pmc_cputype */ 951 uint32_t pmd_npmc; /* number of PMCs per CPU */ 952 uint32_t pmd_nclass; /* number of PMC classes present */ 953 954 /* 955 * Machine dependent methods. 956 */ 957 958 /* per-cpu initialization and finalization */ 959 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu); 960 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu); 961 962 /* thread context switch in/out */ 963 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp); 964 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp); 965 966 /* handle a PMC interrupt */ 967 int (*pmd_intr)(int _cpu, struct trapframe *_tf); 968 969 /* 970 * PMC class dependent information. 971 */ 972 struct pmc_classdep pmd_classdep[]; 973 }; 974 975 /* 976 * Per-CPU state. This is an array of 'mp_ncpu' pointers 977 * to struct pmc_cpu descriptors. 978 */ 979 980 extern struct pmc_cpu **pmc_pcpu; 981 982 /* driver statistics */ 983 extern struct pmc_op_getdriverstats pmc_stats; 984 985 #if defined(DEBUG) 986 987 /* debug flags, major flag groups */ 988 struct pmc_debugflags { 989 int pdb_CPU; 990 int pdb_CSW; 991 int pdb_LOG; 992 int pdb_MDP; 993 int pdb_MOD; 994 int pdb_OWN; 995 int pdb_PMC; 996 int pdb_PRC; 997 int pdb_SAM; 998 }; 999 1000 extern struct pmc_debugflags pmc_debugflags; 1001 1002 #define PMC_DEBUG_STRSIZE 128 1003 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 } 1004 1005 #define PMCDBG(M,N,L,F,...) do { \ 1006 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ 1007 printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \ 1008 } while (0) 1009 1010 /* Major numbers */ 1011 #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */ 1012 #define PMC_DEBUG_MAJ_CSW 1 /* context switches */ 1013 #define PMC_DEBUG_MAJ_LOG 2 /* logging */ 1014 #define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */ 1015 #define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */ 1016 #define PMC_DEBUG_MAJ_OWN 5 /* owner */ 1017 #define PMC_DEBUG_MAJ_PMC 6 /* pmc management */ 1018 #define PMC_DEBUG_MAJ_PRC 7 /* processes */ 1019 #define PMC_DEBUG_MAJ_SAM 8 /* sampling */ 1020 1021 /* Minor numbers */ 1022 1023 /* Common (8 bits) */ 1024 #define PMC_DEBUG_MIN_ALL 0 /* allocation */ 1025 #define PMC_DEBUG_MIN_REL 1 /* release */ 1026 #define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */ 1027 #define PMC_DEBUG_MIN_INI 3 /* init */ 1028 #define PMC_DEBUG_MIN_FND 4 /* find */ 1029 1030 /* MODULE */ 1031 #define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */ 1032 #define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */ 1033 1034 /* OWN */ 1035 #define PMC_DEBUG_MIN_ORM 8 /* owner remove */ 1036 #define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */ 1037 1038 /* PROCESSES */ 1039 #define PMC_DEBUG_MIN_TLK 8 /* link target */ 1040 #define PMC_DEBUG_MIN_TUL 9 /* unlink target */ 1041 #define PMC_DEBUG_MIN_EXT 10 /* process exit */ 1042 #define PMC_DEBUG_MIN_EXC 11 /* process exec */ 1043 #define PMC_DEBUG_MIN_FRK 12 /* process fork */ 1044 #define PMC_DEBUG_MIN_ATT 13 /* attach/detach */ 1045 #define PMC_DEBUG_MIN_SIG 14 /* signalling */ 1046 1047 /* CONTEXT SWITCHES */ 1048 #define PMC_DEBUG_MIN_SWI 8 /* switch in */ 1049 #define PMC_DEBUG_MIN_SWO 9 /* switch out */ 1050 1051 /* PMC */ 1052 #define PMC_DEBUG_MIN_REG 8 /* pmc register */ 1053 #define PMC_DEBUG_MIN_ALR 9 /* allocate row */ 1054 1055 /* MACHINE DEPENDENT LAYER */ 1056 #define PMC_DEBUG_MIN_REA 8 /* read */ 1057 #define PMC_DEBUG_MIN_WRI 9 /* write */ 1058 #define PMC_DEBUG_MIN_CFG 10 /* config */ 1059 #define PMC_DEBUG_MIN_STA 11 /* start */ 1060 #define PMC_DEBUG_MIN_STO 12 /* stop */ 1061 #define PMC_DEBUG_MIN_INT 13 /* interrupts */ 1062 1063 /* CPU */ 1064 #define PMC_DEBUG_MIN_BND 8 /* bind */ 1065 #define PMC_DEBUG_MIN_SEL 9 /* select */ 1066 1067 /* LOG */ 1068 #define PMC_DEBUG_MIN_GTB 8 /* get buf */ 1069 #define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */ 1070 #define PMC_DEBUG_MIN_FLS 10 /* flush */ 1071 #define PMC_DEBUG_MIN_SAM 11 /* sample */ 1072 #define PMC_DEBUG_MIN_CLO 12 /* close */ 1073 1074 #else 1075 #define PMCDBG(M,N,L,F,...) /* nothing */ 1076 #endif 1077 1078 /* declare a dedicated memory pool */ 1079 MALLOC_DECLARE(M_PMC); 1080 1081 /* 1082 * Functions 1083 */ 1084 1085 struct pmc_mdep *pmc_md_initialize(void); /* MD init function */ 1086 void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */ 1087 int pmc_getrowdisp(int _ri); 1088 int pmc_process_interrupt(int _cpu, int _soft, struct pmc *_pm, 1089 struct trapframe *_tf, int _inuserspace); 1090 int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples, 1091 struct trapframe *_tf); 1092 int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples, 1093 struct trapframe *_tf); 1094 struct pmc_mdep *pmc_mdep_alloc(int nclasses); 1095 void pmc_mdep_free(struct pmc_mdep *md); 1096 #endif /* _KERNEL */ 1097 #endif /* _SYS_PMC_H_ */ 1098