| /openbsd/src/sys/dev/pci/drm/i915/display/ |
| D | intel_combo_phy_regs.h | 17 #define _ICL_COMBOPHY(phy) _PICK(phy, _ICL_COMBOPHY_A, \ argument
24 #define _ICL_PORT_CL_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ argument
27 #define ICL_PORT_CL_DW5(phy) _MMIO(_ICL_PORT_CL_DW(5, phy)) argument
31 #define ICL_PORT_CL_DW10(phy) _MMIO(_ICL_PORT_CL_DW(10, phy)) argument
46 #define ICL_PORT_CL_DW12(phy) _MMIO(_ICL_PORT_CL_DW(12, phy)) argument
51 #define _ICL_PORT_COMP_DW(dw, phy) (_ICL_COMBOPHY(phy) + \ argument
54 #define ICL_PORT_COMP_DW0(phy) _MMIO(_ICL_PORT_COMP_DW(0, phy)) argument
57 #define ICL_PORT_COMP_DW1(phy) _MMIO(_ICL_PORT_COMP_DW(1, phy)) argument
59 #define ICL_PORT_COMP_DW3(phy) _MMIO(_ICL_PORT_COMP_DW(3, phy)) argument
69 #define ICL_PORT_COMP_DW8(phy) _MMIO(_ICL_PORT_COMP_DW(8, phy)) argument
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| D | intel_snps_phy_regs.h | 13 #define _SNPS_PHY(phy) _PHY(phy, \ argument
16 #define _SNPS2(phy, reg) (_SNPS_PHY(phy) - \ argument
18 #define _MMIO_SNPS(phy, reg) _MMIO(_SNPS2(phy, reg)) argument
19 #define _MMIO_SNPS_LN(ln, phy, reg) _MMIO(_SNPS2(phy, \ argument
22 #define SNPS_PHY_MPLLB_CP(phy) _MMIO_SNPS(phy, 0x168000) argument
28 #define SNPS_PHY_MPLLB_DIV(phy) _MMIO_SNPS(phy, 0x168004) argument
41 #define SNPS_PHY_MPLLB_FRACN1(phy) _MMIO_SNPS(phy, 0x168008) argument
46 #define SNPS_PHY_MPLLB_FRACN2(phy) _MMIO_SNPS(phy, 0x16800C) argument
50 #define SNPS_PHY_MPLLB_SSCEN(phy) _MMIO_SNPS(phy, 0x168014) argument
55 #define SNPS_PHY_MPLLB_SSCSTEP(phy) _MMIO_SNPS(phy, 0x168018) argument
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| D | bxt_dpio_phy_regs.h | 15 #define BXT_PHY_BASE(phy) \ argument
20 #define _BXT_PHY(phy, reg) \ argument
23 #define _BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
26 #define _MMIO_BXT_PHY_CH(phy, ch, reg_ch0, reg_ch1) \ argument
30 #define _MMIO_BXT_PHY_CH_LN(phy, ch, lane, reg_ch0, reg_ch1) \ argument
51 #define BXT_PORT_PLL_EBB_0(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
60 #define BXT_PORT_PLL_EBB_4(phy, ch) _MMIO_BXT_PHY_CH(phy, ch, \ argument
95 #define _PORT_PLL_BASE(phy, ch) _BXT_PHY_CH(phy, ch, \ argument
98 #define BXT_PORT_PLL(phy, ch, idx) _MMIO(_PORT_PLL_BASE(phy, ch) + \ argument
106 #define BXT_PORT_CL1CM_DW0(phy) _BXT_PHY((phy), _PORT_CL1CM_DW0_BC) argument
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| D | intel_combo_phy.c | 55 icl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) in icl_get_procmon_ref_values()
78 enum phy phy) in icl_set_procmon_ref_values()
92 enum phy phy, i915_reg_t reg, u32 mask, in check_phy_reg()
110 enum phy phy) in icl_verify_procmon_ref_values()
127 static bool has_phy_misc(struct drm_i915_private *i915, enum phy phy) in has_phy_misc()
149 enum phy phy) in icl_combo_phy_enabled()
189 static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy) in phy_is_master()
218 enum phy phy) in icl_combo_phy_verify_state()
260 enum phy phy, bool is_dsi, in intel_combo_phy_power_up_lanes()
310 enum phy phy; in icl_combo_phys_init() local
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| D | intel_dpio_phy.c | 234 bxt_get_phy_info(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_get_phy_info()
244 enum dpio_phy *phy, enum dpio_channel *ch) in bxt_port_to_phy_channel()
298 enum dpio_phy phy; in bxt_dpio_phy_set_signal_levels() local
353 enum dpio_phy phy) in bxt_dpio_phy_is_enabled()
380 static u32 bxt_get_grc(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_get_grc()
388 enum dpio_phy phy) in bxt_phy_wait_grc_done()
397 enum dpio_phy phy) in _bxt_dpio_phy_init()
477 void bxt_dpio_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_dpio_phy_uninit()
488 void bxt_dpio_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_dpio_phy_init()
515 __phy_reg_verify_state(struct drm_i915_private *dev_priv, enum dpio_phy phy, in __phy_reg_verify_state()
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| D | intel_dpio_phy.h | 77 enum dpio_phy *phy, enum dpio_channel *ch) in bxt_port_to_phy_channel()
84 static inline void bxt_dpio_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_dpio_phy_init()
87 static inline void bxt_dpio_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy) in bxt_dpio_phy_uninit()
91 enum dpio_phy phy) in bxt_dpio_phy_is_enabled()
96 enum dpio_phy phy) in bxt_dpio_phy_verify_state()
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| D | intel_snps_phy.c | 30 enum phy phy; in intel_snps_phy_wait_for_calibration() local
51 enum phy phy = intel_encoder_to_phy(encoder); in intel_snps_phy_update_psr_power_state() local
68 enum phy phy = intel_encoder_to_phy(encoder); in intel_snps_phy_set_signal_levels() local
1827 enum phy phy = intel_encoder_to_phy(encoder); in intel_mpllb_enable() local
1884 enum phy phy = intel_encoder_to_phy(encoder); in intel_mpllb_disable() local
1956 enum phy phy = intel_encoder_to_phy(encoder); in intel_mpllb_readout_hw_state() local
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| D | intel_cx0_phy.c | 35 enum phy phy = intel_encoder_to_phy(encoder); in intel_encoder_is_c10phy() local
132 enum phy phy = intel_encoder_to_phy(encoder); in intel_cx0_bus_reset() local
152 enum phy phy = intel_encoder_to_phy(encoder); in intel_cx0_wait_for_ack() local
195 enum phy phy = intel_encoder_to_phy(encoder); in __intel_cx0_read_once() local
233 enum phy phy = intel_encoder_to_phy(encoder); in __intel_cx0_read() local
265 enum phy phy = intel_encoder_to_phy(encoder); in __intel_cx0_write_once() local
322 enum phy phy = intel_encoder_to_phy(encoder); in __intel_cx0_write() local
2735 enum phy phy = intel_encoder_to_phy(encoder); in intel_cx0_powerdown_change_sequence() local
2808 enum phy phy = intel_encoder_to_phy(encoder); in intel_cx0_phy_lane_reset() local
2930 enum phy phy = intel_encoder_to_phy(encoder); in intel_cx0pll_enable() local
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| D | icl_dsi.c | 236 enum phy phy; in dsi_program_swing_and_deemphasis() local
415 enum phy phy; in gen11_dsi_power_up_lanes() local
426 enum phy phy; in gen11_dsi_config_phy_lanes_sequence() local
469 enum phy phy; in gen11_dsi_voltage_swing_program_seq() local
531 enum phy phy; in gen11_dsi_setup_dphy_timings() local
605 enum phy phy; in gen11_dsi_gate_clocks() local
621 enum phy phy; in gen11_dsi_ungate_clocks() local
637 enum phy phy; in gen11_dsi_is_clock_enabled() local
656 enum phy phy; in gen11_dsi_map_pll() local
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| D | intel_ddi.c | 993 enum phy phy = intel_encoder_to_phy(encoder); in intel_ddi_enable_transcoder_clock() local
1122 enum phy phy = intel_encoder_to_phy(encoder); in icl_ddi_combo_vswing_program() local
1185 enum phy phy = intel_encoder_to_phy(encoder); in icl_combo_phy_set_signal_levels() local
1535 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_enable_clock() local
1549 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_disable_clock() local
1558 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_is_clock_enabled() local
1567 enum phy phy = intel_encoder_to_phy(encoder); in adls_ddi_get_pll() local
1579 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_enable_clock() local
1593 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_disable_clock() local
1602 enum phy phy = intel_encoder_to_phy(encoder); in rkl_ddi_is_clock_enabled() local
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| D | intel_hti_regs.h | 13 #define HDPORT_DDI_USED(phy) REG_BIT(2 * (phy) + 1) argument
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| D | intel_hti.c | 22 bool intel_hti_uses_phy(struct intel_display *display, enum phy phy) in intel_hti_uses_phy()
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| D | intel_display_power_well.c | 548 enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well); in icl_aux_power_well_enable() local
563 enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well); in icl_aux_power_well_disable() local
1426 enum dpio_phy phy; in chv_dpio_cmn_power_well_enable() local
1488 enum dpio_phy phy; in chv_dpio_cmn_power_well_disable() local
1519 static void assert_chv_phy_powergate(struct drm_i915_private *dev_priv, enum dpio_phy phy, in assert_chv_phy_powergate()
1583 bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy, in chv_phy_powergate_ch()
1621 enum dpio_phy phy = vlv_dig_port_to_phy(enc_to_dig_port(encoder)); in chv_phy_powergate_lanes() local
1817 enum phy phy = icl_aux_pw_to_phy(dev_priv, power_well); in xelpdp_aux_power_well_enable() local
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| /openbsd/src/sys/dev/pci/ |
| D | igc_phy.c | 19 struct igc_phy_info *phy = &hw->phy; in igc_init_phy_ops_generic() local
137 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id() local
174 struct igc_phy_info *phy = &hw->phy; in igc_read_phy_reg_mdic() local
232 struct igc_phy_info *phy = &hw->phy; in igc_write_phy_reg_mdic() local
287 struct igc_phy_info *phy = &hw->phy; in igc_phy_setup_autoneg() local
465 struct igc_phy_info *phy = &hw->phy; in igc_copper_link_autoneg() local
581 struct igc_phy_info *phy = &hw->phy; in igc_check_downshift_generic() local
699 struct igc_phy_info *phy = &hw->phy; in igc_phy_hw_reset_generic() local
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| D | if_em_soc.c | 49 gcu_miibus_readreg(struct em_hw *hw, int phy, int reg) in gcu_miibus_readreg()
97 gcu_miibus_writereg(struct em_hw *hw, int phy, int reg, int val) in gcu_miibus_writereg()
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| /openbsd/src/sys/dev/fdt/ |
| D | mvsw.c | 116 uint32_t phy; in mvsw_attach() local
193 mvsw_smi_read(struct mvsw_softc *sc, int phy, int reg) in mvsw_smi_read()
209 mvsw_smi_write(struct mvsw_softc *sc, int phy, int reg, int val) in mvsw_smi_write()
239 mvsw_phy_read(struct mvsw_softc *sc, int phy, int reg) in mvsw_phy_read()
255 mvsw_phy_write(struct mvsw_softc *sc, int phy, int reg, int val) in mvsw_phy_write()
331 int phy; in mvsw_phy_enable() local
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| D | mvmdio.c | 120 mvmdio_smi_readreg(struct device *dev, int phy, int reg) in mvmdio_smi_readreg()
158 mvmdio_smi_writereg(struct device *dev, int phy, int reg, int val) in mvmdio_smi_writereg()
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| /openbsd/src/sys/dev/ic/ |
| D | ax88190.c | 153 ax88190_mii_readreg(struct device *self, int phy, int reg) in ax88190_mii_readreg()
159 ax88190_mii_writereg(struct device *self, int phy, int reg, int val) in ax88190_mii_writereg()
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| D | dl10019.c | 197 dl10019_mii_readreg(struct device *self, int phy, int reg) in dl10019_mii_readreg()
209 dl10019_mii_writereg(struct device *self, int phy, int reg, int val) in dl10019_mii_writereg()
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| D | hme.c | 934 int phy; in hme_mifinit() local
964 hme_mii_readreg(struct device *self, int phy, int reg) in hme_mii_readreg()
1020 hme_mii_writereg(struct device *self, int phy, int reg, int val) in hme_mii_writereg()
1107 int phy = sc->sc_phys[instance]; in hme_mediachange() local
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| D | bwi.c | 706 struct bwi_phy *phy; in bwi_attach() local
1391 struct bwi_phy *phy = &mac->mac_phy; in bwi_mac_setup_tpctl() local
1555 struct bwi_phy *phy = &mac->mac_phy; in bwi_mac_init_tpctl_11bg() local
2150 struct bwi_phy *phy = &mac->mac_phy; in bwi_mac_hostflags_init() local
2179 struct bwi_phy *phy = &mac->mac_phy; in bwi_mac_bss_param_init() local
2831 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_attach() local
2901 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_set_bbp_atten() local
2920 struct bwi_phy *phy = &mac->mac_phy; in bwi_phy_calibrate() local
2943 struct bwi_phy *phy = &mac->mac_phy; in bwi_tbl_write_2() local
2953 struct bwi_phy *phy = &mac->mac_phy; in bwi_tbl_write_4() local
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| D | mtd8xx.c | 214 mtd_mii_command(struct mtd_softc *sc, int opcode, int phy, int reg) in mtd_mii_command()
249 mtd_miibus_readreg(struct device *self, int phy, int reg) in mtd_miibus_readreg()
278 mtd_miibus_writereg(struct device *self, int phy, int reg, int val) in mtd_miibus_writereg()
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| /openbsd/src/sys/dev/mii/ |
| D | mii_bitbang.c | 114 mii_bitbang_readreg(struct device *sc, mii_bitbang_ops_t ops, int phy, in mii_bitbang_readreg()
163 int phy, int reg, int val) in mii_bitbang_writereg()
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| /openbsd/src/sys/dev/sbus/ |
| D | be.c | 1158 be_pal_gate(struct be_softc *sc, int phy) in be_pal_gate()
1175 be_tcvr_read_bit(struct be_softc *sc, int phy) in be_tcvr_read_bit()
1203 be_tcvr_write_bit(struct be_softc *sc, int phy, int bit) in be_tcvr_write_bit()
1223 be_mii_sendbits(struct be_softc *sc, int phy, u_int32_t data, int nbits) in be_mii_sendbits()
1232 be_mii_readreg(struct device *self, int phy, int reg) in be_mii_readreg()
1260 be_mii_writereg(struct device *self, int phy, int reg, int val) in be_mii_writereg()
1282 be_mii_reset(struct be_softc *sc, int phy) in be_mii_reset()
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| /openbsd/src/sys/dev/pci/drm/i915/ |
| D | vlv_sideband.c | 202 static u32 vlv_dpio_phy_iosf_port(struct drm_i915_private *i915, enum dpio_phy phy) in vlv_dpio_phy_iosf_port()
214 u32 vlv_dpio_read(struct drm_i915_private *i915, enum dpio_phy phy, int reg) in vlv_dpio_read()
233 enum dpio_phy phy, int reg, u32 val) in vlv_dpio_write()
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