1 /*-
2 * CAM SCSI device driver for the Adaptec 174X SCSI Host adapter
3 *
4 * Copyright (c) 1998 Justin T. Gibbs
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice immediately at the beginning of the file, without modification,
12 * this list of conditions, and the following disclaimer.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #include <sys/param.h>
32 #include <sys/conf.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/malloc.h>
36 #include <sys/module.h>
37 #include <sys/lock.h>
38 #include <sys/mutex.h>
39 #include <sys/bus.h>
40
41 #include <machine/bus.h>
42 #include <machine/resource.h>
43 #include <sys/rman.h>
44
45 #include <cam/cam.h>
46 #include <cam/cam_ccb.h>
47 #include <cam/cam_sim.h>
48 #include <cam/cam_xpt_sim.h>
49 #include <cam/cam_debug.h>
50
51 #include <cam/scsi/scsi_message.h>
52
53 #include <dev/eisa/eisaconf.h>
54
55 #include <dev/ahb/ahbreg.h>
56
57 #define ccb_ecb_ptr spriv_ptr0
58 #define ccb_ahb_ptr spriv_ptr1
59
60 #define ahb_inb(ahb, port) \
61 bus_read_1((ahb)->res, port)
62
63 #define ahb_inl(ahb, port) \
64 bus_read_4((ahb)->res, port)
65
66 #define ahb_outb(ahb, port, value) \
67 bus_write_1((ahb)->res, port, value)
68
69 #define ahb_outl(ahb, port, value) \
70 bus_write_4((ahb)->res, port, value)
71
72 static const char *ahbmatch(eisa_id_t type);
73 static struct ahb_softc *ahballoc(device_t dev, struct resource *res);
74 static void ahbfree(struct ahb_softc *ahb);
75 static int ahbreset(struct ahb_softc *ahb);
76 static void ahbmapecbs(void *arg, bus_dma_segment_t *segs,
77 int nseg, int error);
78 static int ahbxptattach(struct ahb_softc *ahb);
79 static void ahbhandleimmed(struct ahb_softc *ahb,
80 u_int32_t mbox, u_int intstat);
81 static void ahbcalcresid(struct ahb_softc *ahb,
82 struct ecb *ecb, union ccb *ccb);
83 static __inline void ahbdone(struct ahb_softc *ahb, u_int32_t mbox,
84 u_int intstat);
85 static void ahbintr(void *arg);
86 static void ahbintr_locked(struct ahb_softc *ahb);
87 static bus_dmamap_callback_t ahbexecuteecb;
88 static void ahbaction(struct cam_sim *sim, union ccb *ccb);
89 static void ahbpoll(struct cam_sim *sim);
90
91 /* Our timeout handler */
92 static void ahbtimeout(void *arg);
93
94 static __inline struct ecb* ahbecbget(struct ahb_softc *ahb);
95 static __inline void ahbecbfree(struct ahb_softc* ahb,
96 struct ecb* ecb);
97 static __inline u_int32_t ahbecbvtop(struct ahb_softc *ahb,
98 struct ecb *ecb);
99 static __inline struct ecb* ahbecbptov(struct ahb_softc *ahb,
100 u_int32_t ecb_addr);
101 static __inline u_int32_t ahbstatuspaddr(u_int32_t ecb_paddr);
102 static __inline u_int32_t ahbsensepaddr(u_int32_t ecb_paddr);
103 static __inline u_int32_t ahbsgpaddr(u_int32_t ecb_paddr);
104 static __inline void ahbqueuembox(struct ahb_softc *ahb,
105 u_int32_t mboxval,
106 u_int attn_code);
107
108 static __inline struct ecb*
ahbecbget(struct ahb_softc * ahb)109 ahbecbget(struct ahb_softc *ahb)
110 {
111 struct ecb* ecb;
112
113 if (!dumping)
114 mtx_assert(&ahb->lock, MA_OWNED);
115 if ((ecb = SLIST_FIRST(&ahb->free_ecbs)) != NULL)
116 SLIST_REMOVE_HEAD(&ahb->free_ecbs, links);
117
118 return (ecb);
119 }
120
121 static __inline void
ahbecbfree(struct ahb_softc * ahb,struct ecb * ecb)122 ahbecbfree(struct ahb_softc* ahb, struct ecb* ecb)
123 {
124
125 if (!dumping)
126 mtx_assert(&ahb->lock, MA_OWNED);
127 ecb->state = ECB_FREE;
128 SLIST_INSERT_HEAD(&ahb->free_ecbs, ecb, links);
129 }
130
131 static __inline u_int32_t
ahbecbvtop(struct ahb_softc * ahb,struct ecb * ecb)132 ahbecbvtop(struct ahb_softc *ahb, struct ecb *ecb)
133 {
134 return (ahb->ecb_physbase
135 + (u_int32_t)((caddr_t)ecb - (caddr_t)ahb->ecb_array));
136 }
137
138 static __inline struct ecb*
ahbecbptov(struct ahb_softc * ahb,u_int32_t ecb_addr)139 ahbecbptov(struct ahb_softc *ahb, u_int32_t ecb_addr)
140 {
141 return (ahb->ecb_array
142 + ((struct ecb*)(uintptr_t)ecb_addr
143 - (struct ecb*)(uintptr_t)ahb->ecb_physbase));
144 }
145
146 static __inline u_int32_t
ahbstatuspaddr(u_int32_t ecb_paddr)147 ahbstatuspaddr(u_int32_t ecb_paddr)
148 {
149 return (ecb_paddr + offsetof(struct ecb, status));
150 }
151
152 static __inline u_int32_t
ahbsensepaddr(u_int32_t ecb_paddr)153 ahbsensepaddr(u_int32_t ecb_paddr)
154 {
155 return (ecb_paddr + offsetof(struct ecb, sense));
156 }
157
158 static __inline u_int32_t
ahbsgpaddr(u_int32_t ecb_paddr)159 ahbsgpaddr(u_int32_t ecb_paddr)
160 {
161 return (ecb_paddr + offsetof(struct ecb, sg_list));
162 }
163
164 static __inline void
ahbqueuembox(struct ahb_softc * ahb,u_int32_t mboxval,u_int attn_code)165 ahbqueuembox(struct ahb_softc *ahb, u_int32_t mboxval, u_int attn_code)
166 {
167 u_int loopmax = 300;
168 while (--loopmax) {
169 u_int status;
170
171 status = ahb_inb(ahb, HOSTSTAT);
172 if ((status & (HOSTSTAT_MBOX_EMPTY|HOSTSTAT_BUSY))
173 == HOSTSTAT_MBOX_EMPTY)
174 break;
175 DELAY(20);
176 }
177 if (loopmax == 0)
178 panic("%s: adapter not taking commands\n",
179 device_get_nameunit(ahb->dev));
180
181 ahb_outl(ahb, MBOXOUT0, mboxval);
182 ahb_outb(ahb, ATTN, attn_code);
183 }
184
185 static const char *
ahbmatch(eisa_id_t type)186 ahbmatch(eisa_id_t type)
187 {
188 switch(type & 0xfffffe00) {
189 case EISA_DEVICE_ID_ADAPTEC_1740:
190 return ("Adaptec 174x SCSI host adapter");
191 break;
192 default:
193 break;
194 }
195 return (NULL);
196 }
197
198 static int
ahbprobe(device_t dev)199 ahbprobe(device_t dev)
200 {
201 const char *desc;
202 u_int32_t iobase;
203 u_int32_t irq;
204 u_int8_t intdef;
205 int shared;
206
207 desc = ahbmatch(eisa_get_id(dev));
208 if (!desc)
209 return (ENXIO);
210 device_set_desc(dev, desc);
211
212 iobase = (eisa_get_slot(dev) * EISA_SLOT_SIZE) +
213 AHB_EISA_SLOT_OFFSET;
214
215 eisa_add_iospace(dev, iobase, AHB_EISA_IOSIZE, RESVADDR_NONE);
216
217 intdef = inb(INTDEF + iobase);
218 switch (intdef & 0x7) {
219 case INT9:
220 irq = 9;
221 break;
222 case INT10:
223 irq = 10;
224 break;
225 case INT11:
226 irq = 11;
227 break;
228 case INT12:
229 irq = 12;
230 break;
231 case INT14:
232 irq = 14;
233 break;
234 case INT15:
235 irq = 15;
236 break;
237 default:
238 printf("Adaptec 174X at slot %d: illegal "
239 "irq setting %d\n", eisa_get_slot(dev),
240 (intdef & 0x7));
241 irq = 0;
242 break;
243 }
244 if (irq == 0)
245 return ENXIO;
246
247 shared = (inb(INTDEF + iobase) & INTLEVEL) ?
248 EISA_TRIGGER_LEVEL : EISA_TRIGGER_EDGE;
249
250 eisa_add_intr(dev, irq, shared);
251
252 return 0;
253 }
254
255 static int
ahbattach(device_t dev)256 ahbattach(device_t dev)
257 {
258 /*
259 * find unit and check we have that many defined
260 */
261 struct ahb_softc *ahb;
262 struct ecb* next_ecb;
263 struct resource *io;
264 struct resource *irq;
265 int rid;
266 void *ih;
267
268 irq = NULL;
269 rid = 0;
270 io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
271 if (io == NULL) {
272 device_printf(dev, "No I/O space?!\n");
273 return ENOMEM;
274 }
275
276 ahb = ahballoc(dev, io);
277
278 if (ahbreset(ahb) != 0)
279 goto error_exit;
280
281 rid = 0;
282 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
283 if (irq == NULL) {
284 device_printf(dev, "Can't allocate interrupt\n");
285 goto error_exit;
286 }
287
288 /*
289 * Create our DMA tags. These tags define the kinds of device
290 * accessible memory allocations and memory mappings we will
291 * need to perform during normal operation.
292 */
293 /* DMA tag for mapping buffers into device visible space. */
294 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(dev),
295 /* alignment */ 1,
296 /* boundary */ 0,
297 /* lowaddr */ BUS_SPACE_MAXADDR_32BIT,
298 /* highaddr */ BUS_SPACE_MAXADDR,
299 /* filter */ NULL,
300 /* filterarg */ NULL,
301 /* maxsize */ DFLTPHYS,
302 /* nsegments */ AHB_NSEG,
303 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
304 /* flags */ BUS_DMA_ALLOCNOW,
305 /* lockfunc */ busdma_lock_mutex,
306 /* lockarg */ &ahb->lock,
307 &ahb->buffer_dmat) != 0)
308 goto error_exit;
309
310 ahb->init_level++;
311
312 /* DMA tag for our ccb structures and ha inquiry data */
313 if (bus_dma_tag_create( /* parent */ bus_get_dma_tag(dev),
314 /* alignment */ 1,
315 /* boundary */ 0,
316 /* lowaddr */ BUS_SPACE_MAXADDR_32BIT,
317 /* highaddr */ BUS_SPACE_MAXADDR,
318 /* filter */ NULL,
319 /* filterarg */ NULL,
320 /* maxsize */ (AHB_NECB *
321 sizeof(struct ecb))
322 + sizeof(*ahb->ha_inq_data),
323 /* nsegments */ 1,
324 /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT,
325 /* flags */ 0,
326 /* lockfunc */ NULL,
327 /* lockarg */ NULL,
328 &ahb->ecb_dmat) != 0)
329 goto error_exit;
330
331 ahb->init_level++;
332
333 /* Allocation for our ccbs */
334 if (bus_dmamem_alloc(ahb->ecb_dmat, (void **)&ahb->ecb_array,
335 BUS_DMA_NOWAIT, &ahb->ecb_dmamap) != 0)
336 goto error_exit;
337
338 ahb->ha_inq_data = (struct ha_inquiry_data *)&ahb->ecb_array[AHB_NECB];
339
340 ahb->init_level++;
341
342 /* And permanently map them */
343 bus_dmamap_load(ahb->ecb_dmat, ahb->ecb_dmamap,
344 ahb->ecb_array, AHB_NSEG * sizeof(struct ecb),
345 ahbmapecbs, ahb, /*flags*/0);
346
347 ahb->init_level++;
348
349 /* Allocate the buffer dmamaps for each of our ECBs */
350 bzero(ahb->ecb_array, (AHB_NECB * sizeof(struct ecb))
351 + sizeof(*ahb->ha_inq_data));
352 next_ecb = ahb->ecb_array;
353 while (ahb->num_ecbs < AHB_NECB) {
354 u_int32_t ecb_paddr;
355
356 if (bus_dmamap_create(ahb->buffer_dmat, /*flags*/0,
357 &next_ecb->dmamap))
358 break;
359 callout_init_mtx(&next_ecb->timer, &ahb->lock, 0);
360 ecb_paddr = ahbecbvtop(ahb, next_ecb);
361 next_ecb->hecb.status_ptr = ahbstatuspaddr(ecb_paddr);
362 next_ecb->hecb.sense_ptr = ahbsensepaddr(ecb_paddr);
363 ahb->num_ecbs++;
364 ahbecbfree(ahb, next_ecb);
365 next_ecb++;
366 }
367
368 ahb->init_level++;
369
370 /*
371 * Now that we know we own the resources we need, register
372 * our bus with the XPT.
373 */
374 if (ahbxptattach(ahb))
375 goto error_exit;
376
377 /* Enable our interrupt */
378 if (bus_setup_intr(dev, irq, INTR_TYPE_CAM|INTR_ENTROPY|INTR_MPSAFE,
379 NULL, ahbintr, ahb, &ih) != 0)
380 goto error_exit;
381
382 return (0);
383
384 error_exit:
385 /*
386 * The board's IRQ line will not be left enabled
387 * if we can't initialize correctly, so its safe
388 * to release the irq.
389 */
390 ahbfree(ahb);
391 if (irq != NULL)
392 bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
393 bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
394 return (-1);
395 }
396
397 static struct ahb_softc *
ahballoc(device_t dev,struct resource * res)398 ahballoc(device_t dev, struct resource *res)
399 {
400 struct ahb_softc *ahb;
401
402 ahb = device_get_softc(dev);
403 SLIST_INIT(&ahb->free_ecbs);
404 LIST_INIT(&ahb->pending_ccbs);
405 ahb->res = res;
406 ahb->disc_permitted = ~0;
407 ahb->tags_permitted = ~0;
408 ahb->dev = dev;
409 mtx_init(&ahb->lock, "ahb", NULL, MTX_DEF);
410
411 return (ahb);
412 }
413
414 static void
ahbfree(struct ahb_softc * ahb)415 ahbfree(struct ahb_softc *ahb)
416 {
417 switch (ahb->init_level) {
418 default:
419 case 4:
420 bus_dmamap_unload(ahb->ecb_dmat, ahb->ecb_dmamap);
421 case 3:
422 bus_dmamem_free(ahb->ecb_dmat, ahb->ecb_array,
423 ahb->ecb_dmamap);
424 case 2:
425 bus_dma_tag_destroy(ahb->ecb_dmat);
426 case 1:
427 bus_dma_tag_destroy(ahb->buffer_dmat);
428 case 0:
429 break;
430 }
431 mtx_destroy(&ahb->lock);
432 }
433
434 /*
435 * reset board, If it doesn't respond, return failure
436 */
437 static int
ahbreset(struct ahb_softc * ahb)438 ahbreset(struct ahb_softc *ahb)
439 {
440 int wait = 1000; /* 1 sec enough? */
441 int test;
442
443 if ((ahb_inb(ahb, PORTADDR) & PORTADDR_ENHANCED) == 0) {
444 printf("ahb_reset: Controller not in enhanced mode\n");
445 return (-1);
446 }
447
448 ahb_outb(ahb, CONTROL, CNTRL_HARD_RST);
449 DELAY(1000);
450 ahb_outb(ahb, CONTROL, 0);
451 while (--wait) {
452 DELAY(1000);
453 if ((ahb_inb(ahb, HOSTSTAT) & HOSTSTAT_BUSY) == 0)
454 break;
455 }
456
457 if (wait == 0) {
458 printf("ahbreset: No answer from aha1742 board\n");
459 return (-1);
460 }
461 if ((test = ahb_inb(ahb, MBOXIN0)) != 0) {
462 printf("ahb_reset: self test failed, val = 0x%x\n", test);
463 return (-1);
464 }
465 while (ahb_inb(ahb, HOSTSTAT) & HOSTSTAT_INTPEND) {
466 ahb_outb(ahb, CONTROL, CNTRL_CLRINT);
467 DELAY(10000);
468 }
469 return (0);
470 }
471
472 static void
ahbmapecbs(void * arg,bus_dma_segment_t * segs,int nseg,int error)473 ahbmapecbs(void *arg, bus_dma_segment_t *segs, int nseg, int error)
474 {
475 struct ahb_softc* ahb;
476
477 ahb = (struct ahb_softc*)arg;
478 ahb->ecb_physbase = segs->ds_addr;
479 /*
480 * Space for adapter inquiry information is on the
481 * tail of the ecb array.
482 */
483 ahb->ha_inq_physbase = ahbecbvtop(ahb, &ahb->ecb_array[AHB_NECB]);
484 }
485
486 static int
ahbxptattach(struct ahb_softc * ahb)487 ahbxptattach(struct ahb_softc *ahb)
488 {
489 struct cam_devq *devq;
490 struct ecb *ecb;
491 u_int i;
492
493 mtx_lock(&ahb->lock);
494
495 /* Remember who are we on the scsi bus */
496 ahb->scsi_id = ahb_inb(ahb, SCSIDEF) & HSCSIID;
497
498 /* Use extended translation?? */
499 ahb->extended_trans = ahb_inb(ahb, RESV1) & EXTENDED_TRANS;
500
501 /* Fetch adapter inquiry data */
502 ecb = ahbecbget(ahb); /* Always succeeds - no outstanding commands */
503 ecb->hecb.opcode = ECBOP_READ_HA_INQDATA;
504 ecb->hecb.flag_word1 = FW1_SUPPRESS_URUN_ERR|FW1_ERR_STATUS_BLK_ONLY;
505 ecb->hecb.data_ptr = ahb->ha_inq_physbase;
506 ecb->hecb.data_len = sizeof(struct ha_inquiry_data);
507 ecb->hecb.sense_ptr = 0;
508 ecb->state = ECB_ACTIVE;
509
510 /* Tell the adapter about this command */
511 ahbqueuembox(ahb, ahbecbvtop(ahb, ecb),
512 ATTN_STARTECB|ahb->scsi_id);
513
514 /* Poll for interrupt completion */
515 for (i = 1000; ecb->state != ECB_FREE && i != 0; i--) {
516 ahbintr_locked(ahb);
517 DELAY(1000);
518 }
519
520 ahb->num_ecbs = MIN(ahb->num_ecbs,
521 ahb->ha_inq_data->scsi_data.spc2_flags);
522 device_printf(ahb->dev,
523 "%.8s %s SCSI Adapter, FW Rev. %.4s, ID=%d, %d ECBs\n",
524 ahb->ha_inq_data->scsi_data.product,
525 (ahb->ha_inq_data->scsi_data.flags & 0x4) ? "Differential"
526 : "Single Ended",
527 ahb->ha_inq_data->scsi_data.revision,
528 ahb->scsi_id, ahb->num_ecbs);
529
530 /* Restore sense paddr for future CCB clients */
531 ecb->hecb.sense_ptr = ahbsensepaddr(ahbecbvtop(ahb, ecb));
532
533 ahbecbfree(ahb, ecb);
534
535 /*
536 * Create the device queue for our SIM.
537 */
538 devq = cam_simq_alloc(ahb->num_ecbs);
539 if (devq == NULL) {
540 mtx_unlock(&ahb->lock);
541 return (ENOMEM);
542 }
543
544 /*
545 * Construct our SIM entry
546 */
547 ahb->sim = cam_sim_alloc(ahbaction, ahbpoll, "ahb", ahb,
548 device_get_unit(ahb->dev), &ahb->lock, 2, ahb->num_ecbs, devq);
549 if (ahb->sim == NULL) {
550 cam_simq_free(devq);
551 mtx_unlock(&ahb->lock);
552 return (ENOMEM);
553 }
554
555 if (xpt_bus_register(ahb->sim, ahb->dev, 0) != CAM_SUCCESS) {
556 cam_sim_free(ahb->sim, /*free_devq*/TRUE);
557 mtx_unlock(&ahb->lock);
558 return (ENXIO);
559 }
560
561 if (xpt_create_path(&ahb->path, /*periph*/NULL,
562 cam_sim_path(ahb->sim), CAM_TARGET_WILDCARD,
563 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
564 xpt_bus_deregister(cam_sim_path(ahb->sim));
565 cam_sim_free(ahb->sim, /*free_devq*/TRUE);
566 mtx_unlock(&ahb->lock);
567 return (ENXIO);
568 }
569
570 /*
571 * Allow the board to generate interrupts.
572 */
573 ahb_outb(ahb, INTDEF, ahb_inb(ahb, INTDEF) | INTEN);
574 mtx_unlock(&ahb->lock);
575
576 return (0);
577 }
578
579 static void
ahbhandleimmed(struct ahb_softc * ahb,u_int32_t mbox,u_int intstat)580 ahbhandleimmed(struct ahb_softc *ahb, u_int32_t mbox, u_int intstat)
581 {
582 struct ccb_hdr *ccb_h;
583 u_int target_id;
584
585 if (ahb->immed_cmd == 0) {
586 device_printf(ahb->dev, "Immediate Command complete with no "
587 " pending command\n");
588 return;
589 }
590
591 target_id = intstat & INTSTAT_TARGET_MASK;
592
593 ccb_h = LIST_FIRST(&ahb->pending_ccbs);
594 while (ccb_h != NULL) {
595 struct ecb *pending_ecb;
596 union ccb *ccb;
597
598 pending_ecb = (struct ecb *)ccb_h->ccb_ecb_ptr;
599 ccb = pending_ecb->ccb;
600 ccb_h = LIST_NEXT(ccb_h, sim_links.le);
601 if (ccb->ccb_h.target_id == target_id
602 || target_id == ahb->scsi_id) {
603 callout_stop(&pending_ecb->timer);
604 LIST_REMOVE(&ccb->ccb_h, sim_links.le);
605 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE)
606 bus_dmamap_unload(ahb->buffer_dmat,
607 pending_ecb->dmamap);
608 if (pending_ecb == ahb->immed_ecb)
609 ccb->ccb_h.status =
610 CAM_CMD_TIMEOUT|CAM_RELEASE_SIMQ;
611 else if (target_id == ahb->scsi_id)
612 ccb->ccb_h.status = CAM_SCSI_BUS_RESET;
613 else
614 ccb->ccb_h.status = CAM_BDR_SENT;
615 ahbecbfree(ahb, pending_ecb);
616 xpt_done(ccb);
617 } else if (ahb->immed_ecb != NULL) {
618 /* Re-instate timeout */
619 callout_reset_sbt(&pending_ecb->timer,
620 SBT_1MS * ccb->ccb_h.timeout, 0, ahbtimeout,
621 pending_ecb, 0);
622 }
623 }
624
625 if (ahb->immed_ecb != NULL) {
626 ahb->immed_ecb = NULL;
627 device_printf(ahb->dev, "No longer in timeout\n");
628 } else if (target_id == ahb->scsi_id)
629 device_printf(ahb->dev, "SCSI Bus Reset Delivered\n");
630 else
631 device_printf(ahb->dev,
632 "Bus Device Reset Delivered to target %d\n", target_id);
633
634 ahb->immed_cmd = 0;
635 }
636
637 static void
ahbcalcresid(struct ahb_softc * ahb,struct ecb * ecb,union ccb * ccb)638 ahbcalcresid(struct ahb_softc *ahb, struct ecb *ecb, union ccb *ccb)
639 {
640 if (ecb->status.data_overrun != 0) {
641 /*
642 * Overrun Condition. The hardware doesn't
643 * provide a meaningful byte count in this case
644 * (the residual is always 0). Tell the XPT
645 * layer about the error.
646 */
647 ccb->ccb_h.status = CAM_DATA_RUN_ERR;
648 } else {
649 ccb->csio.resid = ecb->status.resid_count;
650
651 if ((ecb->hecb.flag_word1 & FW1_SG_ECB) != 0) {
652 /*
653 * For S/G transfers, the adapter provides a pointer
654 * to the address in the last S/G element used and a
655 * residual for that element. So, we need to sum up
656 * the elements that follow it in order to get a real
657 * residual number. If we have an overrun, the residual
658 * reported will be 0 and we already know that all S/G
659 * segments have been exhausted, so we can skip this
660 * step.
661 */
662 ahb_sg_t *sg;
663 int num_sg;
664
665 num_sg = ecb->hecb.data_len / sizeof(ahb_sg_t);
666
667 /* Find the S/G the adapter was working on */
668 for (sg = ecb->sg_list;
669 num_sg != 0 && sg->addr != ecb->status.resid_addr;
670 num_sg--, sg++)
671 ;
672
673 /* Skip it */
674 num_sg--;
675 sg++;
676
677 /* Sum the rest */
678 for (; num_sg != 0; num_sg--, sg++)
679 ccb->csio.resid += sg->len;
680 }
681 /* Underruns are not errors */
682 ccb->ccb_h.status = CAM_REQ_CMP;
683 }
684 }
685
686 static void
ahbprocesserror(struct ahb_softc * ahb,struct ecb * ecb,union ccb * ccb)687 ahbprocesserror(struct ahb_softc *ahb, struct ecb *ecb, union ccb *ccb)
688 {
689 struct hardware_ecb *hecb;
690 struct ecb_status *status;
691
692 hecb = &ecb->hecb;
693 status = &ecb->status;
694 switch (status->ha_status) {
695 case HS_OK:
696 ccb->csio.scsi_status = status->scsi_status;
697 if (status->scsi_status != 0) {
698 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
699 if (status->sense_stored) {
700 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
701 ccb->csio.sense_resid =
702 ccb->csio.sense_len - status->sense_len;
703 bcopy(&ecb->sense, &ccb->csio.sense_data,
704 status->sense_len);
705 }
706 }
707 break;
708 case HS_TARGET_NOT_ASSIGNED:
709 ccb->ccb_h.status = CAM_PATH_INVALID;
710 break;
711 case HS_SEL_TIMEOUT:
712 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
713 break;
714 case HS_DATA_RUN_ERR:
715 ahbcalcresid(ahb, ecb, ccb);
716 break;
717 case HS_UNEXPECTED_BUSFREE:
718 ccb->ccb_h.status = CAM_UNEXP_BUSFREE;
719 break;
720 case HS_INVALID_PHASE:
721 ccb->ccb_h.status = CAM_SEQUENCE_FAIL;
722 break;
723 case HS_REQUEST_SENSE_FAILED:
724 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
725 break;
726 case HS_TAG_MSG_REJECTED:
727 {
728 struct ccb_trans_settings neg;
729 struct ccb_trans_settings_scsi *scsi = &neg.proto_specific.scsi;
730
731 xpt_print_path(ccb->ccb_h.path);
732 printf("refuses tagged commands. Performing "
733 "non-tagged I/O\n");
734 memset(&neg, 0, sizeof (neg));
735 neg.protocol = PROTO_SCSI;
736 neg.protocol_version = SCSI_REV_2;
737 neg.transport = XPORT_SPI;
738 neg.transport_version = 2;
739 scsi->flags = CTS_SCSI_VALID_TQ;
740 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, /*priority*/1);
741 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
742 ahb->tags_permitted &= ~(0x01 << ccb->ccb_h.target_id);
743 ccb->ccb_h.status = CAM_MSG_REJECT_REC;
744 break;
745 }
746 case HS_FIRMWARE_LOAD_REQ:
747 case HS_HARDWARE_ERR:
748 /*
749 * Tell the system that the Adapter
750 * is no longer functional.
751 */
752 ccb->ccb_h.status = CAM_NO_HBA;
753 break;
754 case HS_CMD_ABORTED_HOST:
755 case HS_CMD_ABORTED_ADAPTER:
756 case HS_ATN_TARGET_FAILED:
757 case HS_SCSI_RESET_ADAPTER:
758 case HS_SCSI_RESET_INCOMING:
759 ccb->ccb_h.status = CAM_SCSI_BUS_RESET;
760 break;
761 case HS_INVALID_ECB_PARAM:
762 device_printf(ahb->dev,
763 "opcode 0x%02x, flag_word1 0x%02x, flag_word2 0x%02x\n",
764 hecb->opcode, hecb->flag_word1, hecb->flag_word2);
765 ccb->ccb_h.status = CAM_SCSI_BUS_RESET;
766 break;
767 case HS_DUP_TCB_RECEIVED:
768 case HS_INVALID_OPCODE:
769 case HS_INVALID_CMD_LINK:
770 case HS_PROGRAM_CKSUM_ERROR:
771 panic("%s: Can't happen host status %x occurred",
772 device_get_nameunit(ahb->dev), status->ha_status);
773 break;
774 }
775 if (ccb->ccb_h.status != CAM_REQ_CMP) {
776 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
777 ccb->ccb_h.status |= CAM_DEV_QFRZN;
778 }
779 }
780
781 static void
ahbdone(struct ahb_softc * ahb,u_int32_t mbox,u_int intstat)782 ahbdone(struct ahb_softc *ahb, u_int32_t mbox, u_int intstat)
783 {
784 struct ecb *ecb;
785 union ccb *ccb;
786
787 ecb = ahbecbptov(ahb, mbox);
788
789 if ((ecb->state & ECB_ACTIVE) == 0)
790 panic("ecb not active");
791
792 ccb = ecb->ccb;
793
794 if (ccb != NULL) {
795 callout_stop(&ecb->timer);
796 LIST_REMOVE(&ccb->ccb_h, sim_links.le);
797
798 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
799 bus_dmasync_op_t op;
800
801 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
802 op = BUS_DMASYNC_POSTREAD;
803 else
804 op = BUS_DMASYNC_POSTWRITE;
805 bus_dmamap_sync(ahb->buffer_dmat, ecb->dmamap, op);
806 bus_dmamap_unload(ahb->buffer_dmat, ecb->dmamap);
807 }
808
809 if ((intstat & INTSTAT_MASK) == INTSTAT_ECB_OK) {
810 ccb->ccb_h.status = CAM_REQ_CMP;
811 ccb->csio.resid = 0;
812 } else {
813 ahbprocesserror(ahb, ecb, ccb);
814 }
815 ahbecbfree(ahb, ecb);
816 xpt_done(ccb);
817 } else {
818 /* Non CCB Command */
819 if ((intstat & INTSTAT_MASK) != INTSTAT_ECB_OK) {
820 device_printf(ahb->dev, "Command 0%x Failed %x:%x:%x\n",
821 ecb->hecb.opcode,
822 *((u_int16_t*)&ecb->status),
823 ecb->status.ha_status, ecb->status.resid_count);
824 }
825 /* Client owns this ECB and will release it. */
826 }
827 }
828
829 /*
830 * Catch an interrupt from the adaptor
831 */
832 static void
ahbintr(void * arg)833 ahbintr(void *arg)
834 {
835 struct ahb_softc *ahb;
836
837 ahb = arg;
838 mtx_lock(&ahb->lock);
839 ahbintr_locked(ahb);
840 mtx_unlock(&ahb->lock);
841 }
842
843 static void
ahbintr_locked(struct ahb_softc * ahb)844 ahbintr_locked(struct ahb_softc *ahb)
845 {
846 u_int intstat;
847 u_int32_t mbox;
848
849 while (ahb_inb(ahb, HOSTSTAT) & HOSTSTAT_INTPEND) {
850 /*
851 * Fetch information about this interrupt.
852 */
853 intstat = ahb_inb(ahb, INTSTAT);
854 mbox = ahb_inl(ahb, MBOXIN0);
855
856 /*
857 * Reset interrupt latch.
858 */
859 ahb_outb(ahb, CONTROL, CNTRL_CLRINT);
860
861 /*
862 * Process the completed operation
863 */
864 switch (intstat & INTSTAT_MASK) {
865 case INTSTAT_ECB_OK:
866 case INTSTAT_ECB_CMPWRETRY:
867 case INTSTAT_ECB_CMPWERR:
868 ahbdone(ahb, mbox, intstat);
869 break;
870 case INTSTAT_AEN_OCCURED:
871 if ((intstat & INTSTAT_TARGET_MASK) == ahb->scsi_id) {
872 /* Bus Reset */
873 xpt_print_path(ahb->path);
874 switch (mbox) {
875 case HS_SCSI_RESET_ADAPTER:
876 printf("Host Adapter Initiated "
877 "Bus Reset occurred\n");
878 break;
879 case HS_SCSI_RESET_INCOMING:
880 printf("Bus Reset Initiated "
881 "by another device occurred\n");
882 break;
883 }
884 /* Notify the XPT */
885 xpt_async(AC_BUS_RESET, ahb->path, NULL);
886 break;
887 }
888 printf("Unsupported initiator selection AEN occurred\n");
889 break;
890 case INTSTAT_IMMED_OK:
891 case INTSTAT_IMMED_ERR:
892 ahbhandleimmed(ahb, mbox, intstat);
893 break;
894 case INTSTAT_HW_ERR:
895 panic("Unrecoverable hardware Error Occurred\n");
896 }
897 }
898 }
899
900 static void
ahbexecuteecb(void * arg,bus_dma_segment_t * dm_segs,int nseg,int error)901 ahbexecuteecb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
902 {
903 struct ecb *ecb;
904 union ccb *ccb;
905 struct ahb_softc *ahb;
906 u_int32_t ecb_paddr;
907
908 ecb = (struct ecb *)arg;
909 ccb = ecb->ccb;
910 ahb = (struct ahb_softc *)ccb->ccb_h.ccb_ahb_ptr;
911 mtx_assert(&ahb->lock, MA_OWNED);
912
913 if (error != 0) {
914 if (error != EFBIG)
915 device_printf(ahb->dev,
916 "Unexepected error 0x%x returned from "
917 "bus_dmamap_load\n", error);
918 if (ccb->ccb_h.status == CAM_REQ_INPROG) {
919 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
920 ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN;
921 }
922 ahbecbfree(ahb, ecb);
923 xpt_done(ccb);
924 return;
925 }
926
927 ecb_paddr = ahbecbvtop(ahb, ecb);
928
929 if (nseg != 0) {
930 ahb_sg_t *sg;
931 bus_dma_segment_t *end_seg;
932 bus_dmasync_op_t op;
933
934 end_seg = dm_segs + nseg;
935
936 /* Copy the segments into our SG list */
937 sg = ecb->sg_list;
938 while (dm_segs < end_seg) {
939 sg->addr = dm_segs->ds_addr;
940 sg->len = dm_segs->ds_len;
941 sg++;
942 dm_segs++;
943 }
944
945 if (nseg > 1) {
946 ecb->hecb.flag_word1 |= FW1_SG_ECB;
947 ecb->hecb.data_ptr = ahbsgpaddr(ecb_paddr);
948 ecb->hecb.data_len = sizeof(ahb_sg_t) * nseg;
949 } else {
950 ecb->hecb.data_ptr = ecb->sg_list->addr;
951 ecb->hecb.data_len = ecb->sg_list->len;
952 }
953
954 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
955 /* ecb->hecb.flag_word2 |= FW2_DATA_DIR_IN; */
956 op = BUS_DMASYNC_PREREAD;
957 } else {
958 op = BUS_DMASYNC_PREWRITE;
959 }
960 /* ecb->hecb.flag_word2 |= FW2_CHECK_DATA_DIR; */
961
962 bus_dmamap_sync(ahb->buffer_dmat, ecb->dmamap, op);
963
964 } else {
965 ecb->hecb.data_ptr = 0;
966 ecb->hecb.data_len = 0;
967 }
968
969 /*
970 * Last time we need to check if this CCB needs to
971 * be aborted.
972 */
973 if (ccb->ccb_h.status != CAM_REQ_INPROG) {
974 if (nseg != 0)
975 bus_dmamap_unload(ahb->buffer_dmat, ecb->dmamap);
976 ahbecbfree(ahb, ecb);
977 xpt_done(ccb);
978 return;
979 }
980
981 ecb->state = ECB_ACTIVE;
982 ccb->ccb_h.status |= CAM_SIM_QUEUED;
983 LIST_INSERT_HEAD(&ahb->pending_ccbs, &ccb->ccb_h, sim_links.le);
984
985 /* Tell the adapter about this command */
986 ahbqueuembox(ahb, ecb_paddr, ATTN_STARTECB|ccb->ccb_h.target_id);
987
988 callout_reset_sbt(&ecb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
989 ahbtimeout, ecb, 0);
990 }
991
992 static void
ahbaction(struct cam_sim * sim,union ccb * ccb)993 ahbaction(struct cam_sim *sim, union ccb *ccb)
994 {
995 struct ahb_softc *ahb;
996
997 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ahbaction\n"));
998
999 ahb = (struct ahb_softc *)cam_sim_softc(sim);
1000 mtx_assert(&ahb->lock, MA_OWNED);
1001
1002 switch (ccb->ccb_h.func_code) {
1003 /* Common cases first */
1004 case XPT_SCSI_IO: /* Execute the requested I/O operation */
1005 {
1006 struct ecb *ecb;
1007 struct hardware_ecb *hecb;
1008 int error;
1009
1010 /*
1011 * get an ecb to use.
1012 */
1013 if ((ecb = ahbecbget(ahb)) == NULL) {
1014 /* Should never occur */
1015 panic("Failed to get an ecb");
1016 }
1017
1018 /*
1019 * So we can find the ECB when an abort is requested
1020 */
1021 ecb->ccb = ccb;
1022 ccb->ccb_h.ccb_ecb_ptr = ecb;
1023 ccb->ccb_h.ccb_ahb_ptr = ahb;
1024
1025 /*
1026 * Put all the arguments for the xfer in the ecb
1027 */
1028 hecb = &ecb->hecb;
1029 hecb->opcode = ECBOP_INITIATOR_SCSI_CMD;
1030 hecb->flag_word1 = FW1_AUTO_REQUEST_SENSE
1031 | FW1_ERR_STATUS_BLK_ONLY;
1032 hecb->flag_word2 = ccb->ccb_h.target_lun
1033 | FW2_NO_RETRY_ON_BUSY;
1034 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0) {
1035 hecb->flag_word2 |= FW2_TAG_ENB
1036 | ((ccb->csio.tag_action & 0x3)
1037 << FW2_TAG_TYPE_SHIFT);
1038 }
1039 if ((ccb->ccb_h.flags & CAM_DIS_DISCONNECT) != 0)
1040 hecb->flag_word2 |= FW2_DISABLE_DISC;
1041 hecb->sense_len = ccb->csio.sense_len;
1042 hecb->cdb_len = ccb->csio.cdb_len;
1043 if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) {
1044 if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) {
1045 bcopy(ccb->csio.cdb_io.cdb_ptr,
1046 hecb->cdb, hecb->cdb_len);
1047 } else {
1048 /* I guess I could map it in... */
1049 ccb->ccb_h.status = CAM_REQ_INVALID;
1050 ahbecbfree(ahb, ecb);
1051 xpt_done(ccb);
1052 return;
1053 }
1054 } else {
1055 bcopy(ccb->csio.cdb_io.cdb_bytes,
1056 hecb->cdb, hecb->cdb_len);
1057 }
1058
1059 error = bus_dmamap_load_ccb(
1060 ahb->buffer_dmat,
1061 ecb->dmamap,
1062 ccb,
1063 ahbexecuteecb,
1064 ecb, /*flags*/0);
1065 if (error == EINPROGRESS) {
1066 /*
1067 * So as to maintain ordering, freeze the controller
1068 * queue until our mapping is returned.
1069 */
1070 xpt_freeze_simq(ahb->sim, 1);
1071 ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
1072 }
1073 break;
1074 }
1075 case XPT_EN_LUN: /* Enable LUN as a target */
1076 case XPT_TARGET_IO: /* Execute target I/O request */
1077 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
1078 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
1079 case XPT_ABORT: /* Abort the specified CCB */
1080 /* XXX Implement */
1081 ccb->ccb_h.status = CAM_REQ_INVALID;
1082 xpt_done(ccb);
1083 break;
1084 case XPT_SET_TRAN_SETTINGS:
1085 {
1086 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1087 xpt_done(ccb);
1088 break;
1089 }
1090 case XPT_GET_TRAN_SETTINGS:
1091 /* Get default/user set transfer settings for the target */
1092 {
1093 struct ccb_trans_settings *cts = &ccb->cts;
1094 u_int target_mask = 0x01 << ccb->ccb_h.target_id;
1095 struct ccb_trans_settings_scsi *scsi =
1096 &cts->proto_specific.scsi;
1097 struct ccb_trans_settings_spi *spi =
1098 &cts->xport_specific.spi;
1099
1100 if (cts->type == CTS_TYPE_USER_SETTINGS) {
1101 cts->protocol = PROTO_SCSI;
1102 cts->protocol_version = SCSI_REV_2;
1103 cts->transport = XPORT_SPI;
1104 cts->transport_version = 2;
1105
1106 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
1107 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
1108 if ((ahb->disc_permitted & target_mask) != 0)
1109 spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
1110 if ((ahb->tags_permitted & target_mask) != 0)
1111 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
1112 spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT;
1113 spi->sync_period = 25; /* 10MHz */
1114
1115 if (spi->sync_period != 0)
1116 spi->sync_offset = 15;
1117
1118 spi->valid = CTS_SPI_VALID_SYNC_RATE
1119 | CTS_SPI_VALID_SYNC_OFFSET
1120 | CTS_SPI_VALID_BUS_WIDTH
1121 | CTS_SPI_VALID_DISC;
1122 scsi->valid = CTS_SCSI_VALID_TQ;
1123 ccb->ccb_h.status = CAM_REQ_CMP;
1124 } else {
1125 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1126 }
1127 xpt_done(ccb);
1128 break;
1129 }
1130 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
1131 {
1132 int i;
1133
1134 ahb->immed_cmd = IMMED_RESET;
1135 ahbqueuembox(ahb, IMMED_RESET, ATTN_IMMED|ccb->ccb_h.target_id);
1136 /* Poll for interrupt completion */
1137 for (i = 1000; ahb->immed_cmd != 0 && i != 0; i--) {
1138 DELAY(1000);
1139 ahbintr_locked(cam_sim_softc(sim));
1140 }
1141 break;
1142 }
1143 case XPT_CALC_GEOMETRY:
1144 {
1145 cam_calc_geometry(&ccb->ccg, ahb->extended_trans);
1146 xpt_done(ccb);
1147 break;
1148 }
1149 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1150 {
1151 int i;
1152
1153 ahb->immed_cmd = IMMED_RESET;
1154 ahbqueuembox(ahb, IMMED_RESET, ATTN_IMMED|ahb->scsi_id);
1155 /* Poll for interrupt completion */
1156 for (i = 1000; ahb->immed_cmd != 0 && i != 0; i--)
1157 DELAY(1000);
1158 ccb->ccb_h.status = CAM_REQ_CMP;
1159 xpt_done(ccb);
1160 break;
1161 }
1162 case XPT_TERM_IO: /* Terminate the I/O process */
1163 /* XXX Implement */
1164 ccb->ccb_h.status = CAM_REQ_INVALID;
1165 xpt_done(ccb);
1166 break;
1167 case XPT_PATH_INQ: /* Path routing inquiry */
1168 {
1169 struct ccb_pathinq *cpi = &ccb->cpi;
1170
1171 cpi->version_num = 1; /* XXX??? */
1172 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
1173 cpi->target_sprt = 0;
1174 cpi->hba_misc = 0;
1175 cpi->hba_eng_cnt = 0;
1176 cpi->max_target = 7;
1177 cpi->max_lun = 7;
1178 cpi->initiator_id = ahb->scsi_id;
1179 cpi->bus_id = cam_sim_bus(sim);
1180 cpi->base_transfer_speed = 3300;
1181 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1182 strlcpy(cpi->hba_vid, "Adaptec", HBA_IDLEN);
1183 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1184 cpi->unit_number = cam_sim_unit(sim);
1185 cpi->transport = XPORT_SPI;
1186 cpi->transport_version = 2;
1187 cpi->protocol = PROTO_SCSI;
1188 cpi->protocol_version = SCSI_REV_2;
1189 cpi->ccb_h.status = CAM_REQ_CMP;
1190 xpt_done(ccb);
1191 break;
1192 }
1193 #if 0
1194 /* Need these??? */
1195 case XPT_IMMED_NOTIFY: /* Notify Host Target driver of event */
1196 case XPT_NOTIFY_ACK: /* Acknowledgement of event */
1197 #endif
1198 default:
1199 ccb->ccb_h.status = CAM_REQ_INVALID;
1200 xpt_done(ccb);
1201 break;
1202 }
1203 }
1204
1205 static void
ahbpoll(struct cam_sim * sim)1206 ahbpoll(struct cam_sim *sim)
1207 {
1208 ahbintr(cam_sim_softc(sim));
1209 }
1210
1211 static void
ahbtimeout(void * arg)1212 ahbtimeout(void *arg)
1213 {
1214 struct ecb *ecb;
1215 union ccb *ccb;
1216 struct ahb_softc *ahb;
1217
1218 ecb = (struct ecb *)arg;
1219 ccb = ecb->ccb;
1220 ahb = (struct ahb_softc *)ccb->ccb_h.ccb_ahb_ptr;
1221 mtx_assert(&ahb->lock, MA_OWNED);
1222 xpt_print_path(ccb->ccb_h.path);
1223 printf("ECB %p - timed out\n", (void *)ecb);
1224
1225 if ((ecb->state & ECB_ACTIVE) == 0) {
1226 xpt_print_path(ccb->ccb_h.path);
1227 printf("ECB %p - timed out ECB already completed\n",
1228 (void *)ecb);
1229 return;
1230 }
1231 /*
1232 * In order to simplify the recovery process, we ask the XPT
1233 * layer to halt the queue of new transactions and we traverse
1234 * the list of pending CCBs and remove their timeouts. This
1235 * means that the driver attempts to clear only one error
1236 * condition at a time. In general, timeouts that occur
1237 * close together are related anyway, so there is no benefit
1238 * in attempting to handle errors in parallel. Timeouts will
1239 * be reinstated when the recovery process ends.
1240 */
1241 if ((ecb->state & ECB_DEVICE_RESET) == 0) {
1242 struct ccb_hdr *ccb_h;
1243
1244 if ((ecb->state & ECB_RELEASE_SIMQ) == 0) {
1245 xpt_freeze_simq(ahb->sim, /*count*/1);
1246 ecb->state |= ECB_RELEASE_SIMQ;
1247 }
1248
1249 LIST_FOREACH(ccb_h, &ahb->pending_ccbs, sim_links.le) {
1250 struct ecb *pending_ecb;
1251
1252 pending_ecb = (struct ecb *)ccb_h->ccb_ecb_ptr;
1253 callout_stop(&pending_ecb->timer);
1254 }
1255
1256 /* Store for our interrupt handler */
1257 ahb->immed_ecb = ecb;
1258
1259 /*
1260 * Send a Bus Device Reset message:
1261 * The target that is holding up the bus may not
1262 * be the same as the one that triggered this timeout
1263 * (different commands have different timeout lengths),
1264 * but we have no way of determining this from our
1265 * timeout handler. Our strategy here is to queue a
1266 * BDR message to the target of the timed out command.
1267 * If this fails, we'll get another timeout 2 seconds
1268 * later which will attempt a bus reset.
1269 */
1270 xpt_print_path(ccb->ccb_h.path);
1271 printf("Queuing BDR\n");
1272 ecb->state |= ECB_DEVICE_RESET;
1273 callout_reset(&ecb->timer, 2 * hz, ahbtimeout, ecb);
1274
1275 ahb->immed_cmd = IMMED_RESET;
1276 ahbqueuembox(ahb, IMMED_RESET, ATTN_IMMED|ccb->ccb_h.target_id);
1277 } else if ((ecb->state & ECB_SCSIBUS_RESET) != 0) {
1278 /*
1279 * Try a SCSI bus reset. We do this only if we
1280 * have already attempted to clear the condition with a BDR.
1281 */
1282 xpt_print_path(ccb->ccb_h.path);
1283 printf("Attempting SCSI Bus reset\n");
1284 ecb->state |= ECB_SCSIBUS_RESET;
1285 callout_reset(&ecb->timer, 2 * hz, ahbtimeout, ecb);
1286 ahb->immed_cmd = IMMED_RESET;
1287 ahbqueuembox(ahb, IMMED_RESET, ATTN_IMMED|ahb->scsi_id);
1288 } else {
1289 /* Bring out the hammer... */
1290 ahbreset(ahb);
1291
1292 /* Simulate the reset complete interrupt */
1293 ahbhandleimmed(ahb, 0, ahb->scsi_id|INTSTAT_IMMED_OK);
1294 }
1295 }
1296
1297 static device_method_t ahb_eisa_methods[] = {
1298 /* Device interface */
1299 DEVMETHOD(device_probe, ahbprobe),
1300 DEVMETHOD(device_attach, ahbattach),
1301
1302 { 0, 0 }
1303 };
1304
1305 static driver_t ahb_eisa_driver = {
1306 "ahb",
1307 ahb_eisa_methods,
1308 sizeof(struct ahb_softc),
1309 };
1310
1311 static devclass_t ahb_devclass;
1312
1313 DRIVER_MODULE(ahb, eisa, ahb_eisa_driver, ahb_devclass, 0, 0);
1314 MODULE_DEPEND(ahb, eisa, 1, 1, 1);
1315 MODULE_DEPEND(ahb, cam, 1, 1, 1);
1316