1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH
2 Copyright (C) 1993-2024 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
20
21 /* Written By Steve Chamberlain <sac@cygnus.com> */
22
23 #include "as.h"
24 #include "subsegs.h"
25 #define DEFINE_TABLE
26 #include "opcodes/sh-opc.h"
27 #include "safe-ctype.h"
28
29 #ifdef OBJ_ELF
30 #include "elf/sh.h"
31 #endif
32
33 #include "dwarf2dbg.h"
34 #include "dw2gencfi.h"
35
36 typedef struct
37 {
38 sh_arg_type type;
39 int reg;
40 expressionS immediate;
41 }
42 sh_operand_info;
43
44 const char comment_chars[] = "!";
45 const char line_separator_chars[] = ";";
46 const char line_comment_chars[] = "!#";
47
48 static void s_uses (int);
49 static void s_uacons (int);
50
51 #ifdef OBJ_ELF
52 static void sh_elf_cons (int);
53
54 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
55 #endif
56
57 static void
big(int ignore ATTRIBUTE_UNUSED)58 big (int ignore ATTRIBUTE_UNUSED)
59 {
60 if (! target_big_endian)
61 as_bad (_("directive .big encountered when option -big required"));
62
63 /* Stop further messages. */
64 target_big_endian = 1;
65 }
66
67 static void
little(int ignore ATTRIBUTE_UNUSED)68 little (int ignore ATTRIBUTE_UNUSED)
69 {
70 if (target_big_endian)
71 as_bad (_("directive .little encountered when option -little required"));
72
73 /* Stop further messages. */
74 target_big_endian = 0;
75 }
76
77 /* This table describes all the machine specific pseudo-ops the assembler
78 has to support. The fields are:
79 pseudo-op name without dot
80 function to call to execute this pseudo-op
81 Integer arg to pass to the function. */
82
83 const pseudo_typeS md_pseudo_table[] =
84 {
85 #ifdef OBJ_ELF
86 {"long", sh_elf_cons, 4},
87 {"int", sh_elf_cons, 4},
88 {"word", sh_elf_cons, 2},
89 {"short", sh_elf_cons, 2},
90 #else
91 {"int", cons, 4},
92 {"word", cons, 2},
93 #endif /* OBJ_ELF */
94 {"big", big, 0},
95 {"form", listing_psize, 0},
96 {"little", little, 0},
97 {"heading", listing_title, 0},
98 {"import", s_ignore, 0},
99 {"page", listing_eject, 0},
100 {"program", s_ignore, 0},
101 {"uses", s_uses, 0},
102 {"uaword", s_uacons, 2},
103 {"ualong", s_uacons, 4},
104 {"uaquad", s_uacons, 8},
105 {"2byte", s_uacons, 2},
106 {"4byte", s_uacons, 4},
107 {"8byte", s_uacons, 8},
108 {0, 0, 0}
109 };
110
111 int sh_relax; /* set if -relax seen */
112
113 /* Whether -small was seen. */
114
115 int sh_small;
116
117 /* Flag to generate relocations against symbol values for local symbols. */
118
119 static int dont_adjust_reloc_32;
120
121 /* Flag to indicate that '$' is allowed as a register prefix. */
122
123 static int allow_dollar_register_prefix;
124
125 /* Preset architecture set, if given; zero otherwise. */
126
127 static unsigned int preset_target_arch;
128
129 /* The bit mask of architectures that could
130 accommodate the insns seen so far. */
131 static unsigned int valid_arch;
132
133 #ifdef OBJ_ELF
134 /* Whether --fdpic was given. */
135 static int sh_fdpic;
136 #endif
137
138 const char EXP_CHARS[] = "eE";
139
140 /* Chars that mean this number is a floating point constant. */
141 /* As in 0f12.456 */
142 /* or 0d1.2345e12 */
143 const char FLT_CHARS[] = "rRsSfFdDxXpP";
144
145 #define C(a,b) ENCODE_RELAX(a,b)
146
147 #define ENCODE_RELAX(what,length) (((what) << 4) + (length))
148 #define GET_WHAT(x) ((x>>4))
149
150 /* These are the three types of relaxable instruction. */
151 /* These are the types of relaxable instructions; except for END which is
152 a marker. */
153 #define COND_JUMP 1
154 #define COND_JUMP_DELAY 2
155 #define UNCOND_JUMP 3
156
157 #define END 4
158
159 #define UNDEF_DISP 0
160 #define COND8 1
161 #define COND12 2
162 #define COND32 3
163 #define UNDEF_WORD_DISP 4
164
165 #define UNCOND12 1
166 #define UNCOND32 2
167
168 /* Branch displacements are from the address of the branch plus
169 four, thus all minimum and maximum values have 4 added to them. */
170 #define COND8_F 258
171 #define COND8_M -252
172 #define COND8_LENGTH 2
173
174 /* There is one extra instruction before the branch, so we must add
175 two more bytes to account for it. */
176 #define COND12_F 4100
177 #define COND12_M -4090
178 #define COND12_LENGTH 6
179
180 #define COND12_DELAY_LENGTH 4
181
182 /* ??? The minimum and maximum values are wrong, but this does not matter
183 since this relocation type is not supported yet. */
184 #define COND32_F (1<<30)
185 #define COND32_M -(1<<30)
186 #define COND32_LENGTH 14
187
188 #define UNCOND12_F 4098
189 #define UNCOND12_M -4092
190 #define UNCOND12_LENGTH 2
191
192 /* ??? The minimum and maximum values are wrong, but this does not matter
193 since this relocation type is not supported yet. */
194 #define UNCOND32_F (1<<30)
195 #define UNCOND32_M -(1<<30)
196 #define UNCOND32_LENGTH 14
197
198 #define EMPTY { 0, 0, 0, 0 }
199
200 const relax_typeS md_relax_table[C (END, 0)] = {
201 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
202 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
203
204 EMPTY,
205 /* C (COND_JUMP, COND8) */
206 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) },
207 /* C (COND_JUMP, COND12) */
208 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), },
209 /* C (COND_JUMP, COND32) */
210 { COND32_F, COND32_M, COND32_LENGTH, 0, },
211 /* C (COND_JUMP, UNDEF_WORD_DISP) */
212 { 0, 0, COND32_LENGTH, 0, },
213 EMPTY, EMPTY, EMPTY,
214 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
215
216 EMPTY,
217 /* C (COND_JUMP_DELAY, COND8) */
218 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) },
219 /* C (COND_JUMP_DELAY, COND12) */
220 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), },
221 /* C (COND_JUMP_DELAY, COND32) */
222 { COND32_F, COND32_M, COND32_LENGTH, 0, },
223 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */
224 { 0, 0, COND32_LENGTH, 0, },
225 EMPTY, EMPTY, EMPTY,
226 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
227
228 EMPTY,
229 /* C (UNCOND_JUMP, UNCOND12) */
230 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), },
231 /* C (UNCOND_JUMP, UNCOND32) */
232 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, },
233 EMPTY,
234 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */
235 { 0, 0, UNCOND32_LENGTH, 0, },
236 EMPTY, EMPTY, EMPTY,
237 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
238
239 };
240
241 #undef EMPTY
242
243 static htab_t opcode_hash_control; /* Opcode mnemonics */
244
245
246 #ifdef OBJ_ELF
247 /* Determine whether the symbol needs any kind of PIC relocation. */
248
249 inline static int
sh_PIC_related_p(symbolS * sym)250 sh_PIC_related_p (symbolS *sym)
251 {
252 expressionS *exp;
253
254 if (! sym)
255 return 0;
256
257 if (sym == GOT_symbol)
258 return 1;
259
260 exp = symbol_get_value_expression (sym);
261
262 return (exp->X_op == O_PIC_reloc
263 || sh_PIC_related_p (exp->X_add_symbol)
264 || sh_PIC_related_p (exp->X_op_symbol));
265 }
266
267 /* Determine the relocation type to be used to represent the
268 expression, that may be rearranged. */
269
270 static int
sh_check_fixup(expressionS * main_exp,bfd_reloc_code_real_type * r_type_p)271 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p)
272 {
273 expressionS *exp = main_exp;
274
275 /* This is here for backward-compatibility only. GCC used to generated:
276
277 f@PLT + . - (.LPCS# + 2)
278
279 but we'd rather be able to handle this as a PIC-related reference
280 plus/minus a symbol. However, gas' parser gives us:
281
282 O_subtract (O_add (f@PLT, .), .LPCS#+2)
283
284 so we attempt to transform this into:
285
286 O_subtract (f@PLT, O_subtract (.LPCS#+2, .))
287
288 which we can handle simply below. */
289 if (exp->X_op == O_subtract)
290 {
291 if (sh_PIC_related_p (exp->X_op_symbol))
292 return 1;
293
294 exp = symbol_get_value_expression (exp->X_add_symbol);
295
296 if (exp && sh_PIC_related_p (exp->X_op_symbol))
297 return 1;
298
299 if (exp && exp->X_op == O_add
300 && sh_PIC_related_p (exp->X_add_symbol))
301 {
302 symbolS *sym = exp->X_add_symbol;
303
304 exp->X_op = O_subtract;
305 exp->X_add_symbol = main_exp->X_op_symbol;
306
307 main_exp->X_op_symbol = main_exp->X_add_symbol;
308 main_exp->X_add_symbol = sym;
309
310 main_exp->X_add_number += exp->X_add_number;
311 exp->X_add_number = 0;
312 }
313
314 exp = main_exp;
315 }
316 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol))
317 return 1;
318
319 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract)
320 {
321 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
322 {
323 *r_type_p = BFD_RELOC_SH_GOTPC;
324 return 0;
325 }
326 exp = symbol_get_value_expression (exp->X_add_symbol);
327 if (! exp)
328 return 0;
329 }
330
331 if (exp->X_op == O_PIC_reloc)
332 {
333 switch (*r_type_p)
334 {
335 case BFD_RELOC_NONE:
336 case BFD_RELOC_UNUSED:
337 *r_type_p = exp->X_md;
338 break;
339
340 case BFD_RELOC_SH_DISP20:
341 switch (exp->X_md)
342 {
343 case BFD_RELOC_32_GOT_PCREL:
344 *r_type_p = BFD_RELOC_SH_GOT20;
345 break;
346
347 case BFD_RELOC_32_GOTOFF:
348 *r_type_p = BFD_RELOC_SH_GOTOFF20;
349 break;
350
351 case BFD_RELOC_SH_GOTFUNCDESC:
352 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20;
353 break;
354
355 case BFD_RELOC_SH_GOTOFFFUNCDESC:
356 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20;
357 break;
358
359 default:
360 abort ();
361 }
362 break;
363
364 default:
365 abort ();
366 }
367 if (exp == main_exp)
368 exp->X_op = O_symbol;
369 else
370 {
371 main_exp->X_add_symbol = exp->X_add_symbol;
372 main_exp->X_add_number += exp->X_add_number;
373 }
374 }
375 else
376 return (sh_PIC_related_p (exp->X_add_symbol)
377 || sh_PIC_related_p (exp->X_op_symbol));
378
379 return 0;
380 }
381
382 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */
383
384 void
sh_cons_fix_new(fragS * frag,int off,int size,expressionS * exp,bfd_reloc_code_real_type r_type)385 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp,
386 bfd_reloc_code_real_type r_type)
387 {
388 r_type = BFD_RELOC_UNUSED;
389
390 if (sh_check_fixup (exp, &r_type))
391 as_bad (_("Invalid PIC expression."));
392
393 if (r_type == BFD_RELOC_UNUSED)
394 switch (size)
395 {
396 case 1:
397 r_type = BFD_RELOC_8;
398 break;
399
400 case 2:
401 r_type = BFD_RELOC_16;
402 break;
403
404 case 4:
405 r_type = BFD_RELOC_32;
406 break;
407
408 case 8:
409 r_type = BFD_RELOC_64;
410 break;
411
412 default:
413 goto error;
414 }
415 else if (size != 4)
416 {
417 error:
418 as_bad (_("unsupported BFD relocation size %u"), size);
419 r_type = BFD_RELOC_UNUSED;
420 }
421
422 fix_new_exp (frag, off, size, exp, 0, r_type);
423 }
424
425 /* The regular cons() function, that reads constants, doesn't support
426 suffixes such as @GOT, @GOTOFF and @PLT, that generate
427 machine-specific relocation types. So we must define it here. */
428 /* Clobbers input_line_pointer, checks end-of-line. */
429 /* NBYTES 1=.byte, 2=.word, 4=.long */
430 static void
sh_elf_cons(int nbytes)431 sh_elf_cons (int nbytes)
432 {
433 expressionS exp;
434
435 if (is_it_end_of_statement ())
436 {
437 demand_empty_rest_of_line ();
438 return;
439 }
440
441 #ifdef md_cons_align
442 md_cons_align (nbytes);
443 #endif
444
445 do
446 {
447 expression (&exp);
448 emit_expr (&exp, (unsigned int) nbytes);
449 }
450 while (*input_line_pointer++ == ',');
451
452 input_line_pointer--; /* Put terminator back into stream. */
453 if (*input_line_pointer == '#' || *input_line_pointer == '!')
454 {
455 while (! is_end_of_line[(unsigned char) *input_line_pointer++]);
456 }
457 else
458 demand_empty_rest_of_line ();
459 }
460
461 /* The regular frag_offset_fixed_p doesn't work for rs_align_test
462 frags. */
463
464 static bool
align_test_frag_offset_fixed_p(const fragS * frag1,const fragS * frag2,bfd_vma * offset)465 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2,
466 bfd_vma *offset)
467 {
468 const fragS *frag;
469 bfd_vma off;
470
471 /* Start with offset initialised to difference between the two frags.
472 Prior to assigning frag addresses this will be zero. */
473 off = frag1->fr_address - frag2->fr_address;
474 if (frag1 == frag2)
475 {
476 *offset = off;
477 return true;
478 }
479
480 /* Maybe frag2 is after frag1. */
481 frag = frag1;
482 while (frag->fr_type == rs_fill
483 || frag->fr_type == rs_align_test)
484 {
485 if (frag->fr_type == rs_fill)
486 off += frag->fr_fix + frag->fr_offset * frag->fr_var;
487 else
488 off += frag->fr_fix;
489 frag = frag->fr_next;
490 if (frag == NULL)
491 break;
492 if (frag == frag2)
493 {
494 *offset = off;
495 return true;
496 }
497 }
498
499 /* Maybe frag1 is after frag2. */
500 off = frag1->fr_address - frag2->fr_address;
501 frag = frag2;
502 while (frag->fr_type == rs_fill
503 || frag->fr_type == rs_align_test)
504 {
505 if (frag->fr_type == rs_fill)
506 off -= frag->fr_fix + frag->fr_offset * frag->fr_var;
507 else
508 off -= frag->fr_fix;
509 frag = frag->fr_next;
510 if (frag == NULL)
511 break;
512 if (frag == frag1)
513 {
514 *offset = off;
515 return true;
516 }
517 }
518
519 return false;
520 }
521
522 /* Optimize a difference of symbols which have rs_align_test frag if
523 possible. */
524
525 int
sh_optimize_expr(expressionS * l,operatorT op,expressionS * r)526 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r)
527 {
528 bfd_vma frag_off;
529
530 if (op == O_subtract
531 && l->X_op == O_symbol
532 && r->X_op == O_symbol
533 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol)
534 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol))
535 || r->X_add_symbol == l->X_add_symbol)
536 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol),
537 symbol_get_frag (r->X_add_symbol),
538 &frag_off))
539 {
540 offsetT symval_diff = S_GET_VALUE (l->X_add_symbol)
541 - S_GET_VALUE (r->X_add_symbol);
542 subtract_from_result (l, r->X_add_number, r->X_extrabit);
543 subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0);
544 add_to_result (l, symval_diff, symval_diff < 0);
545 l->X_op = O_constant;
546 l->X_add_symbol = 0;
547 return 1;
548 }
549 return 0;
550 }
551 #endif /* OBJ_ELF */
552
553 /* This function is called once, at assembler startup time. This should
554 set up all the tables, etc that the MD part of the assembler needs. */
555
556 void
md_begin(void)557 md_begin (void)
558 {
559 const sh_opcode_info *opcode;
560 const char *prev_name = "";
561 unsigned int target_arch;
562
563 target_arch
564 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp;
565 valid_arch = target_arch;
566
567 opcode_hash_control = str_htab_create ();
568
569 /* Insert unique names into hash table. */
570 for (opcode = sh_table; opcode->name; opcode++)
571 {
572 if (strcmp (prev_name, opcode->name) != 0)
573 {
574 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch))
575 continue;
576 prev_name = opcode->name;
577 str_hash_insert (opcode_hash_control, opcode->name, opcode, 0);
578 }
579 }
580 }
581
582 static int reg_m;
583 static int reg_n;
584 static int reg_x, reg_y;
585 static int reg_efg;
586 static int reg_b;
587
588 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_')
589
590 /* Try to parse a reg name. Return the number of chars consumed. */
591
592 static unsigned int
parse_reg_without_prefix(char * src,sh_arg_type * mode,int * reg)593 parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg)
594 {
595 char l0 = TOLOWER (src[0]);
596 char l1 = l0 ? TOLOWER (src[1]) : 0;
597
598 /* We use ! IDENT_CHAR for the next character after the register name, to
599 make sure that we won't accidentally recognize a symbol name such as
600 'sram' or sr_ram as being a reference to the register 'sr'. */
601
602 if (l0 == 'r')
603 {
604 if (l1 == '1')
605 {
606 if (src[2] >= '0' && src[2] <= '5'
607 && ! IDENT_CHAR ((unsigned char) src[3]))
608 {
609 *mode = A_REG_N;
610 *reg = 10 + src[2] - '0';
611 return 3;
612 }
613 }
614 if (l1 >= '0' && l1 <= '9'
615 && ! IDENT_CHAR ((unsigned char) src[2]))
616 {
617 *mode = A_REG_N;
618 *reg = (l1 - '0');
619 return 2;
620 }
621 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0
622 && ! IDENT_CHAR ((unsigned char) src[7]))
623 {
624 *mode = A_REG_B;
625 *reg = (l1 - '0');
626 return 7;
627 }
628
629 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2]))
630 {
631 *mode = A_RE;
632 return 2;
633 }
634 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2]))
635 {
636 *mode = A_RS;
637 return 2;
638 }
639 }
640
641 if (l0 == 'a')
642 {
643 if (l1 == '0')
644 {
645 if (! IDENT_CHAR ((unsigned char) src[2]))
646 {
647 *mode = DSP_REG_N;
648 *reg = A_A0_NUM;
649 return 2;
650 }
651 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
652 {
653 *mode = DSP_REG_N;
654 *reg = A_A0G_NUM;
655 return 3;
656 }
657 }
658 if (l1 == '1')
659 {
660 if (! IDENT_CHAR ((unsigned char) src[2]))
661 {
662 *mode = DSP_REG_N;
663 *reg = A_A1_NUM;
664 return 2;
665 }
666 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3]))
667 {
668 *mode = DSP_REG_N;
669 *reg = A_A1G_NUM;
670 return 3;
671 }
672 }
673
674 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1'
675 && ! IDENT_CHAR ((unsigned char) src[3]))
676 {
677 *mode = A_REG_N;
678 *reg = 4 + (l1 - '0');
679 return 3;
680 }
681 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1'
682 && ! IDENT_CHAR ((unsigned char) src[3]))
683 {
684 *mode = A_REG_N;
685 *reg = 6 + (l1 - '0');
686 return 3;
687 }
688 if (l1 == 's' && src[2] >= '0' && src[2] <= '3'
689 && ! IDENT_CHAR ((unsigned char) src[3]))
690 {
691 int n = l1 - '0';
692
693 *mode = A_REG_N;
694 *reg = n | ((~n & 2) << 1);
695 return 3;
696 }
697 }
698
699 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2]))
700 {
701 if (l1 == 's')
702 {
703 *mode = A_REG_N;
704 *reg = 8;
705 return 2;
706 }
707 if (l1 == 'x')
708 {
709 *mode = A_REG_N;
710 *reg = 8;
711 return 2;
712 }
713 if (l1 == 'y')
714 {
715 *mode = A_REG_N;
716 *reg = 9;
717 return 2;
718 }
719 }
720
721 if (l0 == 'x' && l1 >= '0' && l1 <= '1'
722 && ! IDENT_CHAR ((unsigned char) src[2]))
723 {
724 *mode = DSP_REG_N;
725 *reg = A_X0_NUM + l1 - '0';
726 return 2;
727 }
728
729 if (l0 == 'y' && l1 >= '0' && l1 <= '1'
730 && ! IDENT_CHAR ((unsigned char) src[2]))
731 {
732 *mode = DSP_REG_N;
733 *reg = A_Y0_NUM + l1 - '0';
734 return 2;
735 }
736
737 if (l0 == 'm' && l1 >= '0' && l1 <= '1'
738 && ! IDENT_CHAR ((unsigned char) src[2]))
739 {
740 *mode = DSP_REG_N;
741 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM;
742 return 2;
743 }
744
745 if (l0 == 's'
746 && l1 == 's'
747 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3]))
748 {
749 *mode = A_SSR;
750 return 3;
751 }
752
753 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c'
754 && ! IDENT_CHAR ((unsigned char) src[3]))
755 {
756 *mode = A_SPC;
757 return 3;
758 }
759
760 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r'
761 && ! IDENT_CHAR ((unsigned char) src[3]))
762 {
763 *mode = A_SGR;
764 return 3;
765 }
766
767 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r'
768 && ! IDENT_CHAR ((unsigned char) src[3]))
769 {
770 *mode = A_DSR;
771 return 3;
772 }
773
774 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r'
775 && ! IDENT_CHAR ((unsigned char) src[3]))
776 {
777 *mode = A_DBR;
778 return 3;
779 }
780
781 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
782 {
783 *mode = A_SR;
784 return 2;
785 }
786
787 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2]))
788 {
789 *mode = A_REG_N;
790 *reg = 15;
791 return 2;
792 }
793
794 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2]))
795 {
796 *mode = A_PR;
797 return 2;
798 }
799 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2]))
800 {
801 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0'
802 and use an uninitialized immediate. */
803 *mode = A_PC;
804 return 2;
805 }
806 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r'
807 && ! IDENT_CHAR ((unsigned char) src[3]))
808 {
809 *mode = A_GBR;
810 return 3;
811 }
812 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r'
813 && ! IDENT_CHAR ((unsigned char) src[3]))
814 {
815 *mode = A_VBR;
816 return 3;
817 }
818
819 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r'
820 && ! IDENT_CHAR ((unsigned char) src[3]))
821 {
822 *mode = A_TBR;
823 return 3;
824 }
825 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c'
826 && ! IDENT_CHAR ((unsigned char) src[4]))
827 {
828 if (TOLOWER (src[3]) == 'l')
829 {
830 *mode = A_MACL;
831 return 4;
832 }
833 if (TOLOWER (src[3]) == 'h')
834 {
835 *mode = A_MACH;
836 return 4;
837 }
838 }
839 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd'
840 && ! IDENT_CHAR ((unsigned char) src[3]))
841 {
842 *mode = A_MOD;
843 return 3;
844 }
845 if (l0 == 'f' && l1 == 'r')
846 {
847 if (src[2] == '1')
848 {
849 if (src[3] >= '0' && src[3] <= '5'
850 && ! IDENT_CHAR ((unsigned char) src[4]))
851 {
852 *mode = F_REG_N;
853 *reg = 10 + src[3] - '0';
854 return 4;
855 }
856 }
857 if (src[2] >= '0' && src[2] <= '9'
858 && ! IDENT_CHAR ((unsigned char) src[3]))
859 {
860 *mode = F_REG_N;
861 *reg = (src[2] - '0');
862 return 3;
863 }
864 }
865 if (l0 == 'd' && l1 == 'r')
866 {
867 if (src[2] == '1')
868 {
869 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
870 && ! IDENT_CHAR ((unsigned char) src[4]))
871 {
872 *mode = D_REG_N;
873 *reg = 10 + src[3] - '0';
874 return 4;
875 }
876 }
877 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
878 && ! IDENT_CHAR ((unsigned char) src[3]))
879 {
880 *mode = D_REG_N;
881 *reg = (src[2] - '0');
882 return 3;
883 }
884 }
885 if (l0 == 'x' && l1 == 'd')
886 {
887 if (src[2] == '1')
888 {
889 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1)
890 && ! IDENT_CHAR ((unsigned char) src[4]))
891 {
892 *mode = X_REG_N;
893 *reg = 11 + src[3] - '0';
894 return 4;
895 }
896 }
897 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1)
898 && ! IDENT_CHAR ((unsigned char) src[3]))
899 {
900 *mode = X_REG_N;
901 *reg = (src[2] - '0') + 1;
902 return 3;
903 }
904 }
905 if (l0 == 'f' && l1 == 'v')
906 {
907 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4]))
908 {
909 *mode = V_REG_N;
910 *reg = 12;
911 return 4;
912 }
913 if ((src[2] == '0' || src[2] == '4' || src[2] == '8')
914 && ! IDENT_CHAR ((unsigned char) src[3]))
915 {
916 *mode = V_REG_N;
917 *reg = (src[2] - '0');
918 return 3;
919 }
920 }
921 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u'
922 && TOLOWER (src[3]) == 'l'
923 && ! IDENT_CHAR ((unsigned char) src[4]))
924 {
925 *mode = FPUL_N;
926 return 4;
927 }
928
929 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's'
930 && TOLOWER (src[3]) == 'c'
931 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5]))
932 {
933 *mode = FPSCR_N;
934 return 5;
935 }
936
937 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't'
938 && TOLOWER (src[3]) == 'r'
939 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5]))
940 {
941 *mode = XMTRX_M4;
942 return 5;
943 }
944
945 return 0;
946 }
947
948 /* Like parse_reg_without_prefix, but this version supports
949 $-prefixed register names if enabled by the user. */
950
951 static unsigned int
parse_reg(char * src,sh_arg_type * mode,int * reg)952 parse_reg (char *src, sh_arg_type *mode, int *reg)
953 {
954 unsigned int prefix;
955 unsigned int consumed;
956
957 if (src[0] == '$')
958 {
959 if (allow_dollar_register_prefix)
960 {
961 src ++;
962 prefix = 1;
963 }
964 else
965 return 0;
966 }
967 else
968 prefix = 0;
969
970 consumed = parse_reg_without_prefix (src, mode, reg);
971
972 if (consumed == 0)
973 return 0;
974
975 return consumed + prefix;
976 }
977
978 static char *
parse_exp(char * s,sh_operand_info * op)979 parse_exp (char *s, sh_operand_info *op)
980 {
981 char *save;
982 char *new_pointer;
983
984 save = input_line_pointer;
985 input_line_pointer = s;
986 expression (&op->immediate);
987 if (op->immediate.X_op == O_absent)
988 as_bad (_("missing operand"));
989 new_pointer = input_line_pointer;
990 input_line_pointer = save;
991 return new_pointer;
992 }
993
994 /* The many forms of operand:
995
996 Rn Register direct
997 @Rn Register indirect
998 @Rn+ Autoincrement
999 @-Rn Autodecrement
1000 @(disp:4,Rn)
1001 @(disp:8,GBR)
1002 @(disp:8,PC)
1003
1004 @(R0,Rn)
1005 @(R0,GBR)
1006
1007 disp:8
1008 disp:12
1009 #imm8
1010 pr, gbr, vbr, macl, mach
1011 */
1012
1013 static char *
parse_at(char * src,sh_operand_info * op)1014 parse_at (char *src, sh_operand_info *op)
1015 {
1016 int len;
1017 sh_arg_type mode;
1018 src++;
1019 if (src[0] == '@')
1020 {
1021 src = parse_at (src, op);
1022 if (op->type == A_DISP_TBR)
1023 op->type = A_DISP2_TBR;
1024 else
1025 as_bad (_("illegal double indirection"));
1026 }
1027 else if (src[0] == '-')
1028 {
1029 /* Must be predecrement. */
1030 src++;
1031
1032 len = parse_reg (src, &mode, &(op->reg));
1033 if (mode != A_REG_N)
1034 as_bad (_("illegal register after @-"));
1035
1036 op->type = A_DEC_N;
1037 src += len;
1038 }
1039 else if (src[0] == '(')
1040 {
1041 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or
1042 @(r0, rn). */
1043 src++;
1044 len = parse_reg (src, &mode, &(op->reg));
1045 if (len && mode == A_REG_N)
1046 {
1047 src += len;
1048 if (op->reg != 0)
1049 {
1050 as_bad (_("must be @(r0,...)"));
1051 }
1052 if (src[0] == ',')
1053 {
1054 src++;
1055 /* Now can be rn or gbr. */
1056 len = parse_reg (src, &mode, &(op->reg));
1057 }
1058 else
1059 {
1060 len = 0;
1061 }
1062 if (len)
1063 {
1064 if (mode == A_GBR)
1065 {
1066 op->type = A_R0_GBR;
1067 }
1068 else if (mode == A_REG_N)
1069 {
1070 op->type = A_IND_R0_REG_N;
1071 }
1072 else
1073 {
1074 as_bad (_("syntax error in @(r0,...)"));
1075 }
1076 }
1077 else
1078 {
1079 as_bad (_("syntax error in @(r0...)"));
1080 }
1081 }
1082 else
1083 {
1084 /* Must be an @(disp,.. thing). */
1085 src = parse_exp (src, op);
1086 if (src[0] == ',')
1087 src++;
1088 /* Now can be rn, gbr or pc. */
1089 len = parse_reg (src, &mode, &op->reg);
1090 if (len)
1091 {
1092 if (mode == A_REG_N)
1093 {
1094 op->type = A_DISP_REG_N;
1095 }
1096 else if (mode == A_GBR)
1097 {
1098 op->type = A_DISP_GBR;
1099 }
1100 else if (mode == A_TBR)
1101 {
1102 op->type = A_DISP_TBR;
1103 }
1104 else if (mode == A_PC)
1105 {
1106 /* We want @(expr, pc) to uniformly address . + expr,
1107 no matter if expr is a constant, or a more complex
1108 expression, e.g. sym-. or sym1-sym2.
1109 However, we also used to accept @(sym,pc)
1110 as addressing sym, i.e. meaning the same as plain sym.
1111 Some existing code does use the @(sym,pc) syntax, so
1112 we give it the old semantics for now, but warn about
1113 its use, so that users have some time to fix their code.
1114
1115 Note that due to this backward compatibility hack,
1116 we'll get unexpected results when @(offset, pc) is used,
1117 and offset is a symbol that is set later to an an address
1118 difference, or an external symbol that is set to an
1119 address difference in another source file, so we want to
1120 eventually remove it. */
1121 if (op->immediate.X_op == O_symbol)
1122 {
1123 op->type = A_DISP_PC;
1124 as_warn (_("Deprecated syntax."));
1125 }
1126 else
1127 {
1128 op->type = A_DISP_PC_ABS;
1129 /* Such operands don't get corrected for PC==.+4, so
1130 make the correction here. */
1131 op->immediate.X_add_number -= 4;
1132 }
1133 }
1134 else
1135 {
1136 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1137 }
1138 }
1139 else
1140 {
1141 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])"));
1142 }
1143 }
1144 src += len;
1145 if (src[0] != ')')
1146 as_bad (_("expecting )"));
1147 else
1148 src++;
1149 }
1150 else
1151 {
1152 src += parse_reg (src, &mode, &(op->reg));
1153 if (mode != A_REG_N)
1154 as_bad (_("illegal register after @"));
1155
1156 if (src[0] == '+')
1157 {
1158 char l0, l1;
1159
1160 src++;
1161 l0 = TOLOWER (src[0]);
1162 l1 = TOLOWER (src[1]);
1163
1164 if ((l0 == 'r' && l1 == '8')
1165 || (l0 == 'i' && (l1 == 'x' || l1 == 's')))
1166 {
1167 src += 2;
1168 op->type = AX_PMOD_N;
1169 }
1170 else if ( (l0 == 'r' && l1 == '9')
1171 || (l0 == 'i' && l1 == 'y'))
1172 {
1173 src += 2;
1174 op->type = AY_PMOD_N;
1175 }
1176 else
1177 op->type = A_INC_N;
1178 }
1179 else
1180 op->type = A_IND_N;
1181 }
1182 return src;
1183 }
1184
1185 static void
get_operand(char ** ptr,sh_operand_info * op)1186 get_operand (char **ptr, sh_operand_info *op)
1187 {
1188 char *src = *ptr;
1189 sh_arg_type mode = (sh_arg_type) -1;
1190 unsigned int len;
1191
1192 if (src[0] == '#')
1193 {
1194 src++;
1195 *ptr = parse_exp (src, op);
1196 op->type = A_IMM;
1197 return;
1198 }
1199
1200 else if (src[0] == '@')
1201 {
1202 *ptr = parse_at (src, op);
1203 return;
1204 }
1205 len = parse_reg (src, &mode, &(op->reg));
1206 if (len)
1207 {
1208 *ptr = src + len;
1209 op->type = mode;
1210 return;
1211 }
1212 else
1213 {
1214 /* Not a reg, the only thing left is a displacement. */
1215 *ptr = parse_exp (src, op);
1216 op->type = A_DISP_PC;
1217 return;
1218 }
1219 }
1220
1221 static char *
get_operands(sh_opcode_info * info,char * args,sh_operand_info * operand)1222 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand)
1223 {
1224 char *ptr = args;
1225
1226 operand[0].type = 0;
1227 operand[1].type = 0;
1228 operand[2].type = 0;
1229 if (info->arg[0])
1230 {
1231 /* The pre-processor will eliminate whitespace in front of '@'
1232 after the first argument; we may be called multiple times
1233 from assemble_ppi, so don't insist on finding whitespace here. */
1234 if (*ptr == ' ')
1235 ptr++;
1236
1237 get_operand (&ptr, operand + 0);
1238 if (info->arg[1])
1239 {
1240 if (*ptr == ',')
1241 ptr++;
1242 get_operand (&ptr, operand + 1);
1243 /* ??? Hack: psha/pshl have a varying operand number depending on
1244 the type of the first operand. We handle this by having the
1245 three-operand version first and reducing the number of operands
1246 parsed to two if we see that the first operand is an immediate.
1247 This works because no insn with three operands has an immediate
1248 as first operand. */
1249 if (info->arg[2] && operand[0].type != A_IMM)
1250 {
1251 if (*ptr == ',')
1252 ptr++;
1253 get_operand (&ptr, operand + 2);
1254 }
1255 }
1256 }
1257 return ptr;
1258 }
1259
1260 /* Passed a pointer to a list of opcodes which use different
1261 addressing modes, return the opcode which matches the opcodes
1262 provided. */
1263
1264 static sh_opcode_info *
get_specific(sh_opcode_info * opcode,sh_operand_info * operands)1265 get_specific (sh_opcode_info *opcode, sh_operand_info *operands)
1266 {
1267 sh_opcode_info *this_try = opcode;
1268 const char *name = opcode->name;
1269 int n = 0;
1270
1271 while (opcode->name)
1272 {
1273 this_try = opcode++;
1274 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0))
1275 {
1276 /* We've looked so far down the table that we've run out of
1277 opcodes with the same name. */
1278 return 0;
1279 }
1280
1281 /* Look at both operands needed by the opcodes and provided by
1282 the user - since an arg test will often fail on the same arg
1283 again and again, we'll try and test the last failing arg the
1284 first on each opcode try. */
1285 for (n = 0; this_try->arg[n]; n++)
1286 {
1287 sh_operand_info *user = operands + n;
1288 sh_arg_type arg = this_try->arg[n];
1289
1290 switch (arg)
1291 {
1292 case A_DISP_PC:
1293 if (user->type == A_DISP_PC_ABS)
1294 break;
1295 /* Fall through. */
1296 case A_IMM:
1297 case A_BDISP12:
1298 case A_BDISP8:
1299 case A_DISP_GBR:
1300 case A_DISP2_TBR:
1301 case A_MACH:
1302 case A_PR:
1303 case A_MACL:
1304 if (user->type != arg)
1305 goto fail;
1306 break;
1307 case A_R0:
1308 /* opcode needs r0 */
1309 if (user->type != A_REG_N || user->reg != 0)
1310 goto fail;
1311 break;
1312 case A_R0_GBR:
1313 if (user->type != A_R0_GBR || user->reg != 0)
1314 goto fail;
1315 break;
1316 case F_FR0:
1317 if (user->type != F_REG_N || user->reg != 0)
1318 goto fail;
1319 break;
1320
1321 case A_REG_N:
1322 case A_INC_N:
1323 case A_DEC_N:
1324 case A_IND_N:
1325 case A_IND_R0_REG_N:
1326 case A_DISP_REG_N:
1327 case F_REG_N:
1328 case D_REG_N:
1329 case X_REG_N:
1330 case V_REG_N:
1331 case FPUL_N:
1332 case FPSCR_N:
1333 case DSP_REG_N:
1334 /* Opcode needs rn */
1335 if (user->type != arg)
1336 goto fail;
1337 reg_n = user->reg;
1338 break;
1339 case DX_REG_N:
1340 if (user->type != D_REG_N && user->type != X_REG_N)
1341 goto fail;
1342 reg_n = user->reg;
1343 break;
1344 case A_GBR:
1345 case A_TBR:
1346 case A_SR:
1347 case A_VBR:
1348 case A_DSR:
1349 case A_MOD:
1350 case A_RE:
1351 case A_RS:
1352 case A_SSR:
1353 case A_SPC:
1354 case A_SGR:
1355 case A_DBR:
1356 if (user->type != arg)
1357 goto fail;
1358 break;
1359
1360 case A_REG_B:
1361 if (user->type != arg)
1362 goto fail;
1363 reg_b = user->reg;
1364 break;
1365
1366 case A_INC_R15:
1367 if (user->type != A_INC_N)
1368 goto fail;
1369 if (user->reg != 15)
1370 goto fail;
1371 reg_n = user->reg;
1372 break;
1373
1374 case A_DEC_R15:
1375 if (user->type != A_DEC_N)
1376 goto fail;
1377 if (user->reg != 15)
1378 goto fail;
1379 reg_n = user->reg;
1380 break;
1381
1382 case A_REG_M:
1383 case A_INC_M:
1384 case A_DEC_M:
1385 case A_IND_M:
1386 case A_IND_R0_REG_M:
1387 case A_DISP_REG_M:
1388 case DSP_REG_M:
1389 /* Opcode needs rn */
1390 if (user->type != arg - A_REG_M + A_REG_N)
1391 goto fail;
1392 reg_m = user->reg;
1393 break;
1394
1395 case AS_DEC_N:
1396 if (user->type != A_DEC_N)
1397 goto fail;
1398 if (user->reg < 2 || user->reg > 5)
1399 goto fail;
1400 reg_n = user->reg;
1401 break;
1402
1403 case AS_INC_N:
1404 if (user->type != A_INC_N)
1405 goto fail;
1406 if (user->reg < 2 || user->reg > 5)
1407 goto fail;
1408 reg_n = user->reg;
1409 break;
1410
1411 case AS_IND_N:
1412 if (user->type != A_IND_N)
1413 goto fail;
1414 if (user->reg < 2 || user->reg > 5)
1415 goto fail;
1416 reg_n = user->reg;
1417 break;
1418
1419 case AS_PMOD_N:
1420 if (user->type != AX_PMOD_N)
1421 goto fail;
1422 if (user->reg < 2 || user->reg > 5)
1423 goto fail;
1424 reg_n = user->reg;
1425 break;
1426
1427 case AX_INC_N:
1428 if (user->type != A_INC_N)
1429 goto fail;
1430 if (user->reg < 4 || user->reg > 5)
1431 goto fail;
1432 reg_n = user->reg;
1433 break;
1434
1435 case AX_IND_N:
1436 if (user->type != A_IND_N)
1437 goto fail;
1438 if (user->reg < 4 || user->reg > 5)
1439 goto fail;
1440 reg_n = user->reg;
1441 break;
1442
1443 case AX_PMOD_N:
1444 if (user->type != AX_PMOD_N)
1445 goto fail;
1446 if (user->reg < 4 || user->reg > 5)
1447 goto fail;
1448 reg_n = user->reg;
1449 break;
1450
1451 case AXY_INC_N:
1452 if (user->type != A_INC_N)
1453 goto fail;
1454 if ((user->reg < 4 || user->reg > 5)
1455 && (user->reg < 0 || user->reg > 1))
1456 goto fail;
1457 reg_n = user->reg;
1458 break;
1459
1460 case AXY_IND_N:
1461 if (user->type != A_IND_N)
1462 goto fail;
1463 if ((user->reg < 4 || user->reg > 5)
1464 && (user->reg < 0 || user->reg > 1))
1465 goto fail;
1466 reg_n = user->reg;
1467 break;
1468
1469 case AXY_PMOD_N:
1470 if (user->type != AX_PMOD_N)
1471 goto fail;
1472 if ((user->reg < 4 || user->reg > 5)
1473 && (user->reg < 0 || user->reg > 1))
1474 goto fail;
1475 reg_n = user->reg;
1476 break;
1477
1478 case AY_INC_N:
1479 if (user->type != A_INC_N)
1480 goto fail;
1481 if (user->reg < 6 || user->reg > 7)
1482 goto fail;
1483 reg_n = user->reg;
1484 break;
1485
1486 case AY_IND_N:
1487 if (user->type != A_IND_N)
1488 goto fail;
1489 if (user->reg < 6 || user->reg > 7)
1490 goto fail;
1491 reg_n = user->reg;
1492 break;
1493
1494 case AY_PMOD_N:
1495 if (user->type != AY_PMOD_N)
1496 goto fail;
1497 if (user->reg < 6 || user->reg > 7)
1498 goto fail;
1499 reg_n = user->reg;
1500 break;
1501
1502 case AYX_INC_N:
1503 if (user->type != A_INC_N)
1504 goto fail;
1505 if ((user->reg < 6 || user->reg > 7)
1506 && (user->reg < 2 || user->reg > 3))
1507 goto fail;
1508 reg_n = user->reg;
1509 break;
1510
1511 case AYX_IND_N:
1512 if (user->type != A_IND_N)
1513 goto fail;
1514 if ((user->reg < 6 || user->reg > 7)
1515 && (user->reg < 2 || user->reg > 3))
1516 goto fail;
1517 reg_n = user->reg;
1518 break;
1519
1520 case AYX_PMOD_N:
1521 if (user->type != AY_PMOD_N)
1522 goto fail;
1523 if ((user->reg < 6 || user->reg > 7)
1524 && (user->reg < 2 || user->reg > 3))
1525 goto fail;
1526 reg_n = user->reg;
1527 break;
1528
1529 case DSP_REG_A_M:
1530 if (user->type != DSP_REG_N)
1531 goto fail;
1532 if (user->reg != A_A0_NUM
1533 && user->reg != A_A1_NUM)
1534 goto fail;
1535 reg_m = user->reg;
1536 break;
1537
1538 case DSP_REG_AX:
1539 if (user->type != DSP_REG_N)
1540 goto fail;
1541 switch (user->reg)
1542 {
1543 case A_A0_NUM:
1544 reg_x = 0;
1545 break;
1546 case A_A1_NUM:
1547 reg_x = 2;
1548 break;
1549 case A_X0_NUM:
1550 reg_x = 1;
1551 break;
1552 case A_X1_NUM:
1553 reg_x = 3;
1554 break;
1555 default:
1556 goto fail;
1557 }
1558 break;
1559
1560 case DSP_REG_XY:
1561 if (user->type != DSP_REG_N)
1562 goto fail;
1563 switch (user->reg)
1564 {
1565 case A_X0_NUM:
1566 reg_x = 0;
1567 break;
1568 case A_X1_NUM:
1569 reg_x = 2;
1570 break;
1571 case A_Y0_NUM:
1572 reg_x = 1;
1573 break;
1574 case A_Y1_NUM:
1575 reg_x = 3;
1576 break;
1577 default:
1578 goto fail;
1579 }
1580 break;
1581
1582 case DSP_REG_AY:
1583 if (user->type != DSP_REG_N)
1584 goto fail;
1585 switch (user->reg)
1586 {
1587 case A_A0_NUM:
1588 reg_y = 0;
1589 break;
1590 case A_A1_NUM:
1591 reg_y = 1;
1592 break;
1593 case A_Y0_NUM:
1594 reg_y = 2;
1595 break;
1596 case A_Y1_NUM:
1597 reg_y = 3;
1598 break;
1599 default:
1600 goto fail;
1601 }
1602 break;
1603
1604 case DSP_REG_YX:
1605 if (user->type != DSP_REG_N)
1606 goto fail;
1607 switch (user->reg)
1608 {
1609 case A_Y0_NUM:
1610 reg_y = 0;
1611 break;
1612 case A_Y1_NUM:
1613 reg_y = 1;
1614 break;
1615 case A_X0_NUM:
1616 reg_y = 2;
1617 break;
1618 case A_X1_NUM:
1619 reg_y = 3;
1620 break;
1621 default:
1622 goto fail;
1623 }
1624 break;
1625
1626 case DSP_REG_X:
1627 if (user->type != DSP_REG_N)
1628 goto fail;
1629 switch (user->reg)
1630 {
1631 case A_X0_NUM:
1632 reg_x = 0;
1633 break;
1634 case A_X1_NUM:
1635 reg_x = 1;
1636 break;
1637 case A_A0_NUM:
1638 reg_x = 2;
1639 break;
1640 case A_A1_NUM:
1641 reg_x = 3;
1642 break;
1643 default:
1644 goto fail;
1645 }
1646 break;
1647
1648 case DSP_REG_Y:
1649 if (user->type != DSP_REG_N)
1650 goto fail;
1651 switch (user->reg)
1652 {
1653 case A_Y0_NUM:
1654 reg_y = 0;
1655 break;
1656 case A_Y1_NUM:
1657 reg_y = 1;
1658 break;
1659 case A_M0_NUM:
1660 reg_y = 2;
1661 break;
1662 case A_M1_NUM:
1663 reg_y = 3;
1664 break;
1665 default:
1666 goto fail;
1667 }
1668 break;
1669
1670 case DSP_REG_E:
1671 if (user->type != DSP_REG_N)
1672 goto fail;
1673 switch (user->reg)
1674 {
1675 case A_X0_NUM:
1676 reg_efg = 0 << 10;
1677 break;
1678 case A_X1_NUM:
1679 reg_efg = 1 << 10;
1680 break;
1681 case A_Y0_NUM:
1682 reg_efg = 2 << 10;
1683 break;
1684 case A_A1_NUM:
1685 reg_efg = 3 << 10;
1686 break;
1687 default:
1688 goto fail;
1689 }
1690 break;
1691
1692 case DSP_REG_F:
1693 if (user->type != DSP_REG_N)
1694 goto fail;
1695 switch (user->reg)
1696 {
1697 case A_Y0_NUM:
1698 reg_efg |= 0 << 8;
1699 break;
1700 case A_Y1_NUM:
1701 reg_efg |= 1 << 8;
1702 break;
1703 case A_X0_NUM:
1704 reg_efg |= 2 << 8;
1705 break;
1706 case A_A1_NUM:
1707 reg_efg |= 3 << 8;
1708 break;
1709 default:
1710 goto fail;
1711 }
1712 break;
1713
1714 case DSP_REG_G:
1715 if (user->type != DSP_REG_N)
1716 goto fail;
1717 switch (user->reg)
1718 {
1719 case A_M0_NUM:
1720 reg_efg |= 0 << 2;
1721 break;
1722 case A_M1_NUM:
1723 reg_efg |= 1 << 2;
1724 break;
1725 case A_A0_NUM:
1726 reg_efg |= 2 << 2;
1727 break;
1728 case A_A1_NUM:
1729 reg_efg |= 3 << 2;
1730 break;
1731 default:
1732 goto fail;
1733 }
1734 break;
1735
1736 case A_A0:
1737 if (user->type != DSP_REG_N || user->reg != A_A0_NUM)
1738 goto fail;
1739 break;
1740 case A_X0:
1741 if (user->type != DSP_REG_N || user->reg != A_X0_NUM)
1742 goto fail;
1743 break;
1744 case A_X1:
1745 if (user->type != DSP_REG_N || user->reg != A_X1_NUM)
1746 goto fail;
1747 break;
1748 case A_Y0:
1749 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM)
1750 goto fail;
1751 break;
1752 case A_Y1:
1753 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM)
1754 goto fail;
1755 break;
1756
1757 case F_REG_M:
1758 case D_REG_M:
1759 case X_REG_M:
1760 case V_REG_M:
1761 case FPUL_M:
1762 case FPSCR_M:
1763 /* Opcode needs rn */
1764 if (user->type != arg - F_REG_M + F_REG_N)
1765 goto fail;
1766 reg_m = user->reg;
1767 break;
1768 case DX_REG_M:
1769 if (user->type != D_REG_N && user->type != X_REG_N)
1770 goto fail;
1771 reg_m = user->reg;
1772 break;
1773 case XMTRX_M4:
1774 if (user->type != XMTRX_M4)
1775 goto fail;
1776 reg_m = 4;
1777 break;
1778
1779 default:
1780 printf (_("unhandled %d\n"), arg);
1781 goto fail;
1782 }
1783 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up)
1784 && ( arg == A_DISP_REG_M
1785 || arg == A_DISP_REG_N))
1786 {
1787 /* Check a few key IMM* fields for overflow. */
1788 int opf;
1789 long val = user->immediate.X_add_number;
1790
1791 for (opf = 0; opf < 4; opf ++)
1792 switch (this_try->nibbles[opf])
1793 {
1794 case IMM0_4:
1795 case IMM1_4:
1796 if (val < 0 || val > 15)
1797 goto fail;
1798 break;
1799 case IMM0_4BY2:
1800 case IMM1_4BY2:
1801 if (val < 0 || val > 15 * 2)
1802 goto fail;
1803 break;
1804 case IMM0_4BY4:
1805 case IMM1_4BY4:
1806 if (val < 0 || val > 15 * 4)
1807 goto fail;
1808 break;
1809 default:
1810 break;
1811 }
1812 }
1813 }
1814 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch))
1815 goto fail;
1816 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch);
1817 return this_try;
1818 fail:
1819 ;
1820 }
1821
1822 return 0;
1823 }
1824
1825 static void
insert(char * where,bfd_reloc_code_real_type how,int pcrel,sh_operand_info * op)1826 insert (char *where, bfd_reloc_code_real_type how, int pcrel,
1827 sh_operand_info *op)
1828 {
1829 fix_new_exp (frag_now,
1830 where - frag_now->fr_literal,
1831 2,
1832 &op->immediate,
1833 pcrel,
1834 how);
1835 }
1836
1837 static void
insert4(char * where,bfd_reloc_code_real_type how,int pcrel,sh_operand_info * op)1838 insert4 (char * where, bfd_reloc_code_real_type how, int pcrel,
1839 sh_operand_info * op)
1840 {
1841 fix_new_exp (frag_now,
1842 where - frag_now->fr_literal,
1843 4,
1844 & op->immediate,
1845 pcrel,
1846 how);
1847 }
1848 static void
build_relax(sh_opcode_info * opcode,sh_operand_info * op)1849 build_relax (sh_opcode_info *opcode, sh_operand_info *op)
1850 {
1851 int high_byte = target_big_endian ? 0 : 1;
1852 char *p;
1853
1854 if (opcode->arg[0] == A_BDISP8)
1855 {
1856 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP;
1857 p = frag_var (rs_machine_dependent,
1858 md_relax_table[C (what, COND32)].rlx_length,
1859 md_relax_table[C (what, COND8)].rlx_length,
1860 C (what, 0),
1861 op->immediate.X_add_symbol,
1862 op->immediate.X_add_number,
1863 0);
1864 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]);
1865 }
1866 else if (opcode->arg[0] == A_BDISP12)
1867 {
1868 p = frag_var (rs_machine_dependent,
1869 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length,
1870 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length,
1871 C (UNCOND_JUMP, 0),
1872 op->immediate.X_add_symbol,
1873 op->immediate.X_add_number,
1874 0);
1875 p[high_byte] = (opcode->nibbles[0] << 4);
1876 }
1877
1878 }
1879
1880 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */
1881
1882 static char *
insert_loop_bounds(char * output,sh_operand_info * operand)1883 insert_loop_bounds (char *output, sh_operand_info *operand)
1884 {
1885 symbolS *end_sym;
1886
1887 /* Since the low byte of the opcode will be overwritten by the reloc, we
1888 can just stash the high byte into both bytes and ignore endianness. */
1889 output[0] = 0x8c;
1890 output[1] = 0x8c;
1891 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1892 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1893
1894 if (sh_relax)
1895 {
1896 static int count = 0;
1897 char name[11];
1898 expressionS *symval;
1899
1900 /* If the last loop insn is a two-byte-insn, it is in danger of being
1901 swapped with the insn after it. To prevent this, create a new
1902 symbol - complete with SH_LABEL reloc - after the last loop insn.
1903 If the last loop insn is four bytes long, the symbol will be
1904 right in the middle, but four byte insns are not swapped anyways. */
1905 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space.
1906 Hence a 9 digit number should be enough to count all REPEATs. */
1907 sprintf (name, "_R%x", count++ & 0x3fffffff);
1908 end_sym = symbol_new (name, undefined_section, &zero_address_frag, 0);
1909 /* Make this a local symbol. */
1910 #ifdef OBJ_COFF
1911 SF_SET_LOCAL (end_sym);
1912 #endif /* OBJ_COFF */
1913 symbol_table_insert (end_sym);
1914 symval = symbol_get_value_expression (end_sym);
1915 *symval = operand[1].immediate;
1916 symval->X_add_number += 2;
1917 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL);
1918 }
1919
1920 output = frag_more (2);
1921 output[0] = 0x8e;
1922 output[1] = 0x8e;
1923 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand);
1924 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1);
1925
1926 return frag_more (2);
1927 }
1928
1929 /* Now we know what sort of opcodes it is, let's build the bytes. */
1930
1931 static unsigned int
build_Mytes(sh_opcode_info * opcode,sh_operand_info * operand)1932 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand)
1933 {
1934 int indx;
1935 char nbuf[8];
1936 char *output;
1937 unsigned int size = 2;
1938 int low_byte = target_big_endian ? 1 : 0;
1939 int max_index = 4;
1940 bfd_reloc_code_real_type r_type;
1941 #ifdef OBJ_ELF
1942 int unhandled_pic = 0;
1943 #endif
1944
1945 nbuf[0] = 0;
1946 nbuf[1] = 0;
1947 nbuf[2] = 0;
1948 nbuf[3] = 0;
1949 nbuf[4] = 0;
1950 nbuf[5] = 0;
1951 nbuf[6] = 0;
1952 nbuf[7] = 0;
1953
1954 #ifdef OBJ_ELF
1955 for (indx = 0; indx < 3; indx++)
1956 if (opcode->arg[indx] == A_IMM
1957 && operand[indx].type == A_IMM
1958 && (operand[indx].immediate.X_op == O_PIC_reloc
1959 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol)
1960 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol)))
1961 unhandled_pic = 1;
1962 #endif
1963
1964 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
1965 {
1966 output = frag_more (4);
1967 size = 4;
1968 max_index = 8;
1969 }
1970 else
1971 output = frag_more (2);
1972
1973 for (indx = 0; indx < max_index; indx++)
1974 {
1975 sh_nibble_type i = opcode->nibbles[indx];
1976 if (i < 16)
1977 {
1978 nbuf[indx] = i;
1979 }
1980 else
1981 {
1982 switch (i)
1983 {
1984 case REG_N:
1985 case REG_N_D:
1986 nbuf[indx] = reg_n;
1987 break;
1988 case REG_M:
1989 nbuf[indx] = reg_m;
1990 break;
1991 case SDT_REG_N:
1992 if (reg_n < 2 || reg_n > 5)
1993 as_bad (_("Invalid register: 'r%d'"), reg_n);
1994 nbuf[indx] = (reg_n & 3) | 4;
1995 break;
1996 case REG_NM:
1997 nbuf[indx] = reg_n | (reg_m >> 2);
1998 break;
1999 case REG_B:
2000 nbuf[indx] = reg_b | 0x08;
2001 break;
2002 case REG_N_B01:
2003 nbuf[indx] = reg_n | 0x01;
2004 break;
2005 case IMM0_3s:
2006 nbuf[indx] |= 0x08;
2007 /* Fall through. */
2008 case IMM0_3c:
2009 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand);
2010 break;
2011 case IMM0_3Us:
2012 nbuf[indx] |= 0x80;
2013 /* Fall through. */
2014 case IMM0_3Uc:
2015 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand);
2016 break;
2017 case DISP0_12:
2018 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand);
2019 break;
2020 case DISP0_12BY2:
2021 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand);
2022 break;
2023 case DISP0_12BY4:
2024 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand);
2025 break;
2026 case DISP0_12BY8:
2027 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand);
2028 break;
2029 case DISP1_12:
2030 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1);
2031 break;
2032 case DISP1_12BY2:
2033 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1);
2034 break;
2035 case DISP1_12BY4:
2036 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1);
2037 break;
2038 case DISP1_12BY8:
2039 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1);
2040 break;
2041 case IMM0_20_4:
2042 break;
2043 case IMM0_20:
2044 r_type = BFD_RELOC_SH_DISP20;
2045 #ifdef OBJ_ELF
2046 if (sh_check_fixup (&operand->immediate, &r_type))
2047 as_bad (_("Invalid PIC expression."));
2048 unhandled_pic = 0;
2049 #endif
2050 insert4 (output, r_type, 0, operand);
2051 break;
2052 case IMM0_20BY8:
2053 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand);
2054 break;
2055 case IMM0_4BY4:
2056 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand);
2057 break;
2058 case IMM0_4BY2:
2059 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand);
2060 break;
2061 case IMM0_4:
2062 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand);
2063 break;
2064 case IMM1_4BY4:
2065 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1);
2066 break;
2067 case IMM1_4BY2:
2068 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1);
2069 break;
2070 case IMM1_4:
2071 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1);
2072 break;
2073 case IMM0_8BY4:
2074 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand);
2075 break;
2076 case IMM0_8BY2:
2077 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand);
2078 break;
2079 case IMM0_8U:
2080 case IMM0_8S:
2081 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand);
2082 break;
2083 case IMM1_8BY4:
2084 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1);
2085 break;
2086 case IMM1_8BY2:
2087 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1);
2088 break;
2089 case IMM1_8:
2090 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1);
2091 break;
2092 case PCRELIMM_8BY4:
2093 insert (output, BFD_RELOC_SH_PCRELIMM8BY4,
2094 operand->type != A_DISP_PC_ABS, operand);
2095 break;
2096 case PCRELIMM_8BY2:
2097 insert (output, BFD_RELOC_SH_PCRELIMM8BY2,
2098 operand->type != A_DISP_PC_ABS, operand);
2099 break;
2100 case REPEAT:
2101 output = insert_loop_bounds (output, operand);
2102 nbuf[indx] = opcode->nibbles[3];
2103 operand += 2;
2104 break;
2105 default:
2106 printf (_("failed for %d\n"), i);
2107 }
2108 }
2109 }
2110 #ifdef OBJ_ELF
2111 if (unhandled_pic)
2112 as_bad (_("misplaced PIC operand"));
2113 #endif
2114 if (!target_big_endian)
2115 {
2116 output[1] = (nbuf[0] << 4) | (nbuf[1]);
2117 output[0] = (nbuf[2] << 4) | (nbuf[3]);
2118 }
2119 else
2120 {
2121 output[0] = (nbuf[0] << 4) | (nbuf[1]);
2122 output[1] = (nbuf[2] << 4) | (nbuf[3]);
2123 }
2124 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
2125 {
2126 if (!target_big_endian)
2127 {
2128 output[3] = (nbuf[4] << 4) | (nbuf[5]);
2129 output[2] = (nbuf[6] << 4) | (nbuf[7]);
2130 }
2131 else
2132 {
2133 output[2] = (nbuf[4] << 4) | (nbuf[5]);
2134 output[3] = (nbuf[6] << 4) | (nbuf[7]);
2135 }
2136 }
2137 return size;
2138 }
2139
2140 /* Find an opcode at the start of *STR_P in the hash table, and set
2141 *STR_P to the first character after the last one read. */
2142
2143 static sh_opcode_info *
find_cooked_opcode(char ** str_p)2144 find_cooked_opcode (char **str_p)
2145 {
2146 char *str = *str_p;
2147 unsigned char *op_start;
2148 unsigned char *op_end;
2149 char name[20];
2150 unsigned int nlen = 0;
2151
2152 /* Drop leading whitespace. */
2153 while (*str == ' ')
2154 str++;
2155
2156 /* Find the op code end.
2157 The pre-processor will eliminate whitespace in front of
2158 any '@' after the first argument; we may be called from
2159 assemble_ppi, so the opcode might be terminated by an '@'. */
2160 for (op_start = op_end = (unsigned char *) str;
2161 *op_end
2162 && nlen < sizeof (name) - 1
2163 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@';
2164 op_end++)
2165 {
2166 unsigned char c = op_start[nlen];
2167
2168 /* The machine independent code will convert CMP/EQ into cmp/EQ
2169 because it thinks the '/' is the end of the symbol. Moreover,
2170 all but the first sub-insn is a parallel processing insn won't
2171 be capitalized. Instead of hacking up the machine independent
2172 code, we just deal with it here. */
2173 c = TOLOWER (c);
2174 name[nlen] = c;
2175 nlen++;
2176 }
2177
2178 name[nlen] = 0;
2179 *str_p = (char *) op_end;
2180
2181 if (nlen == 0)
2182 as_bad (_("can't find opcode "));
2183
2184 return (sh_opcode_info *) str_hash_find (opcode_hash_control, name);
2185 }
2186
2187 /* Assemble a parallel processing insn. */
2188 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */
2189
2190 static unsigned int
assemble_ppi(char * op_end,sh_opcode_info * opcode)2191 assemble_ppi (char *op_end, sh_opcode_info *opcode)
2192 {
2193 unsigned int movx = 0;
2194 unsigned int movy = 0;
2195 unsigned int cond = 0;
2196 unsigned int field_b = 0;
2197 char *output;
2198 unsigned int move_code;
2199 unsigned int size;
2200
2201 for (;;)
2202 {
2203 sh_operand_info operand[3];
2204
2205 /* Some insn ignore one or more register fields, e.g. psts machl,a0.
2206 Make sure we encode a defined insn pattern. */
2207 reg_x = 0;
2208 reg_y = 0;
2209 reg_n = 0;
2210
2211 if (opcode->arg[0] != A_END)
2212 op_end = get_operands (opcode, op_end, operand);
2213 try_another_opcode:
2214 opcode = get_specific (opcode, operand);
2215 if (opcode == 0)
2216 {
2217 /* Couldn't find an opcode which matched the operands. */
2218 char *where = frag_more (2);
2219 size = 2;
2220
2221 where[0] = 0x0;
2222 where[1] = 0x0;
2223 as_bad (_("invalid operands for opcode"));
2224 return size;
2225 }
2226
2227 if (opcode->nibbles[0] != PPI)
2228 as_bad (_("insn can't be combined with parallel processing insn"));
2229
2230 switch (opcode->nibbles[1])
2231 {
2232
2233 case NOPX:
2234 if (movx)
2235 as_bad (_("multiple movx specifications"));
2236 movx = DDT_BASE;
2237 break;
2238 case NOPY:
2239 if (movy)
2240 as_bad (_("multiple movy specifications"));
2241 movy = DDT_BASE;
2242 break;
2243
2244 case MOVX_NOPY:
2245 if (movx)
2246 as_bad (_("multiple movx specifications"));
2247 if ((reg_n < 4 || reg_n > 5)
2248 && (reg_n < 0 || reg_n > 1))
2249 as_bad (_("invalid movx address register"));
2250 if (movy && movy != DDT_BASE)
2251 as_bad (_("insn cannot be combined with non-nopy"));
2252 movx = ((((reg_n & 1) != 0) << 9)
2253 + (((reg_n & 4) == 0) << 8)
2254 + (reg_x << 6)
2255 + (opcode->nibbles[2] << 4)
2256 + opcode->nibbles[3]
2257 + DDT_BASE);
2258 break;
2259
2260 case MOVY_NOPX:
2261 if (movy)
2262 as_bad (_("multiple movy specifications"));
2263 if ((reg_n < 6 || reg_n > 7)
2264 && (reg_n < 2 || reg_n > 3))
2265 as_bad (_("invalid movy address register"));
2266 if (movx && movx != DDT_BASE)
2267 as_bad (_("insn cannot be combined with non-nopx"));
2268 movy = ((((reg_n & 1) != 0) << 8)
2269 + (((reg_n & 4) == 0) << 9)
2270 + (reg_y << 6)
2271 + (opcode->nibbles[2] << 4)
2272 + opcode->nibbles[3]
2273 + DDT_BASE);
2274 break;
2275
2276 case MOVX:
2277 if (movx)
2278 as_bad (_("multiple movx specifications"));
2279 if (movy & 0x2ac)
2280 as_bad (_("previous movy requires nopx"));
2281 if (reg_n < 4 || reg_n > 5)
2282 as_bad (_("invalid movx address register"));
2283 if (opcode->nibbles[2] & 8)
2284 {
2285 if (reg_m == A_A1_NUM)
2286 movx = 1 << 7;
2287 else if (reg_m != A_A0_NUM)
2288 as_bad (_("invalid movx dsp register"));
2289 }
2290 else
2291 {
2292 if (reg_x > 1)
2293 as_bad (_("invalid movx dsp register"));
2294 movx = reg_x << 7;
2295 }
2296 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE;
2297 break;
2298
2299 case MOVY:
2300 if (movy)
2301 as_bad (_("multiple movy specifications"));
2302 if (movx & 0x153)
2303 as_bad (_("previous movx requires nopy"));
2304 if (opcode->nibbles[2] & 8)
2305 {
2306 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode,
2307 so add 8 more. */
2308 movy = 8;
2309 if (reg_m == A_A1_NUM)
2310 movy += 1 << 6;
2311 else if (reg_m != A_A0_NUM)
2312 as_bad (_("invalid movy dsp register"));
2313 }
2314 else
2315 {
2316 if (reg_y > 1)
2317 as_bad (_("invalid movy dsp register"));
2318 movy = reg_y << 6;
2319 }
2320 if (reg_n < 6 || reg_n > 7)
2321 as_bad (_("invalid movy address register"));
2322 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE;
2323 break;
2324
2325 case PSH:
2326 if (operand[0].immediate.X_op != O_constant)
2327 as_bad (_("dsp immediate shift value not constant"));
2328 field_b = ((opcode->nibbles[2] << 12)
2329 | (operand[0].immediate.X_add_number & 127) << 4
2330 | reg_n);
2331 break;
2332 case PPI3NC:
2333 if (cond)
2334 {
2335 opcode++;
2336 goto try_another_opcode;
2337 }
2338 /* Fall through. */
2339 case PPI3:
2340 if (field_b)
2341 as_bad (_("multiple parallel processing specifications"));
2342 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2343 + (reg_x << 6) + (reg_y << 4) + reg_n);
2344 switch (opcode->nibbles[4])
2345 {
2346 case HEX_0:
2347 case HEX_XX00:
2348 case HEX_00YY:
2349 break;
2350 case HEX_1:
2351 case HEX_4:
2352 field_b += opcode->nibbles[4] << 4;
2353 break;
2354 default:
2355 abort ();
2356 }
2357 break;
2358 case PDC:
2359 if (cond)
2360 as_bad (_("multiple condition specifications"));
2361 cond = opcode->nibbles[2] << 8;
2362 if (*op_end)
2363 goto skip_cond_check;
2364 break;
2365 case PPIC:
2366 if (field_b)
2367 as_bad (_("multiple parallel processing specifications"));
2368 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8)
2369 + cond + (reg_x << 6) + (reg_y << 4) + reg_n);
2370 cond = 0;
2371 switch (opcode->nibbles[4])
2372 {
2373 case HEX_0:
2374 case HEX_XX00:
2375 case HEX_00YY:
2376 break;
2377 case HEX_1:
2378 case HEX_4:
2379 field_b += opcode->nibbles[4] << 4;
2380 break;
2381 default:
2382 abort ();
2383 }
2384 break;
2385 case PMUL:
2386 if (field_b)
2387 {
2388 if ((field_b & 0xef00) == 0xa100)
2389 field_b -= 0x8100;
2390 /* pclr Dz pmuls Se,Sf,Dg */
2391 else if ((field_b & 0xff00) == 0x8d00
2392 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up)))
2393 {
2394 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up);
2395 field_b -= 0x8cf0;
2396 }
2397 else
2398 as_bad (_("insn cannot be combined with pmuls"));
2399 switch (field_b & 0xf)
2400 {
2401 case A_X0_NUM:
2402 field_b += 0 - A_X0_NUM;
2403 break;
2404 case A_Y0_NUM:
2405 field_b += 1 - A_Y0_NUM;
2406 break;
2407 case A_A0_NUM:
2408 field_b += 2 - A_A0_NUM;
2409 break;
2410 case A_A1_NUM:
2411 field_b += 3 - A_A1_NUM;
2412 break;
2413 default:
2414 as_bad (_("bad combined pmuls output operand"));
2415 }
2416 /* Generate warning if the destination register for padd / psub
2417 and pmuls is the same ( only for A0 or A1 ).
2418 If the last nibble is 1010 then A0 is used in both
2419 padd / psub and pmuls. If it is 1111 then A1 is used
2420 as destination register in both padd / psub and pmuls. */
2421
2422 if ((((field_b | reg_efg) & 0x000F) == 0x000A)
2423 || (((field_b | reg_efg) & 0x000F) == 0x000F))
2424 as_warn (_("destination register is same for parallel insns"));
2425 }
2426 field_b += 0x4000 + reg_efg;
2427 break;
2428 default:
2429 abort ();
2430 }
2431 if (cond)
2432 {
2433 as_bad (_("condition not followed by conditionalizable insn"));
2434 cond = 0;
2435 }
2436 if (! *op_end)
2437 break;
2438 skip_cond_check:
2439 opcode = find_cooked_opcode (&op_end);
2440 if (opcode == NULL)
2441 {
2442 (as_bad
2443 (_("unrecognized characters at end of parallel processing insn")));
2444 break;
2445 }
2446 }
2447
2448 move_code = movx | movy;
2449 if (field_b)
2450 {
2451 /* Parallel processing insn. */
2452 unsigned int ppi_code = (movx | movy | 0xf800) << 16 | field_b;
2453
2454 output = frag_more (4);
2455 size = 4;
2456 if (! target_big_endian)
2457 {
2458 output[3] = ppi_code >> 8;
2459 output[2] = ppi_code;
2460 }
2461 else
2462 {
2463 output[2] = ppi_code >> 8;
2464 output[3] = ppi_code;
2465 }
2466 move_code |= 0xf800;
2467 }
2468 else
2469 {
2470 /* Just a double data transfer. */
2471 output = frag_more (2);
2472 size = 2;
2473 }
2474 if (! target_big_endian)
2475 {
2476 output[1] = move_code >> 8;
2477 output[0] = move_code;
2478 }
2479 else
2480 {
2481 output[0] = move_code >> 8;
2482 output[1] = move_code;
2483 }
2484 return size;
2485 }
2486
2487 /* This is the guts of the machine-dependent assembler. STR points to a
2488 machine dependent instruction. This function is supposed to emit
2489 the frags/bytes it assembles to. */
2490
2491 void
md_assemble(char * str)2492 md_assemble (char *str)
2493 {
2494 char *op_end;
2495 sh_operand_info operand[3];
2496 sh_opcode_info *opcode;
2497 unsigned int size = 0;
2498 char *initial_str = str;
2499
2500 opcode = find_cooked_opcode (&str);
2501 op_end = str;
2502
2503 if (opcode == NULL)
2504 {
2505 /* The opcode is not in the hash table.
2506 This means we definitely have an assembly failure,
2507 but the instruction may be valid in another CPU variant.
2508 In this case emit something better than 'unknown opcode'.
2509 Search the full table in sh-opc.h to check. */
2510
2511 char *name = initial_str;
2512 int name_length = 0;
2513 const sh_opcode_info *op;
2514 bool found = false;
2515
2516 /* Identify opcode in string. */
2517 while (ISSPACE (*name))
2518 name++;
2519
2520 while (name[name_length] != '\0' && !ISSPACE (name[name_length]))
2521 name_length++;
2522
2523 /* Search for opcode in full list. */
2524 for (op = sh_table; op->name; op++)
2525 {
2526 if (strncasecmp (op->name, name, name_length) == 0
2527 && op->name[name_length] == '\0')
2528 {
2529 found = true;
2530 break;
2531 }
2532 }
2533
2534 if (found)
2535 as_bad (_("opcode not valid for this cpu variant"));
2536 else
2537 as_bad (_("unknown opcode"));
2538
2539 return;
2540 }
2541
2542 if (sh_relax
2543 && ! seg_info (now_seg)->tc_segment_info_data.in_code)
2544 {
2545 /* Output a CODE reloc to tell the linker that the following
2546 bytes are instructions, not data. */
2547 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2548 BFD_RELOC_SH_CODE);
2549 seg_info (now_seg)->tc_segment_info_data.in_code = 1;
2550 }
2551
2552 if (opcode->nibbles[0] == PPI)
2553 {
2554 size = assemble_ppi (op_end, opcode);
2555 }
2556 else
2557 {
2558 if (opcode->arg[0] == A_BDISP12
2559 || opcode->arg[0] == A_BDISP8)
2560 {
2561 /* Since we skip get_specific here, we have to check & update
2562 valid_arch now. */
2563 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch))
2564 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch);
2565 else
2566 as_bad (_("Delayed branches not available on SH1"));
2567 parse_exp (op_end + 1, &operand[0]);
2568 build_relax (opcode, &operand[0]);
2569
2570 /* All branches are currently 16 bit. */
2571 size = 2;
2572 }
2573 else
2574 {
2575 if (opcode->arg[0] == A_END)
2576 {
2577 /* Ignore trailing whitespace. If there is any, it has already
2578 been compressed to a single space. */
2579 if (*op_end == ' ')
2580 op_end++;
2581 }
2582 else
2583 {
2584 op_end = get_operands (opcode, op_end, operand);
2585 }
2586 opcode = get_specific (opcode, operand);
2587
2588 if (opcode == 0)
2589 {
2590 /* Couldn't find an opcode which matched the operands. */
2591 char *where = frag_more (2);
2592 size = 2;
2593
2594 where[0] = 0x0;
2595 where[1] = 0x0;
2596 as_bad (_("invalid operands for opcode"));
2597 }
2598 else
2599 {
2600 if (*op_end)
2601 as_bad (_("excess operands: '%s'"), op_end);
2602
2603 size = build_Mytes (opcode, operand);
2604 }
2605 }
2606 }
2607
2608 dwarf2_emit_insn (size);
2609 }
2610
2611 /* This routine is called each time a label definition is seen. It
2612 emits a BFD_RELOC_SH_LABEL reloc if necessary. */
2613
2614 void
sh_frob_label(symbolS * sym)2615 sh_frob_label (symbolS *sym)
2616 {
2617 static fragS *last_label_frag;
2618 static int last_label_offset;
2619
2620 if (sh_relax
2621 && seg_info (now_seg)->tc_segment_info_data.in_code)
2622 {
2623 int offset;
2624
2625 offset = frag_now_fix ();
2626 if (frag_now != last_label_frag
2627 || offset != last_label_offset)
2628 {
2629 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL);
2630 last_label_frag = frag_now;
2631 last_label_offset = offset;
2632 }
2633 }
2634
2635 dwarf2_emit_label (sym);
2636 }
2637
2638 /* This routine is called when the assembler is about to output some
2639 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */
2640
2641 void
sh_flush_pending_output(void)2642 sh_flush_pending_output (void)
2643 {
2644 if (sh_relax
2645 && seg_info (now_seg)->tc_segment_info_data.in_code)
2646 {
2647 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0,
2648 BFD_RELOC_SH_DATA);
2649 seg_info (now_seg)->tc_segment_info_data.in_code = 0;
2650 }
2651 }
2652
2653 symbolS *
md_undefined_symbol(char * name ATTRIBUTE_UNUSED)2654 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
2655 {
2656 return 0;
2657 }
2658
2659 /* Various routines to kill one day. */
2660
2661 const char *
md_atof(int type,char * litP,int * sizeP)2662 md_atof (int type, char *litP, int *sizeP)
2663 {
2664 return ieee_md_atof (type, litP, sizeP, target_big_endian);
2665 }
2666
2667 /* Handle the .uses pseudo-op. This pseudo-op is used just before a
2668 call instruction. It refers to a label of the instruction which
2669 loads the register which the call uses. We use it to generate a
2670 special reloc for the linker. */
2671
2672 static void
s_uses(int ignore ATTRIBUTE_UNUSED)2673 s_uses (int ignore ATTRIBUTE_UNUSED)
2674 {
2675 expressionS ex;
2676
2677 if (! sh_relax)
2678 as_warn (_(".uses pseudo-op seen when not relaxing"));
2679
2680 expression (&ex);
2681
2682 if (ex.X_op != O_symbol || ex.X_add_number != 0)
2683 {
2684 as_bad (_("bad .uses format"));
2685 ignore_rest_of_line ();
2686 return;
2687 }
2688
2689 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES);
2690
2691 demand_empty_rest_of_line ();
2692 }
2693
2694 enum options
2695 {
2696 OPTION_RELAX = OPTION_MD_BASE,
2697 OPTION_BIG,
2698 OPTION_LITTLE,
2699 OPTION_SMALL,
2700 OPTION_DSP,
2701 OPTION_ISA,
2702 OPTION_RENESAS,
2703 OPTION_ALLOW_REG_PREFIX,
2704 OPTION_H_TICK_HEX,
2705 #ifdef OBJ_ELF
2706 OPTION_FDPIC,
2707 #endif
2708 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */
2709 };
2710
2711 const char *md_shortopts = "";
2712 struct option md_longopts[] =
2713 {
2714 {"relax", no_argument, NULL, OPTION_RELAX},
2715 {"big", no_argument, NULL, OPTION_BIG},
2716 {"little", no_argument, NULL, OPTION_LITTLE},
2717 /* The next two switches are here because the
2718 generic parts of the linker testsuite uses them. */
2719 {"EB", no_argument, NULL, OPTION_BIG},
2720 {"EL", no_argument, NULL, OPTION_LITTLE},
2721 {"small", no_argument, NULL, OPTION_SMALL},
2722 {"dsp", no_argument, NULL, OPTION_DSP},
2723 {"isa", required_argument, NULL, OPTION_ISA},
2724 {"renesas", no_argument, NULL, OPTION_RENESAS},
2725 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX},
2726
2727 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX },
2728
2729 #ifdef OBJ_ELF
2730 {"fdpic", no_argument, NULL, OPTION_FDPIC},
2731 #endif
2732
2733 {NULL, no_argument, NULL, 0}
2734 };
2735 size_t md_longopts_size = sizeof (md_longopts);
2736
2737 int
md_parse_option(int c,const char * arg ATTRIBUTE_UNUSED)2738 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
2739 {
2740 switch (c)
2741 {
2742 case OPTION_RELAX:
2743 sh_relax = 1;
2744 break;
2745
2746 case OPTION_BIG:
2747 target_big_endian = 1;
2748 break;
2749
2750 case OPTION_LITTLE:
2751 target_big_endian = 0;
2752 break;
2753
2754 case OPTION_SMALL:
2755 sh_small = 1;
2756 break;
2757
2758 case OPTION_DSP:
2759 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
2760 break;
2761
2762 case OPTION_RENESAS:
2763 dont_adjust_reloc_32 = 1;
2764 break;
2765
2766 case OPTION_ALLOW_REG_PREFIX:
2767 allow_dollar_register_prefix = 1;
2768 break;
2769
2770 case OPTION_ISA:
2771 if (strcasecmp (arg, "dsp") == 0)
2772 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu);
2773 else if (strcasecmp (arg, "fp") == 0)
2774 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp;
2775 else if (strcasecmp (arg, "any") == 0)
2776 preset_target_arch = arch_sh_up;
2777 else
2778 {
2779 extern const bfd_arch_info_type bfd_sh_arch;
2780 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
2781
2782 preset_target_arch = 0;
2783 for (; bfd_arch; bfd_arch=bfd_arch->next)
2784 {
2785 int len = strlen(bfd_arch->printable_name);
2786
2787 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0)
2788 continue;
2789
2790 if (arg[len] == '\0')
2791 preset_target_arch =
2792 sh_get_arch_from_bfd_mach (bfd_arch->mach);
2793 else if (strcasecmp(&arg[len], "-up") == 0)
2794 preset_target_arch =
2795 sh_get_arch_up_from_bfd_mach (bfd_arch->mach);
2796 else
2797 continue;
2798 break;
2799 }
2800
2801 if (!preset_target_arch)
2802 as_bad (_("Invalid argument to --isa option: %s"), arg);
2803 }
2804 break;
2805
2806 case OPTION_H_TICK_HEX:
2807 enable_h_tick_hex = 1;
2808 break;
2809
2810 #ifdef OBJ_ELF
2811 case OPTION_FDPIC:
2812 sh_fdpic = true;
2813 break;
2814 #endif /* OBJ_ELF */
2815
2816 default:
2817 return 0;
2818 }
2819
2820 return 1;
2821 }
2822
2823 void
md_show_usage(FILE * stream)2824 md_show_usage (FILE *stream)
2825 {
2826 fprintf (stream, _("\
2827 SH options:\n\
2828 --little generate little endian code\n\
2829 --big generate big endian code\n\
2830 --relax alter jump instructions for long displacements\n\
2831 --renesas disable optimization with section symbol for\n\
2832 compatibility with Renesas assembler.\n\
2833 --small align sections to 4 byte boundaries, not 16\n\
2834 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
2835 --allow-reg-prefix allow '$' as a register name prefix.\n\
2836 --isa=[any use most appropriate isa\n\
2837 | dsp same as '-dsp'\n\
2838 | fp"));
2839 {
2840 extern const bfd_arch_info_type bfd_sh_arch;
2841 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch;
2842
2843 for (; bfd_arch; bfd_arch=bfd_arch->next)
2844 {
2845 fprintf (stream, "\n | %s", bfd_arch->printable_name);
2846 fprintf (stream, "\n | %s-up", bfd_arch->printable_name);
2847 }
2848 }
2849 fprintf (stream, "]\n");
2850 #ifdef OBJ_ELF
2851 fprintf (stream, _("\
2852 --fdpic generate an FDPIC object file\n"));
2853 #endif /* OBJ_ELF */
2854 }
2855
2856 /* This struct is used to pass arguments to sh_count_relocs through
2857 bfd_map_over_sections. */
2858
2859 struct sh_count_relocs
2860 {
2861 /* Symbol we are looking for. */
2862 symbolS *sym;
2863 /* Count of relocs found. */
2864 int count;
2865 };
2866
2867 /* Count the number of fixups in a section which refer to a particular
2868 symbol. This is called via bfd_map_over_sections. */
2869
2870 static void
sh_count_relocs(bfd * abfd ATTRIBUTE_UNUSED,segT sec,void * data)2871 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data)
2872 {
2873 struct sh_count_relocs *info = (struct sh_count_relocs *) data;
2874 segment_info_type *seginfo;
2875 symbolS *sym;
2876 fixS *fix;
2877
2878 seginfo = seg_info (sec);
2879 if (seginfo == NULL)
2880 return;
2881
2882 sym = info->sym;
2883 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2884 {
2885 if (fix->fx_addsy == sym)
2886 {
2887 ++info->count;
2888 fix->fx_tcbit = 1;
2889 }
2890 }
2891 }
2892
2893 /* Handle the count relocs for a particular section.
2894 This is called via bfd_map_over_sections. */
2895
2896 static void
sh_frob_section(bfd * abfd ATTRIBUTE_UNUSED,segT sec,void * ignore ATTRIBUTE_UNUSED)2897 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec,
2898 void *ignore ATTRIBUTE_UNUSED)
2899 {
2900 segment_info_type *seginfo;
2901 fixS *fix;
2902
2903 seginfo = seg_info (sec);
2904 if (seginfo == NULL)
2905 return;
2906
2907 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next)
2908 {
2909 symbolS *sym;
2910 bfd_vma val;
2911 fixS *fscan;
2912 struct sh_count_relocs info;
2913
2914 if (fix->fx_r_type != BFD_RELOC_SH_USES)
2915 continue;
2916
2917 /* The BFD_RELOC_SH_USES reloc should refer to a defined local
2918 symbol in the same section. */
2919 sym = fix->fx_addsy;
2920 if (sym == NULL
2921 || fix->fx_subsy != NULL
2922 || fix->fx_addnumber != 0
2923 || S_GET_SEGMENT (sym) != sec
2924 || S_IS_EXTERNAL (sym))
2925 {
2926 as_warn_where (fix->fx_file, fix->fx_line,
2927 _(".uses does not refer to a local symbol in the same section"));
2928 continue;
2929 }
2930
2931 /* Look through the fixups again, this time looking for one
2932 at the same location as sym. */
2933 val = S_GET_VALUE (sym);
2934 for (fscan = seginfo->fix_root;
2935 fscan != NULL;
2936 fscan = fscan->fx_next)
2937 if (val == fscan->fx_frag->fr_address + fscan->fx_where
2938 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN
2939 && fscan->fx_r_type != BFD_RELOC_SH_CODE
2940 && fscan->fx_r_type != BFD_RELOC_SH_DATA
2941 && fscan->fx_r_type != BFD_RELOC_SH_LABEL)
2942 break;
2943 if (fscan == NULL)
2944 {
2945 as_warn_where (fix->fx_file, fix->fx_line,
2946 _("can't find fixup pointed to by .uses"));
2947 continue;
2948 }
2949
2950 if (fscan->fx_tcbit)
2951 {
2952 /* We've already done this one. */
2953 continue;
2954 }
2955
2956 /* The variable fscan should also be a fixup to a local symbol
2957 in the same section. */
2958 sym = fscan->fx_addsy;
2959 if (sym == NULL
2960 || fscan->fx_subsy != NULL
2961 || fscan->fx_addnumber != 0
2962 || S_GET_SEGMENT (sym) != sec
2963 || S_IS_EXTERNAL (sym))
2964 {
2965 as_warn_where (fix->fx_file, fix->fx_line,
2966 _(".uses target does not refer to a local symbol in the same section"));
2967 continue;
2968 }
2969
2970 /* Now we look through all the fixups of all the sections,
2971 counting the number of times we find a reference to sym. */
2972 info.sym = sym;
2973 info.count = 0;
2974 bfd_map_over_sections (stdoutput, sh_count_relocs, &info);
2975
2976 if (info.count < 1)
2977 abort ();
2978
2979 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym.
2980 We have already adjusted the value of sym to include the
2981 fragment address, so we undo that adjustment here. */
2982 subseg_change (sec, 0);
2983 fix_new (fscan->fx_frag,
2984 S_GET_VALUE (sym) - fscan->fx_frag->fr_address,
2985 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT);
2986 }
2987 }
2988
2989 /* This function is called after the symbol table has been completed,
2990 but before the relocs or section contents have been written out.
2991 If we have seen any .uses pseudo-ops, they point to an instruction
2992 which loads a register with the address of a function. We look
2993 through the fixups to find where the function address is being
2994 loaded from. We then generate a COUNT reloc giving the number of
2995 times that function address is referred to. The linker uses this
2996 information when doing relaxing, to decide when it can eliminate
2997 the stored function address entirely. */
2998
2999 void
sh_frob_file(void)3000 sh_frob_file (void)
3001 {
3002 if (! sh_relax)
3003 return;
3004
3005 bfd_map_over_sections (stdoutput, sh_frob_section, NULL);
3006 }
3007
3008 /* Called after relaxing. Set the correct sizes of the fragments, and
3009 create relocs so that md_apply_fix will fill in the correct values. */
3010
3011 void
md_convert_frag(bfd * headers ATTRIBUTE_UNUSED,segT seg,fragS * fragP)3012 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP)
3013 {
3014 int donerelax = 0;
3015
3016 switch (fragP->fr_subtype)
3017 {
3018 case C (COND_JUMP, COND8):
3019 case C (COND_JUMP_DELAY, COND8):
3020 subseg_change (seg, 0);
3021 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
3022 1, BFD_RELOC_SH_PCDISP8BY2);
3023 fragP->fr_fix += 2;
3024 fragP->fr_var = 0;
3025 break;
3026
3027 case C (UNCOND_JUMP, UNCOND12):
3028 subseg_change (seg, 0);
3029 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
3030 1, BFD_RELOC_SH_PCDISP12BY2);
3031 fragP->fr_fix += 2;
3032 fragP->fr_var = 0;
3033 break;
3034
3035 case C (UNCOND_JUMP, UNCOND32):
3036 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3037 if (fragP->fr_symbol == NULL)
3038 as_bad_where (fragP->fr_file, fragP->fr_line,
3039 _("displacement overflows 12-bit field"));
3040 else if (S_IS_DEFINED (fragP->fr_symbol))
3041 as_bad_where (fragP->fr_file, fragP->fr_line,
3042 _("displacement to defined symbol %s overflows 12-bit field"),
3043 S_GET_NAME (fragP->fr_symbol));
3044 else
3045 as_bad_where (fragP->fr_file, fragP->fr_line,
3046 _("displacement to undefined symbol %s overflows 12-bit field"),
3047 S_GET_NAME (fragP->fr_symbol));
3048 /* Stabilize this frag, so we don't trip an assert. */
3049 fragP->fr_fix += fragP->fr_var;
3050 fragP->fr_var = 0;
3051 break;
3052
3053 case C (COND_JUMP, COND12):
3054 case C (COND_JUMP_DELAY, COND12):
3055 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */
3056 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c
3057 was due to gas incorrectly relaxing an out-of-range conditional
3058 branch with delay slot. It turned:
3059 bf.s L6 (slot mov.l r12,@(44,r0))
3060 into:
3061
3062 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6)
3063 30: 00 09 nop
3064 32: 10 cb mov.l r12,@(44,r0)
3065 Therefore, branches with delay slots have to be handled
3066 differently from ones without delay slots. */
3067 {
3068 unsigned char *buffer =
3069 (unsigned char *) (fragP->fr_fix + &fragP->fr_literal[0]);
3070 int highbyte = target_big_endian ? 0 : 1;
3071 int lowbyte = target_big_endian ? 1 : 0;
3072 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12);
3073
3074 /* Toggle the true/false bit of the bcond. */
3075 buffer[highbyte] ^= 0x2;
3076
3077 /* If this is a delayed branch, we may not put the bra in the
3078 slot. So we change it to a non-delayed branch, like that:
3079 b! cond slot_label; bra disp; slot_label: slot_insn
3080 ??? We should try if swapping the conditional branch and
3081 its delay-slot insn already makes the branch reach. */
3082
3083 /* Build a relocation to six / four bytes farther on. */
3084 subseg_change (seg, 0);
3085 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg),
3086 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6),
3087 1, BFD_RELOC_SH_PCDISP8BY2);
3088
3089 /* Set up a jump instruction. */
3090 buffer[highbyte + 2] = 0xa0;
3091 buffer[lowbyte + 2] = 0;
3092 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
3093 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2);
3094
3095 if (delay)
3096 {
3097 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */
3098 fragP->fr_fix += 4;
3099 }
3100 else
3101 {
3102 /* Fill in a NOP instruction. */
3103 buffer[highbyte + 4] = 0x0;
3104 buffer[lowbyte + 4] = 0x9;
3105
3106 fragP->fr_fix += 6;
3107 }
3108 fragP->fr_var = 0;
3109 donerelax = 1;
3110 }
3111 break;
3112
3113 case C (COND_JUMP, COND32):
3114 case C (COND_JUMP_DELAY, COND32):
3115 case C (COND_JUMP, UNDEF_WORD_DISP):
3116 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3117 if (fragP->fr_symbol == NULL)
3118 as_bad_where (fragP->fr_file, fragP->fr_line,
3119 _("displacement overflows 8-bit field"));
3120 else if (S_IS_DEFINED (fragP->fr_symbol))
3121 as_bad_where (fragP->fr_file, fragP->fr_line,
3122 _("displacement to defined symbol %s overflows 8-bit field"),
3123 S_GET_NAME (fragP->fr_symbol));
3124 else
3125 as_bad_where (fragP->fr_file, fragP->fr_line,
3126 _("displacement to undefined symbol %s overflows 8-bit field "),
3127 S_GET_NAME (fragP->fr_symbol));
3128 /* Stabilize this frag, so we don't trip an assert. */
3129 fragP->fr_fix += fragP->fr_var;
3130 fragP->fr_var = 0;
3131 break;
3132
3133 default:
3134 abort ();
3135 }
3136
3137 if (donerelax && !sh_relax)
3138 as_warn_where (fragP->fr_file, fragP->fr_line,
3139 _("overflow in branch to %s; converted into longer instruction sequence"),
3140 (fragP->fr_symbol != NULL
3141 ? S_GET_NAME (fragP->fr_symbol)
3142 : ""));
3143 }
3144
3145 valueT
md_section_align(segT seg ATTRIBUTE_UNUSED,valueT size)3146 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size)
3147 {
3148 #ifdef OBJ_ELF
3149 return size;
3150 #else /* ! OBJ_ELF */
3151 return ((size + (1 << bfd_section_alignment (seg)) - 1)
3152 & -(1 << bfd_section_alignment (seg)));
3153 #endif /* ! OBJ_ELF */
3154 }
3155
3156 /* This static variable is set by s_uacons to tell sh_cons_align that
3157 the expression does not need to be aligned. */
3158
3159 static int sh_no_align_cons = 0;
3160
3161 /* This handles the unaligned space allocation pseudo-ops, such as
3162 .uaword. .uaword is just like .word, but the value does not need
3163 to be aligned. */
3164
3165 static void
s_uacons(int bytes)3166 s_uacons (int bytes)
3167 {
3168 /* Tell sh_cons_align not to align this value. */
3169 sh_no_align_cons = 1;
3170 cons (bytes);
3171 }
3172
3173 /* If a .word, et. al., pseud-op is seen, warn if the value is not
3174 aligned correctly. Note that this can cause warnings to be issued
3175 when assembling initialized structured which were declared with the
3176 packed attribute. FIXME: Perhaps we should require an option to
3177 enable this warning? */
3178
3179 void
sh_cons_align(int nbytes)3180 sh_cons_align (int nbytes)
3181 {
3182 int nalign;
3183
3184 if (sh_no_align_cons)
3185 {
3186 /* This is an unaligned pseudo-op. */
3187 sh_no_align_cons = 0;
3188 return;
3189 }
3190
3191 nalign = 0;
3192 while ((nbytes & 1) == 0)
3193 {
3194 ++nalign;
3195 nbytes >>= 1;
3196 }
3197
3198 if (nalign == 0)
3199 return;
3200
3201 if (now_seg == absolute_section)
3202 {
3203 if ((abs_section_offset & ((1 << nalign) - 1)) != 0)
3204 as_warn (_("misaligned data"));
3205 return;
3206 }
3207
3208 frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
3209 (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
3210
3211 record_alignment (now_seg, nalign);
3212 }
3213
3214 /* When relaxing, we need to output a reloc for any .align directive
3215 that requests alignment to a four byte boundary or larger. This is
3216 also where we check for misaligned data. */
3217
3218 void
sh_handle_align(fragS * frag)3219 sh_handle_align (fragS *frag)
3220 {
3221 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix;
3222
3223 if (frag->fr_type == rs_align_code)
3224 {
3225 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 };
3226 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 };
3227
3228 char *p = frag->fr_literal + frag->fr_fix;
3229
3230 if (bytes & 1)
3231 {
3232 *p++ = 0;
3233 bytes--;
3234 frag->fr_fix += 1;
3235 }
3236
3237 if (target_big_endian)
3238 {
3239 memcpy (p, big_nop_pattern, sizeof big_nop_pattern);
3240 frag->fr_var = sizeof big_nop_pattern;
3241 }
3242 else
3243 {
3244 memcpy (p, little_nop_pattern, sizeof little_nop_pattern);
3245 frag->fr_var = sizeof little_nop_pattern;
3246 }
3247 }
3248 else if (frag->fr_type == rs_align_test)
3249 {
3250 if (bytes != 0)
3251 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data"));
3252 }
3253
3254 if (sh_relax
3255 && (frag->fr_type == rs_align
3256 || frag->fr_type == rs_align_code)
3257 && frag->fr_address + frag->fr_fix > 0
3258 && frag->fr_offset > 1
3259 && now_seg != bss_section)
3260 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0,
3261 BFD_RELOC_SH_ALIGN);
3262 }
3263
3264 /* See whether the relocation should be resolved locally. */
3265
3266 static bool
sh_local_pcrel(fixS * fix)3267 sh_local_pcrel (fixS *fix)
3268 {
3269 return (! sh_relax
3270 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2
3271 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2
3272 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2
3273 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4
3274 || fix->fx_r_type == BFD_RELOC_8_PCREL
3275 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16
3276 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32));
3277 }
3278
3279 /* See whether we need to force a relocation into the output file.
3280 This is used to force out switch and PC relative relocations when
3281 relaxing. */
3282
3283 int
sh_force_relocation(fixS * fix)3284 sh_force_relocation (fixS *fix)
3285 {
3286 /* These relocations can't make it into a DSO, so no use forcing
3287 them for global symbols. */
3288 if (sh_local_pcrel (fix))
3289 return 0;
3290
3291 /* Make sure some relocations get emitted. */
3292 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START
3293 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END
3294 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32
3295 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32
3296 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32
3297 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32
3298 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32
3299 || generic_force_reloc (fix))
3300 return 1;
3301
3302 if (! sh_relax)
3303 return 0;
3304
3305 return (fix->fx_pcrel
3306 || SWITCH_TABLE (fix)
3307 || fix->fx_r_type == BFD_RELOC_SH_COUNT
3308 || fix->fx_r_type == BFD_RELOC_SH_ALIGN
3309 || fix->fx_r_type == BFD_RELOC_SH_CODE
3310 || fix->fx_r_type == BFD_RELOC_SH_DATA
3311 || fix->fx_r_type == BFD_RELOC_SH_LABEL);
3312 }
3313
3314 #ifdef OBJ_ELF
3315 bool
sh_fix_adjustable(fixS * fixP)3316 sh_fix_adjustable (fixS *fixP)
3317 {
3318 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
3319 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
3320 || fixP->fx_r_type == BFD_RELOC_SH_GOT20
3321 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC
3322 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC
3323 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20
3324 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC
3325 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20
3326 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC
3327 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32)
3328 || fixP->fx_r_type == BFD_RELOC_RVA)
3329 return 0;
3330
3331 /* We need the symbol name for the VTABLE entries */
3332 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3333 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3334 return 0;
3335
3336 return 1;
3337 }
3338
3339 void
sh_elf_final_processing(void)3340 sh_elf_final_processing (void)
3341 {
3342 int val;
3343
3344 /* Set file-specific flags to indicate if this code needs
3345 a processor with the sh-dsp / sh2e ISA to execute. */
3346 val = sh_find_elf_flags (valid_arch);
3347
3348 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK;
3349 elf_elfheader (stdoutput)->e_flags |= val;
3350
3351 if (sh_fdpic)
3352 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC;
3353 }
3354 #endif
3355
3356 #ifdef TE_UCLINUX
3357 /* Return the target format for uClinux. */
3358
3359 const char *
sh_uclinux_target_format(void)3360 sh_uclinux_target_format (void)
3361 {
3362 if (sh_fdpic)
3363 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic");
3364 else
3365 return (!target_big_endian ? "elf32-shl" : "elf32-sh");
3366 }
3367 #endif
3368
3369 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its
3370 assembly-time value. If we're generating a reloc for FIXP,
3371 see whether the addend should be stored in-place or whether
3372 it should be in an ELF r_addend field. */
3373
3374 static void
apply_full_field_fix(fixS * fixP,char * buf,bfd_vma val,int size)3375 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size)
3376 {
3377 reloc_howto_type *howto;
3378
3379 if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
3380 {
3381 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
3382 if (howto && !howto->partial_inplace)
3383 {
3384 fixP->fx_addnumber = val;
3385 return;
3386 }
3387 }
3388 md_number_to_chars (buf, val, size);
3389 }
3390
3391 /* Apply a fixup to the object file. */
3392
3393 void
md_apply_fix(fixS * fixP,valueT * valP,segT seg ATTRIBUTE_UNUSED)3394 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
3395 {
3396 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3397 int lowbyte = target_big_endian ? 1 : 0;
3398 int highbyte = target_big_endian ? 0 : 1;
3399 long val = (long) *valP;
3400 long max, min;
3401 int shift;
3402
3403 /* A difference between two symbols, the second of which is in the
3404 current section, is transformed in a PC-relative relocation to
3405 the other symbol. We have to adjust the relocation type here. */
3406 if (fixP->fx_pcrel)
3407 {
3408 switch (fixP->fx_r_type)
3409 {
3410 default:
3411 break;
3412
3413 case BFD_RELOC_32:
3414 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3415 break;
3416
3417 /* Currently, we only support 32-bit PCREL relocations.
3418 We'd need a new reloc type to handle 16_PCREL, and
3419 8_PCREL is already taken for R_SH_SWITCH8, which
3420 apparently does something completely different than what
3421 we need. FIXME. */
3422 case BFD_RELOC_16:
3423 bfd_set_error (bfd_error_bad_value);
3424 return;
3425
3426 case BFD_RELOC_8:
3427 bfd_set_error (bfd_error_bad_value);
3428 return;
3429 }
3430 }
3431
3432 /* The function adjust_reloc_syms won't convert a reloc against a weak
3433 symbol into a reloc against a section, but bfd_install_relocation
3434 will screw up if the symbol is defined, so we have to adjust val here
3435 to avoid the screw up later.
3436
3437 For ordinary relocs, this does not happen for ELF, since for ELF,
3438 bfd_install_relocation uses the "special function" field of the
3439 howto, and does not execute the code that needs to be undone, as long
3440 as the special function does not return bfd_reloc_continue.
3441 It can happen for GOT- and PLT-type relocs the way they are
3442 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it
3443 doesn't matter here since those relocs don't use VAL; see below. */
3444 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
3445 && fixP->fx_addsy != NULL
3446 && S_IS_WEAK (fixP->fx_addsy))
3447 val -= S_GET_VALUE (fixP->fx_addsy);
3448
3449 if (SWITCH_TABLE (fixP))
3450 val -= S_GET_VALUE (fixP->fx_subsy);
3451
3452 max = min = 0;
3453 shift = 0;
3454 switch (fixP->fx_r_type)
3455 {
3456 case BFD_RELOC_SH_IMM3:
3457 max = 0x7;
3458 * buf = (* buf & 0xf8) | (val & 0x7);
3459 break;
3460 case BFD_RELOC_SH_IMM3U:
3461 max = 0x7;
3462 * buf = (* buf & 0x8f) | ((val & 0x7) << 4);
3463 break;
3464 case BFD_RELOC_SH_DISP12:
3465 max = 0xfff;
3466 buf[lowbyte] = val & 0xff;
3467 buf[highbyte] |= (val >> 8) & 0x0f;
3468 break;
3469 case BFD_RELOC_SH_DISP12BY2:
3470 max = 0xfff;
3471 shift = 1;
3472 buf[lowbyte] = (val >> 1) & 0xff;
3473 buf[highbyte] |= (val >> 9) & 0x0f;
3474 break;
3475 case BFD_RELOC_SH_DISP12BY4:
3476 max = 0xfff;
3477 shift = 2;
3478 buf[lowbyte] = (val >> 2) & 0xff;
3479 buf[highbyte] |= (val >> 10) & 0x0f;
3480 break;
3481 case BFD_RELOC_SH_DISP12BY8:
3482 max = 0xfff;
3483 shift = 3;
3484 buf[lowbyte] = (val >> 3) & 0xff;
3485 buf[highbyte] |= (val >> 11) & 0x0f;
3486 break;
3487 case BFD_RELOC_SH_DISP20:
3488 if (! target_big_endian)
3489 abort();
3490 max = 0x7ffff;
3491 min = -0x80000;
3492 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0);
3493 buf[2] = (val >> 8) & 0xff;
3494 buf[3] = val & 0xff;
3495 break;
3496 case BFD_RELOC_SH_DISP20BY8:
3497 if (!target_big_endian)
3498 abort();
3499 max = 0x7ffff;
3500 min = -0x80000;
3501 shift = 8;
3502 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0);
3503 buf[2] = (val >> 16) & 0xff;
3504 buf[3] = (val >> 8) & 0xff;
3505 break;
3506
3507 case BFD_RELOC_SH_IMM4:
3508 max = 0xf;
3509 *buf = (*buf & 0xf0) | (val & 0xf);
3510 break;
3511
3512 case BFD_RELOC_SH_IMM4BY2:
3513 max = 0xf;
3514 shift = 1;
3515 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf);
3516 break;
3517
3518 case BFD_RELOC_SH_IMM4BY4:
3519 max = 0xf;
3520 shift = 2;
3521 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf);
3522 break;
3523
3524 case BFD_RELOC_SH_IMM8BY2:
3525 max = 0xff;
3526 shift = 1;
3527 *buf = val >> 1;
3528 break;
3529
3530 case BFD_RELOC_SH_IMM8BY4:
3531 max = 0xff;
3532 shift = 2;
3533 *buf = val >> 2;
3534 break;
3535
3536 case BFD_RELOC_8:
3537 case BFD_RELOC_SH_IMM8:
3538 /* Sometimes the 8 bit value is sign extended (e.g., add) and
3539 sometimes it is not (e.g., and). We permit any 8 bit value.
3540 Note that adding further restrictions may invalidate
3541 reasonable looking assembly code, such as ``and -0x1,r0''. */
3542 max = 0xff;
3543 min = -0xff;
3544 *buf++ = val;
3545 break;
3546
3547 case BFD_RELOC_SH_PCRELIMM8BY4:
3548 /* If we are dealing with a known destination ... */
3549 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy))
3550 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy)))
3551 {
3552 /* Don't silently move the destination due to misalignment.
3553 The absolute address is the fragment base plus the offset into
3554 the fragment plus the pc relative offset to the label. */
3555 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3)
3556 as_bad_where (fixP->fx_file, fixP->fx_line,
3557 _("offset to unaligned destination"));
3558
3559 /* The displacement cannot be zero or backward even if aligned.
3560 Allow -2 because val has already been adjusted somewhere. */
3561 if (val < -2)
3562 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset"));
3563 }
3564
3565 /* The lower two bits of the PC are cleared before the
3566 displacement is added in. We can assume that the destination
3567 is on a 4 byte boundary. If this instruction is also on a 4
3568 byte boundary, then we want
3569 (target - here) / 4
3570 and target - here is a multiple of 4.
3571 Otherwise, we are on a 2 byte boundary, and we want
3572 (target - (here - 2)) / 4
3573 and target - here is not a multiple of 4. Computing
3574 (target - (here - 2)) / 4 == (target - here + 2) / 4
3575 works for both cases, since in the first case the addition of
3576 2 will be removed by the division. target - here is in the
3577 variable val. */
3578 val = (val + 2) / 4;
3579 if (val & ~0xff)
3580 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3581 buf[lowbyte] = val;
3582 break;
3583
3584 case BFD_RELOC_SH_PCRELIMM8BY2:
3585 val /= 2;
3586 if (val & ~0xff)
3587 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3588 buf[lowbyte] = val;
3589 break;
3590
3591 case BFD_RELOC_SH_PCDISP8BY2:
3592 val /= 2;
3593 if (val < -0x80 || val > 0x7f)
3594 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3595 buf[lowbyte] = val;
3596 break;
3597
3598 case BFD_RELOC_SH_PCDISP12BY2:
3599 val /= 2;
3600 if (val < -0x800 || val > 0x7ff)
3601 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
3602 buf[lowbyte] = val & 0xff;
3603 buf[highbyte] |= (val >> 8) & 0xf;
3604 break;
3605
3606 case BFD_RELOC_32:
3607 case BFD_RELOC_32_PCREL:
3608 apply_full_field_fix (fixP, buf, val, 4);
3609 break;
3610
3611 case BFD_RELOC_16:
3612 apply_full_field_fix (fixP, buf, val, 2);
3613 break;
3614
3615 case BFD_RELOC_SH_USES:
3616 /* Pass the value into sh_reloc(). */
3617 fixP->fx_addnumber = val;
3618 break;
3619
3620 case BFD_RELOC_SH_COUNT:
3621 case BFD_RELOC_SH_ALIGN:
3622 case BFD_RELOC_SH_CODE:
3623 case BFD_RELOC_SH_DATA:
3624 case BFD_RELOC_SH_LABEL:
3625 /* Nothing to do here. */
3626 break;
3627
3628 case BFD_RELOC_SH_LOOP_START:
3629 case BFD_RELOC_SH_LOOP_END:
3630
3631 case BFD_RELOC_VTABLE_INHERIT:
3632 case BFD_RELOC_VTABLE_ENTRY:
3633 fixP->fx_done = 0;
3634 return;
3635
3636 #ifdef OBJ_ELF
3637 case BFD_RELOC_32_PLT_PCREL:
3638 /* Make the jump instruction point to the address of the operand. At
3639 runtime we merely add the offset to the actual PLT entry. */
3640 * valP = 0xfffffffc;
3641 val = fixP->fx_offset;
3642 if (fixP->fx_subsy)
3643 val -= S_GET_VALUE (fixP->fx_subsy);
3644 apply_full_field_fix (fixP, buf, val, 4);
3645 break;
3646
3647 case BFD_RELOC_SH_GOTPC:
3648 /* This is tough to explain. We end up with this one if we have
3649 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]".
3650 The goal here is to obtain the absolute address of the GOT,
3651 and it is strongly preferable from a performance point of
3652 view to avoid using a runtime relocation for this. There are
3653 cases where you have something like:
3654
3655 .long _GLOBAL_OFFSET_TABLE_+[.-.L66]
3656
3657 and here no correction would be required. Internally in the
3658 assembler we treat operands of this form as not being pcrel
3659 since the '.' is explicitly mentioned, and I wonder whether
3660 it would simplify matters to do it this way. Who knows. In
3661 earlier versions of the PIC patches, the pcrel_adjust field
3662 was used to store the correction, but since the expression is
3663 not pcrel, I felt it would be confusing to do it this way. */
3664 * valP -= 1;
3665 apply_full_field_fix (fixP, buf, val, 4);
3666 break;
3667
3668 case BFD_RELOC_SH_TLS_GD_32:
3669 case BFD_RELOC_SH_TLS_LD_32:
3670 case BFD_RELOC_SH_TLS_IE_32:
3671 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3672 /* Fallthrough */
3673 case BFD_RELOC_32_GOT_PCREL:
3674 case BFD_RELOC_SH_GOT20:
3675 case BFD_RELOC_SH_GOTPLT32:
3676 case BFD_RELOC_SH_GOTFUNCDESC:
3677 case BFD_RELOC_SH_GOTFUNCDESC20:
3678 case BFD_RELOC_SH_GOTOFFFUNCDESC:
3679 case BFD_RELOC_SH_GOTOFFFUNCDESC20:
3680 case BFD_RELOC_SH_FUNCDESC:
3681 * valP = 0; /* Fully resolved at runtime. No addend. */
3682 apply_full_field_fix (fixP, buf, 0, 4);
3683 break;
3684
3685 case BFD_RELOC_SH_TLS_LDO_32:
3686 case BFD_RELOC_SH_TLS_LE_32:
3687 S_SET_THREAD_LOCAL (fixP->fx_addsy);
3688 /* Fallthrough */
3689 case BFD_RELOC_32_GOTOFF:
3690 case BFD_RELOC_SH_GOTOFF20:
3691 apply_full_field_fix (fixP, buf, val, 4);
3692 break;
3693 #endif
3694
3695 default:
3696 abort ();
3697 }
3698
3699 if (shift != 0)
3700 {
3701 if ((val & ((1 << shift) - 1)) != 0)
3702 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset"));
3703 if (val >= 0)
3704 val >>= shift;
3705 else
3706 val = ((val >> shift)
3707 | ((long) -1 & ~ ((long) -1 >> shift)));
3708 }
3709
3710 /* Extend sign for 64-bit host. */
3711 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
3712 if (max != 0 && (val < min || val > max))
3713 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
3714 else if (max != 0)
3715 /* Stop the generic code from trying to overflow check the value as well.
3716 It may not have the correct value anyway, as we do not store val back
3717 into *valP. */
3718 fixP->fx_no_overflow = 1;
3719
3720 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
3721 fixP->fx_done = 1;
3722 }
3723
3724 /* Called just before address relaxation. Return the length
3725 by which a fragment must grow to reach it's destination. */
3726
3727 int
md_estimate_size_before_relax(fragS * fragP,segT segment_type)3728 md_estimate_size_before_relax (fragS *fragP, segT segment_type)
3729 {
3730 int what;
3731
3732 switch (fragP->fr_subtype)
3733 {
3734 default:
3735 abort ();
3736
3737 case C (UNCOND_JUMP, UNDEF_DISP):
3738 /* Used to be a branch to somewhere which was unknown. */
3739 if (!fragP->fr_symbol)
3740 {
3741 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3742 }
3743 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3744 {
3745 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12);
3746 }
3747 else
3748 {
3749 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP);
3750 }
3751 break;
3752
3753 case C (COND_JUMP, UNDEF_DISP):
3754 case C (COND_JUMP_DELAY, UNDEF_DISP):
3755 what = GET_WHAT (fragP->fr_subtype);
3756 /* Used to be a branch to somewhere which was unknown. */
3757 if (fragP->fr_symbol
3758 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
3759 {
3760 /* Got a symbol and it's defined in this segment, become byte
3761 sized - maybe it will fix up. */
3762 fragP->fr_subtype = C (what, COND8);
3763 }
3764 else if (fragP->fr_symbol)
3765 {
3766 /* It's got a segment, but it's not ours, so it will always be long. */
3767 fragP->fr_subtype = C (what, UNDEF_WORD_DISP);
3768 }
3769 else
3770 {
3771 /* We know the abs value. */
3772 fragP->fr_subtype = C (what, COND8);
3773 }
3774 break;
3775
3776 case C (UNCOND_JUMP, UNCOND12):
3777 case C (UNCOND_JUMP, UNCOND32):
3778 case C (UNCOND_JUMP, UNDEF_WORD_DISP):
3779 case C (COND_JUMP, COND8):
3780 case C (COND_JUMP, COND12):
3781 case C (COND_JUMP, COND32):
3782 case C (COND_JUMP, UNDEF_WORD_DISP):
3783 case C (COND_JUMP_DELAY, COND8):
3784 case C (COND_JUMP_DELAY, COND12):
3785 case C (COND_JUMP_DELAY, COND32):
3786 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP):
3787 /* When relaxing a section for the second time, we don't need to
3788 do anything besides return the current size. */
3789 break;
3790 }
3791
3792 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length;
3793 return fragP->fr_var;
3794 }
3795
3796 /* Put number into target byte order. */
3797
3798 void
md_number_to_chars(char * ptr,valueT use,int nbytes)3799 md_number_to_chars (char *ptr, valueT use, int nbytes)
3800 {
3801 if (! target_big_endian)
3802 number_to_chars_littleendian (ptr, use, nbytes);
3803 else
3804 number_to_chars_bigendian (ptr, use, nbytes);
3805 }
3806
3807 /* This version is used in obj-coff.c eg. for the sh-hms target. */
3808
3809 long
md_pcrel_from(fixS * fixP)3810 md_pcrel_from (fixS *fixP)
3811 {
3812 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2;
3813 }
3814
3815 long
md_pcrel_from_section(fixS * fixP,segT sec)3816 md_pcrel_from_section (fixS *fixP, segT sec)
3817 {
3818 if (! sh_local_pcrel (fixP)
3819 && fixP->fx_addsy != (symbolS *) NULL
3820 && (generic_force_reloc (fixP)
3821 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
3822 {
3823 /* The symbol is undefined (or is defined but not in this section,
3824 or we're not sure about it being the final definition). Let the
3825 linker figure it out. We need to adjust the subtraction of a
3826 symbol to the position of the relocated data, though. */
3827 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0;
3828 }
3829
3830 return md_pcrel_from (fixP);
3831 }
3832
3833 /* Create a reloc. */
3834
3835 arelent *
tc_gen_reloc(asection * section ATTRIBUTE_UNUSED,fixS * fixp)3836 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
3837 {
3838 arelent *rel;
3839 bfd_reloc_code_real_type r_type;
3840
3841 rel = XNEW (arelent);
3842 rel->sym_ptr_ptr = XNEW (asymbol *);
3843 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3844 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
3845
3846 r_type = fixp->fx_r_type;
3847
3848 if (SWITCH_TABLE (fixp))
3849 {
3850 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
3851 rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy);
3852 if (r_type == BFD_RELOC_16)
3853 r_type = BFD_RELOC_SH_SWITCH16;
3854 else if (r_type == BFD_RELOC_8)
3855 r_type = BFD_RELOC_8_PCREL;
3856 else if (r_type == BFD_RELOC_32)
3857 r_type = BFD_RELOC_SH_SWITCH32;
3858 else
3859 abort ();
3860 }
3861 else if (r_type == BFD_RELOC_SH_USES)
3862 rel->addend = fixp->fx_addnumber;
3863 else if (r_type == BFD_RELOC_SH_COUNT)
3864 rel->addend = fixp->fx_offset;
3865 else if (r_type == BFD_RELOC_SH_ALIGN)
3866 rel->addend = fixp->fx_offset;
3867 else if (r_type == BFD_RELOC_VTABLE_INHERIT
3868 || r_type == BFD_RELOC_VTABLE_ENTRY)
3869 rel->addend = fixp->fx_offset;
3870 else if (r_type == BFD_RELOC_SH_LOOP_START
3871 || r_type == BFD_RELOC_SH_LOOP_END)
3872 rel->addend = fixp->fx_offset;
3873 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel)
3874 {
3875 rel->addend = 0;
3876 rel->address = rel->addend = fixp->fx_offset;
3877 }
3878 else
3879 rel->addend = fixp->fx_addnumber;
3880
3881 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
3882
3883 if (rel->howto == NULL)
3884 {
3885 as_bad_where (fixp->fx_file, fixp->fx_line,
3886 _("Cannot represent relocation type %s"),
3887 bfd_get_reloc_code_name (r_type));
3888 /* Set howto to a garbage value so that we can keep going. */
3889 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3890 gas_assert (rel->howto != NULL);
3891 }
3892 #ifdef OBJ_ELF
3893 else if (rel->howto->type == R_SH_IND12W)
3894 rel->addend += fixp->fx_offset - 4;
3895 #endif
3896
3897 return rel;
3898 }
3899
3900 #ifdef OBJ_ELF
3901 inline static char *
sh_end_of_match(char * cont,const char * what)3902 sh_end_of_match (char *cont, const char *what)
3903 {
3904 int len = strlen (what);
3905
3906 if (strncasecmp (cont, what, strlen (what)) == 0
3907 && ! is_part_of_name (cont[len]))
3908 return cont + len;
3909
3910 return NULL;
3911 }
3912
3913 int
sh_parse_name(char const * name,expressionS * exprP,enum expr_mode mode,char * nextcharP)3914 sh_parse_name (char const *name,
3915 expressionS *exprP,
3916 enum expr_mode mode,
3917 char *nextcharP)
3918 {
3919 char *next = input_line_pointer;
3920 char *next_end;
3921 int reloc_type;
3922 segT segment;
3923
3924 exprP->X_op_symbol = NULL;
3925
3926 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
3927 {
3928 if (! GOT_symbol)
3929 GOT_symbol = symbol_find_or_make (name);
3930
3931 exprP->X_add_symbol = GOT_symbol;
3932 no_suffix:
3933 /* If we have an absolute symbol or a reg, then we know its
3934 value now. */
3935 segment = S_GET_SEGMENT (exprP->X_add_symbol);
3936 if (mode != expr_defer && segment == absolute_section)
3937 {
3938 exprP->X_op = O_constant;
3939 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
3940 exprP->X_add_symbol = NULL;
3941 }
3942 else if (mode != expr_defer && segment == reg_section)
3943 {
3944 exprP->X_op = O_register;
3945 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
3946 exprP->X_add_symbol = NULL;
3947 }
3948 else
3949 {
3950 exprP->X_op = O_symbol;
3951 exprP->X_add_number = 0;
3952 }
3953
3954 return 1;
3955 }
3956
3957 exprP->X_add_symbol = symbol_find_or_make (name);
3958
3959 if (*nextcharP != '@')
3960 goto no_suffix;
3961 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF")))
3962 reloc_type = BFD_RELOC_32_GOTOFF;
3963 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT")))
3964 reloc_type = BFD_RELOC_SH_GOTPLT32;
3965 else if ((next_end = sh_end_of_match (next + 1, "GOT")))
3966 reloc_type = BFD_RELOC_32_GOT_PCREL;
3967 else if ((next_end = sh_end_of_match (next + 1, "PLT")))
3968 reloc_type = BFD_RELOC_32_PLT_PCREL;
3969 else if ((next_end = sh_end_of_match (next + 1, "TLSGD")))
3970 reloc_type = BFD_RELOC_SH_TLS_GD_32;
3971 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM")))
3972 reloc_type = BFD_RELOC_SH_TLS_LD_32;
3973 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF")))
3974 reloc_type = BFD_RELOC_SH_TLS_IE_32;
3975 else if ((next_end = sh_end_of_match (next + 1, "TPOFF")))
3976 reloc_type = BFD_RELOC_SH_TLS_LE_32;
3977 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF")))
3978 reloc_type = BFD_RELOC_SH_TLS_LDO_32;
3979 else if ((next_end = sh_end_of_match (next + 1, "PCREL")))
3980 reloc_type = BFD_RELOC_32_PCREL;
3981 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC")))
3982 reloc_type = BFD_RELOC_SH_GOTFUNCDESC;
3983 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC")))
3984 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC;
3985 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC")))
3986 reloc_type = BFD_RELOC_SH_FUNCDESC;
3987 else
3988 goto no_suffix;
3989
3990 *input_line_pointer = *nextcharP;
3991 input_line_pointer = next_end;
3992 *nextcharP = *input_line_pointer;
3993 *input_line_pointer = '\0';
3994
3995 exprP->X_op = O_PIC_reloc;
3996 exprP->X_add_number = 0;
3997 exprP->X_md = reloc_type;
3998
3999 return 1;
4000 }
4001
4002 void
sh_cfi_frame_initial_instructions(void)4003 sh_cfi_frame_initial_instructions (void)
4004 {
4005 cfi_add_CFA_def_cfa (15, 0);
4006 }
4007
4008 int
sh_regname_to_dw2regnum(char * regname)4009 sh_regname_to_dw2regnum (char *regname)
4010 {
4011 unsigned int regnum = -1;
4012 unsigned int i;
4013 const char *p;
4014 char *q;
4015 static struct { const char *name; int dw2regnum; } regnames[] =
4016 {
4017 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 },
4018 { "macl", 21 }, { "fpul", 23 }
4019 };
4020
4021 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
4022 if (strcmp (regnames[i].name, regname) == 0)
4023 return regnames[i].dw2regnum;
4024
4025 if (regname[0] == 'r')
4026 {
4027 p = regname + 1;
4028 regnum = strtoul (p, &q, 10);
4029 if (p == q || *q || regnum >= 16)
4030 return -1;
4031 }
4032 else if (regname[0] == 'f' && regname[1] == 'r')
4033 {
4034 p = regname + 2;
4035 regnum = strtoul (p, &q, 10);
4036 if (p == q || *q || regnum >= 16)
4037 return -1;
4038 regnum += 25;
4039 }
4040 else if (regname[0] == 'x' && regname[1] == 'd')
4041 {
4042 p = regname + 2;
4043 regnum = strtoul (p, &q, 10);
4044 if (p == q || *q || regnum >= 8)
4045 return -1;
4046 regnum += 87;
4047 }
4048 return regnum;
4049 }
4050 #endif /* OBJ_ELF */
4051