| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64StorePairSuppress.cpp | 150 const MachineOperand *BaseOp; in runOnMachineFunction() local
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| D | AArch64InstrInfo.cpp | 2592 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
2620 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMLoadStoreOptimizer.cpp | 1623 const MachineOperand &BaseOp = MI.getOperand(2); in MergeBaseUpdateLSDouble() local
1769 const MachineOperand &BaseOp = MI->getOperand(2); in FixInvalidRegPairOp() local
2730 unsigned BaseOp = getBaseOperandIndex(*MI); in AdjustBaseAndOffset() local
2871 int BaseOp = getBaseOperandIndex(Use); in DistributeIncrements() local
2929 int BaseOp = getBaseOperandIndex(*PrePostInc); in DistributeIncrements() local
2950 unsigned BaseOp = getBaseOperandIndex(*Use); in DistributeIncrements() local
3000 int BaseOp = getBaseOperandIndex(MI); in DistributeIncrements() local
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| D | ARMHazardRecognizer.cpp | 109 static bool getBaseOffset(const MachineInstr &MI, const MachineOperand *&BaseOp, in getBaseOffset()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 754 const MachineInstr &LdSt, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffsetWidth()
810 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFMISimplifyPatchable.cpp | 107 const MachineOperand *BaseOp = (RelocOp == Op1) ? Op2 : Op1; in checkADDrr() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonOptAddrMode.cpp | 430 MachineOperand BaseOp = MI->getOperand(getBaseOpPosition(MI)); in processAddUses() local
496 MachineOperand &BaseOp = UseMI->getOperand(getBaseOpPosition(UseMI)); in updateAddUses() local
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| D | HexagonInstrInfo.cpp | 1171 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1186 const MachineOperand &BaseOp = MI.getOperand(1); in expandPostRAPseudo() local
1209 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
1225 const MachineOperand &BaseOp = MI.getOperand(0); in expandPostRAPseudo() local
3045 const MachineOperand *BaseOp = getBaseAndOffset(LdSt, Offset, Width); in getMemOperandsWithOffsetWidth() local
3284 const MachineOperand &BaseOp = MI.getOperand(BasePos); in getBaseAndOffset() local
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | TargetInstrInfo.cpp | 1205 const MachineInstr &MI, const MachineOperand *&BaseOp, int64_t &Offset, in getMemOperandWithOffset()
1357 const MachineOperand *BaseOp; in describeLoadedValue() local
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| D | MachineSink.cpp | 1016 const MachineOperand *BaseOp; in SinkingPreventsImplicitNullCheck() local
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| D | ModuloSchedule.cpp | 927 const MachineOperand *BaseOp; in computeDelta() local
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| D | MachinePipeliner.cpp | 2084 const MachineOperand *BaseOp; in computeDelta() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3741 auto &BaseOp = MemI.getOperand(MemRefBegin + X86::AddrBaseReg); in getAddrModeFromMemoryOp() local
3838 const MachineOperand *BaseOp = in getMemOperandsWithOffsetWidth() local
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| D | X86ISelLowering.cpp | 25406 unsigned BaseOp = 0; in getX86XALUOOp() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 3955 unsigned BaseOp = 0; in lowerXALUO() local
4020 unsigned BaseOp = 0; in lowerADDSUBCARRY() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 2854 const MachineOperand *BaseOp; in getMemOperandsWithOffsetWidth() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5780 const MCOperand &BaseOp = Inst.getOperand(2); in expandSaaAddr() local
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 303 const MachineOperand *BaseOp, *OffsetOp; in getMemOperandsWithOffsetWidth() local
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 7017 unsigned BaseOp; in lowerAddSubSatToMinMax() local
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