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Searched refs:transfers (Results 1 – 25 of 34) sorted by relevance

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/trueos/share/examples/libusb20/
HDREADME15 and input transfers to talk to an USB device.
18 and input transfers, as well as so-called interrupt transfers. The
22 transfers on each USB frame (i.e., each 1 ms).
/trueos/contrib/tnftp/
HDNEWS18 Improve parsing of HTTP chunked transfers per RFC2616.
HDChangeLog628 - -n is ignored for auto-fetch transfers
/trueos/share/examples/pf/
HDqueue24 # give interactive ssh traffic priority over ssh bulk transfers (scp, sftp)
/trueos/crypto/openssh/
HDsftp.071 Selects the cipher to use for encrypting the data transfers.
235 transfers of existing files. Note that resumption assumes that
248 performing recursive transfers.
331 performing recursive transfers.
HDREADME.hpn69 In some situations, such as transfers on a local area network, the impact
/trueos/sys/dev/usb/
HDusb_if.m42 # control transfers.
/trueos/sys/cam/
HDREADME.quirks129 of transfers wrong. This is sometimes needed for devices where
130 large transfers cause stalls.
/trueos/share/examples/ipfilter/
HDfirewall.261 # to the main nameserver so secondaries can do zone transfers, SMTP
HDipf-howto.txt2266 transfer, called active and passive. Active transfers are
2268 client to send data. Conversely, passive transfers are
2344 transfers: passive and active.
2356 transfers cause the server to open up a second connection
/trueos/sys/netinet/libalias/
HDHISTORY46 - Checksum error on FTP transfers. Problem
/trueos/contrib/serf/
HDdesign-guide.txt148 ### it. passing a bucket into another transfers ownership. use barrier
/trueos/contrib/ntp/
HDNEWS15 transfers use modes 1 through 5. Upon receipt of an incorrect mode 7
/trueos/sys/dev/aic7xxx/
HDaic7xxx.reg164 * SOFS (3:0) bits disables synchronous data transfers. Any offset value
165 * greater than 0 enables synchronous transfers.
192 * The aic7890/91 allow an offset of up to 127 transfers in both wide
1283 * control whether to enable Ultra transfers or not. During
HDaic7xxx.seq607 * target transfers.
703 * so default to narrow transfers to avoid
845 * corrupted by the interveining, non-data, transfers. Ask
1205 * unable to handle direct transfers from
1409 * transfers from the sequencer. Force this to
1425 * transfers.
2259 * happen for SCSI transfers as the SCSI module
HDaic79xx.seq1640 * corrupted by the interveining, non-data, transfers. Ask
1861 * first few data transfers on the bus. We detect this
HDaic79xx.reg2765 * Indicates the true stop location of transfers halted prior
/trueos/sys/cam/ctl/
HDREADME.ctl.txt172 - Added in the second HA mode (where CTL does the data transfers instead
173 of having data transfers done below CTL), and abstracted out the Copan
/trueos/contrib/llvm/lib/Target/Hexagon/
HDHexagonInstrInfoV5.td535 // Pseudo instruction to encode a set of conditional transfers.
538 // the hope that these instructions get promoted to dot-new transfers.
HDHexagonInstrInfo.td1835 // Pseudo instruction to encode a set of conditional transfers.
1838 // the hope that these instructions get promoted to dot-new transfers.
/trueos/contrib/gcc/doc/
HDcfg.texi142 Edges represent possible control flow transfers from the end of some
244 Exception handling edges represent possible control transfers from a
/trueos/contrib/ldns/
HDChangelog262 successfully completed zone transfers.
300 it would block subsequent transfers (thanks Roland van Rijswijk).
/trueos/sys/dev/bktr/
HDCHANGELOG.TXT17 data transfers. This is for capturing data
/trueos/sys/pci/
HDncr.c601 u_long transfers; member
4499 tp->transfers ++;
/trueos/sys/contrib/dev/acpica/
HDchanges.txt2079 on machines that support non-aligned transfers. Optimizes for this case
4135 Re-introduced the support to enable multi-byte transfers for Embedded
4146 enables single transfers larger than 8 bits. This effectively changes the
4150 transfers in addition to 8-bit transfers. Alexey Starikovskiy, Lin Ming.
4223 Controller multi-byte transfers. This change was found to cause problems
4294 Implemented support to enable multi-byte transfers for Embedded
4303 transfers
4308 Controller driver to enable 16/32/64/256-bit transfers in addition to 8-
4310 transfers. Alexey Starikovskiy, Lin Ming
5170 transfers. The Value parameter has been extended from 32 bits to 64 bits
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