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Searched refs:sc_bas (Results 1 – 25 of 44) sorted by relevance

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/trueos/sys/arm/at91/
HDuart_dev_at91usart.c456 WR4(&sc->sc_bas, USART_IDR, 0xffffffff); in at91_usart_bus_attach()
457 WR4(&sc->sc_bas, USART_IER, USART_CSR_TIMEOUT); in at91_usart_bus_attach()
458 if (RD4(&sc->sc_bas, USART_IMR) & USART_CSR_TIMEOUT) in at91_usart_bus_attach()
460 WR4(&sc->sc_bas, USART_IDR, 0xffffffff); in at91_usart_bus_attach()
512 WR4(&sc->sc_bas, USART_CR, cr); in at91_usart_bus_attach()
513 WR4(&sc->sc_bas, USART_CR, USART_CR_RXEN | USART_CR_TXEN); in at91_usart_bus_attach()
522 WR4(&sc->sc_bas, PDC_RPR, atsc->ping->pa); in at91_usart_bus_attach()
523 WR4(&sc->sc_bas, PDC_RCR, sc->sc_rxfifosz); in at91_usart_bus_attach()
524 WR4(&sc->sc_bas, PDC_RNPR, atsc->pong->pa); in at91_usart_bus_attach()
525 WR4(&sc->sc_bas, PDC_RNCR, sc->sc_rxfifosz); in at91_usart_bus_attach()
[all …]
/trueos/sys/arm/samsung/exynos/
HDexynos_uart.c264 exynos4210_putc(&sc->sc_bas, sc->sc_txbuf[i]); in exynos4210_bus_transmit()
265 uart_barrier(&sc->sc_bas); in exynos4210_bus_transmit()
273 reg = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTM); in exynos4210_bus_transmit()
275 bus_space_write_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UINTM, reg); in exynos4210_bus_transmit()
292 bas = &sc->sc_bas; in exynos4210_bus_receive()
295 uart_rx_put(sc, uart_getreg(&sc->sc_bas, SSCOM_URXH)); in exynos4210_bus_receive()
306 if (sc->sc_bas.rclk == 0) in exynos4210_bus_param()
307 sc->sc_bas.rclk = DEF_CLK; in exynos4210_bus_param()
309 KASSERT(sc->sc_bas.rclk != 0, ("exynos4210_init: Invalid rclk")); in exynos4210_bus_param()
312 error = exynos4210_uart_param(&sc->sc_bas, baudrate, databits, stopbits, in exynos4210_bus_param()
[all …]
/trueos/sys/mips/rt305x/
HDuart_dev_rt305x.c240 struct uart_bas *bas = &sc->sc_bas; in rt305x_uart_disable_txintr()
255 struct uart_bas *bas = &sc->sc_bas; in rt305x_uart_enable_txintr()
270 bas = &sc->sc_bas; in rt305x_uart_bus_attach()
304 struct uart_bas *bas = &sc->sc_bas; in rt305x_uart_bus_flush()
329 bes = uart_getreg(&sc->sc_bas, UART_MSR_REG); in rt305x_uart_bus_getsig()
347 bas = &sc->sc_bas; in rt305x_uart_bus_ioctl()
374 bas = &sc->sc_bas; in rt305x_uart_bus_ipend()
378 iir = uart_getreg(&sc->sc_bas, UART_IIR_REG); in rt305x_uart_bus_ipend()
379 lsr = uart_getreg(&sc->sc_bas, UART_LSR_REG); in rt305x_uart_bus_ipend()
380 uart_setreg(&sc->sc_bas, UART_LSR_REG, lsr); in rt305x_uart_bus_ipend()
[all …]
HDuart_bus_rt305x.c88 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_rt305x_probe()
93 sc->sc_bas.regshft = 2; in uart_rt305x_probe()
94 sc->sc_bas.bst = mips_bus_space_generic; in uart_rt305x_probe()
95 sc->sc_bas.bsh = in uart_rt305x_probe()
/trueos/sys/mips/adm5120/
HDuart_dev_adm5120.c196 cr = uart_getreg(&sc->sc_bas, UART_CR_REG); in adm5120_uart_disable_txintr()
198 uart_setreg(&sc->sc_bas, UART_CR_REG, cr); in adm5120_uart_disable_txintr()
209 cr = uart_getreg(&sc->sc_bas, UART_CR_REG); in adm5120_uart_enable_txintr()
211 uart_setreg(&sc->sc_bas, UART_CR_REG, cr); in adm5120_uart_enable_txintr()
220 bas = &sc->sc_bas; in adm5120_uart_bus_attach()
267 bes = uart_getreg(&sc->sc_bas, UART_FR_REG); in adm5120_uart_bus_getsig()
284 bas = &sc->sc_bas; in adm5120_uart_bus_ioctl()
313 bas = &sc->sc_bas; in adm5120_uart_bus_ipend()
317 ir = uart_getreg(&sc->sc_bas, UART_IR_REG); in adm5120_uart_bus_ipend()
318 fr = uart_getreg(&sc->sc_bas, UART_FR_REG); in adm5120_uart_bus_ipend()
[all …]
/trueos/sys/mips/cavium/
HDuart_bus_octeonusart.c99 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_octeon_probe()
100 sc->sc_bas.bst = uart_bus_space_mem; in uart_octeon_probe()
105 if (bus_space_map(sc->sc_bas.bst, CVMX_MIO_UARTX_RBR(0), in uart_octeon_probe()
106 uart_getrange(sc->sc_class), 0, &sc->sc_bas.bsh) != 0) in uart_octeon_probe()
108 return (uart_bus_probe(dev, sc->sc_bas.regshft, 0, 0, unit)); in uart_octeon_probe()
HDuart_dev_oct16550.c445 bas = &sc->sc_bas; in oct16550_bus_attach()
475 bas = &sc->sc_bas; in oct16550_bus_detach()
490 bas = &sc->sc_bas; in oct16550_bus_flush()
513 msr = uart_getreg(&sc->sc_bas, REG_MSR); in oct16550_bus_getsig()
531 bas = &sc->sc_bas; in oct16550_bus_ioctl()
606 bas = &sc->sc_bas; in oct16550_bus_ipend()
649 bas = &sc->sc_bas; in oct16550_bus_param()
662 bas = &sc->sc_bas; in oct16550_bus_probe()
724 bas = &sc->sc_bas; in oct16550_bus_receive()
764 bas = &sc->sc_bas; in oct16550_bus_setsig()
[all …]
/trueos/sys/arm/xscale/i8134x/
HDuart_bus_i81342.c75 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_i81342_probe()
80 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres); in uart_i81342_probe()
81 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres); in uart_i81342_probe()
82 bus_space_write_4(sc->sc_bas.bst, sc->sc_bas.bsh, REG_IER << 2, in uart_i81342_probe()
/trueos/sys/mips/idt/
HDuart_bus_rc32434.c89 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_rc32434_probe()
93 sc->sc_bas.regshft = 2; in uart_rc32434_probe()
94 sc->sc_bas.bst = mips_bus_space_generic; in uart_rc32434_probe()
95 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(IDT_BASE_UART0); in uart_rc32434_probe()
/trueos/sys/mips/atheros/
HDuart_bus_ar71xx.c78 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_ar71xx_probe()
82 sc->sc_bas.regshft = 2; in uart_ar71xx_probe()
83 sc->sc_bas.bst = mips_bus_space_generic; in uart_ar71xx_probe()
84 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR) + 3; in uart_ar71xx_probe()
HDuart_bus_ar933x.c80 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_ar933x_probe()
84 sc->sc_bas.regshft = 0; in uart_ar933x_probe()
85 sc->sc_bas.bst = mips_bus_space_generic; in uart_ar933x_probe()
86 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(AR71XX_UART_ADDR); in uart_ar933x_probe()
HDuart_dev_ar933x.c368 struct uart_bas *bas = &sc->sc_bas; in ar933x_bus_attach()
396 struct uart_bas *bas = &sc->sc_bas; in ar933x_bus_detach()
416 bas = &sc->sc_bas; in ar933x_bus_flush()
452 bas = &sc->sc_bas; in ar933x_bus_ioctl()
531 struct uart_bas *bas = &sc->sc_bas; in ar933x_bus_ipend()
604 bas = &sc->sc_bas; in ar933x_bus_param()
617 bas = &sc->sc_bas; in ar933x_bus_probe()
636 struct uart_bas *bas = &sc->sc_bas; in ar933x_bus_receive()
678 bas = &sc->sc_bas; in ar933x_bus_setsig()
720 struct uart_bas *bas = &sc->sc_bas; in ar933x_bus_transmit()
[all …]
/trueos/sys/arm/freescale/vybrid/
HDvf_uart.c207 bas = &sc->sc_bas; in uart_reinit()
295 bas = &sc->sc_bas; in vf_uart_bus_attach()
343 bas = &sc->sc_bas; in vf_uart_bus_ioctl()
372 bas = &sc->sc_bas; in vf_uart_bus_ipend()
417 vf_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity); in vf_uart_bus_param()
428 error = vf_uart_probe(&sc->sc_bas); in vf_uart_bus_probe()
446 bas = &sc->sc_bas; in vf_uart_bus_receive()
480 bas = &sc->sc_bas; in vf_uart_bus_setsig()
493 struct uart_bas *bas = &sc->sc_bas; in vf_uart_bus_transmit()
497 bas = &sc->sc_bas; in vf_uart_bus_transmit()
[all …]
/trueos/sys/arm/samsung/s3c2xx0/
HDuart_dev_s3c2410.c280 s3c2410_putc(&sc->sc_bas, sc->sc_txbuf[i]); in s3c2410_bus_transmit()
281 uart_barrier(&sc->sc_bas); in s3c2410_bus_transmit()
304 uart_rx_put(sc, uart_getreg(&sc->sc_bas, SSCOM_URXH)); in s3c2410_bus_receive()
314 if (sc->sc_bas.rclk == 0) in s3c2410_bus_param()
315 sc->sc_bas.rclk = s3c2410_pclk; in s3c2410_bus_param()
316 KASSERT(sc->sc_bas.rclk != 0, ("s3c2410_init: Invalid rclk")); in s3c2410_bus_param()
319 error = s3c24x0_uart_param(&sc->sc_bas, baudrate, databits, stopbits, in s3c2410_bus_param()
334 ufstat = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UFSTAT); in s3c2410_bus_ipend()
/trueos/sys/mips/rmi/
HDuart_bus_xlr_iodi.c71 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_iodi_probe()
74 sc->sc_bas.bst = rmi_bus_space; in uart_iodi_probe()
75 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(XLR_UART0ADDR); in uart_iodi_probe()
/trueos/sys/mips/sentry5/
HDuart_bus_sbusart.c87 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_malta_probe()
90 sc->sc_bas.bst = mips_bus_space_generic; in uart_malta_probe()
91 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(SENTRY5_UART1ADR); in uart_malta_probe()
/trueos/sys/mips/malta/
HDuart_bus_maltausart.c83 bcopy(&sc->sc_sysdev->bas, &sc->sc_bas, sizeof(sc->sc_bas)); in uart_malta_probe()
86 sc->sc_bas.bst = mips_bus_space_generic; in uart_malta_probe()
87 sc->sc_bas.bsh = MIPS_PHYS_TO_KSEG1(MALTA_UART0ADR); in uart_malta_probe()
/trueos/sys/dev/uart/
HDuart_dev_imx.c329 bas = &sc->sc_bas; in imx_uart_bus_attach()
379 SETREG(&sc->sc_bas, REG(UCR4), 0); in imx_uart_bus_detach()
402 bes = GETREG(&sc->sc_bas, REG(USR2)); in imx_uart_bus_getsig()
418 bas = &sc->sc_bas; in imx_uart_bus_ioctl()
445 bas = &sc->sc_bas; in imx_uart_bus_ipend()
494 imx_uart_init(&sc->sc_bas, baudrate, databits, stopbits, parity); in imx_uart_bus_param()
504 error = imx_uart_probe(&sc->sc_bas); in imx_uart_bus_probe()
527 bas = &sc->sc_bas; in imx_uart_bus_receive()
572 struct uart_bas *bas = &sc->sc_bas; in imx_uart_bus_transmit()
575 bas = &sc->sc_bas; in imx_uart_bus_transmit()
[all …]
HDuart_dev_msm.c340 struct uart_bas *bas = &sc->sc_bas; in msm_bus_attach()
361 struct uart_bas *bas = &sc->sc_bas; in msm_bus_transmit()
402 bas = &sc->sc_bas; in msm_bus_receive()
437 if (sc->sc_bas.rclk == 0) in msm_bus_param()
438 sc->sc_bas.rclk = DEF_CLK; in msm_bus_param()
440 KASSERT(sc->sc_bas.rclk != 0, ("msm_init: Invalid rclk")); in msm_bus_param()
443 error = msm_uart_param(&sc->sc_bas, baudrate, databits, stopbits, in msm_bus_param()
454 struct uart_bas *bas = &sc->sc_bas; in msm_bus_ipend()
534 struct uart_bas *bas = &sc->sc_bas; in msm_bus_grab()
551 struct uart_bas *bas = &sc->sc_bas; in msm_bus_ungrab()
HDuart_dev_quicc.c291 bas = &sc->sc_bas; in quicc_bus_attach()
352 bas = &sc->sc_bas; in quicc_bus_ioctl()
379 bas = &sc->sc_bas; in quicc_bus_ipend()
405 error = quicc_param(&sc->sc_bas, baudrate, databits, stopbits, in quicc_bus_param()
417 error = quicc_probe(&sc->sc_bas); in quicc_bus_probe()
424 snprintf(buf, sizeof(buf), "quicc, channel %d", sc->sc_bas.chan); in quicc_bus_probe()
436 bas = &sc->sc_bas; in quicc_bus_receive()
453 bas = &sc->sc_bas; in quicc_bus_setsig()
480 bas = &sc->sc_bas; in quicc_bus_transmit()
500 bas = &sc->sc_bas; in quicc_bus_grab()
[all …]
HDuart_dev_sab82532.c410 bas = &sc->sc_bas; in sab82532_bus_attach()
432 bas = &sc->sc_bas; in sab82532_bus_detach()
449 sab82532_flush(&sc->sc_bas, what); in sab82532_bus_flush()
461 bas = &sc->sc_bas; in sab82532_bus_getsig()
493 bas = &sc->sc_bas; in sab82532_bus_ioctl()
542 bas = &sc->sc_bas; in sab82532_bus_ipend()
577 bas = &sc->sc_bas; in sab82532_bus_param()
592 error = sab82532_probe(&sc->sc_bas); in sab82532_bus_probe()
599 ch = sc->sc_bas.chan - 1 + 'A'; in sab82532_bus_probe()
601 switch (uart_getreg(&sc->sc_bas, SAB_VSTR) & SAB_VSTR_VMASK) { in sab82532_bus_probe()
[all …]
HDuart_dev_ti8250.c105 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_DISABLE); in ti8250_bus_probe()
106 uart_setreg(&sc->sc_bas, SYSCC_REG, SYSCC_SOFTRESET); in ti8250_bus_probe()
107 while (uart_getreg(&sc->sc_bas, SYSS_REG) & SYSS_STATUS_RESETDONE) in ti8250_bus_probe()
109 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_UART); in ti8250_bus_probe()
HDuart_dev_pl011.c291 bas = &sc->sc_bas; in uart_pl011_bus_attach()
330 bas = &sc->sc_bas; in uart_pl011_bus_ioctl()
356 bas = &sc->sc_bas; in uart_pl011_bus_ipend()
388 uart_pl011_param(&sc->sc_bas, baudrate, databits, stopbits, parity); in uart_pl011_bus_param()
413 bas = &sc->sc_bas; in uart_pl011_bus_receive()
455 bas = &sc->sc_bas; in uart_pl011_bus_transmit()
479 bas = &sc->sc_bas; in uart_pl011_bus_grab()
491 bas = &sc->sc_bas; in uart_pl011_bus_ungrab()
HDuart_dev_z8530.c327 bas = &sc->sc_bas; in z8530_bus_attach()
378 bes = uart_getmreg(&sc->sc_bas, RR_BES); in z8530_bus_getsig()
395 bas = &sc->sc_bas; in z8530_bus_ioctl()
430 bas = &sc->sc_bas; in z8530_bus_ipend()
502 error = z8530_param(&sc->sc_bas, baudrate, databits, stopbits, parity, in z8530_bus_param()
515 error = z8530_probe(&sc->sc_bas); in z8530_bus_probe()
522 ch = sc->sc_bas.chan - 1 + 'A'; in z8530_bus_probe()
536 bas = &sc->sc_bas; in z8530_bus_receive()
582 bas = &sc->sc_bas; in z8530_bus_setsig()
617 bas = &sc->sc_bas; in z8530_bus_transmit()
[all …]
/trueos/sys/arm/xilinx/
HDuart_dev_cdnc.c439 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_attach()
464 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_transmit()
486 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_setsig()
515 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_receive()
557 return (cdnc_uart_set_params(&sc->sc_bas, baudrate, in cdnc_uart_bus_param()
565 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_ipend()
621 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_getsig()
647 struct uart_bas *bas = &sc->sc_bas; in cdnc_uart_bus_ioctl()
688 WR4(&sc->sc_bas, CDNC_UART_IEN_REG, in cdnc_uart_bus_grab()
698 WR4(&sc->sc_bas, CDNC_UART_IEN_REG, in cdnc_uart_bus_ungrab()

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