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/trueos/contrib/llvm/lib/Target/Sparc/
HDSparcInstrInfo.td233 (outs RC:$rd), (ins RC:$rs1, RC:$rs2),
234 !strconcat(OpcStr, " $rs1, $rs2, $rd"),
235 [(set Ty:$rd, (OpNode Ty:$rs1, Ty:$rs2))]>;
246 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
247 !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
305 let rd = 0, rs1 = 0, rs2 = 0 in
428 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
429 "andn $rs1, $rs2, $rd",
430 [(set i32:$rd, (and i32:$rs1, (not i32:$rs2)))]>;
438 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
[all …]
HDSparcInstrAliases.td15 // mov<cond> <ccreg> rs2, rd
20 // mov<cond> (%icc|%xcc|%fcc0), rs2, rd
22 ", $rs2, $rd"),
23 (movrr IntRegs:$rd, IntRegs:$rs2, condVal)>;
30 // fmovs<cond> (%icc|%xcc|%fcc0), $rs2, $rd
32 ", $rs2, $rd"),
33 (fmovs FPRegs:$rd, FPRegs:$rs2, condVal)>;
35 // fmovd<cond> (%icc|%xcc|%fcc0), $rs2, $rd
37 ", $rs2, $rd"),
38 (fmovd DFPRegs:$rd, DFPRegs:$rs2, condVal)>;
[all …]
HDSparcInstr64Bit.td166 (ins I64Regs:$rs1, I64Regs:$rs2, TLSSym:$sym),
167 "add $rs1, $rs2, $rd, $sym",
169 (tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym))]>;
192 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
193 "mulx $rs1, $rs2, $rd",
194 [(set i64:$rd, (mul i64:$rs1, i64:$rs2))]>;
203 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
204 "sdivx $rs1, $rs2, $rd",
205 [(set i64:$rd, (sdiv i64:$rs1, i64:$rs2))]>;
212 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
[all …]
HDSparcInstrFormats.td105 bits<5> rs2;
112 let Inst{4-0} = rs2;
133 bits<5> rs2;
139 let Inst{4-0} = rs2;
145 bits<5> rs2;
152 let Inst{4-0} = rs2;
158 bits<5> rs2;
165 let Inst{4-0} = rs2;
168 // Shift by register rs2.
172 bits<5> rs2;
[all …]
HDSparcJITInfo.cpp107 #define OR_INST_R(rs1, rs2, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \ argument
108 | ((rs1) << 14) | (0 << 13) | ((rs2) & 0x1F))
/trueos/lib/libc/sparc64/fpu/
HDfpu.c209 __fpu_mov(struct fpemu *fe, int type, int rd, int rs2, u_int32_t nand, in __fpu_mov() argument
214 __fpu_setreg(rd, (__fpu_getreg(rs2) & ~nand) ^ xor); in __fpu_mov()
220 __fpu_setreg64(rd, (__fpu_getreg64(rs2) & in __fpu_mov()
223 __fpu_setreg64(rd + 2, __fpu_getreg64(rs2 + 2)); in __fpu_mov()
228 __fpu_ccmov(struct fpemu *fe, int type, int rd, int rs2, in __fpu_ccmov() argument
233 __fpu_mov(fe, type, rd, rs2, 0, 0); in __fpu_ccmov()
273 int opf, rs1, rs2, rd, type, mask, cx, cond; in __fpu_execute() local
286 rs2 = RN_DECODE(type, IF_F3_RS2(insn)); in __fpu_execute()
290 if ((rs1 | rs2 | rd) & opmask[type]) in __fpu_execute()
298 __fpu_ccmov(fe, type, rd, rs2, insn, FSR_GET_FCC0(fsr)); in __fpu_execute()
[all …]
/trueos/contrib/llvm/patches/
HDpatch-r262261-llvm-r199033-sparc.diff18 + (outs FPRegs:$rd), (ins FPRegs:$rs2),
19 + "fitos $rs2, $rd",
20 + [(set FPRegs:$rd, (SPitof FPRegs:$rs2))]>;
25 + (outs DFPRegs:$rd), (ins FPRegs:$rs2),
26 + "fitod $rs2, $rd",
27 + [(set DFPRegs:$rd, (SPitof FPRegs:$rs2))]>;
32 + (outs QFPRegs:$rd), (ins FPRegs:$rs2),
33 + "fitoq $rs2, $rd",
34 + [(set QFPRegs:$rd, (SPitof FPRegs:$rs2))]>,
42 + (outs FPRegs:$rd), (ins FPRegs:$rs2),
[all …]
HDpatch-r262261-llvm-r198740-sparc.diff55 "mulx $rs1, $rs2, $rd",
56 [(set i64:$rd, (mul i64:$rs1, i64:$rs2))]>;
68 "sdivx $rs1, $rs2, $rd",
69 [(set i64:$rd, (sdiv i64:$rs1, i64:$rs2))]>;
79 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2),
81 "udivx $rs1, $rs2, $rd",
82 [(set i64:$rd, (udiv i64:$rs1, i64:$rs2))]>;
101 - def rr : F3_Sr<2, Op3Val, XVal, (outs RC:$rd), (ins RC:$rs, IntRegs:$rs2),
102 - !strconcat(OpcStr, " $rs, $rs2, $rd"),
103 - [(set VT:$rd, (OpNode VT:$rs, i32:$rs2))]>;
[all …]
HDpatch-r262261-llvm-r198738-sparc.diff484 (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cond),
485 "mov$cond %xcc, $rs2, $rd",
487 (SPselectxcc i32:$rs2, i32:$f, imm:$cond))]>;
502 (ins FPRegs:$rs2, FPRegs:$f, CCOp:$cond),
503 "fmovs$cond %xcc, $rs2, $rd",
505 (SPselectxcc f32:$rs2, f32:$f, imm:$cond))]>;
508 (ins DFPRegs:$rs2, DFPRegs:$f, CCOp:$cond),
509 "fmovd$cond %xcc, $rs2, $rd",
511 (SPselectxcc f64:$rs2, f64:$f, imm:$cond))]>;
513 + (ins QFPRegs:$rs2, QFPRegs:$f, CCOp:$cond),
[all …]
HDpatch-r262261-llvm-r200963-sparc.diff60 (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2,
62 "cas [$rs1], $rs2, $rd",
75 bits<5> rs2;
79 let Inst{4-0} = rs2;
129 (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2,
131 "casx [$rs1], $rs2, $rd",
HDpatch-r262261-llvm-r198591-sparc.diff89 + (outs RC:$rd), (ins RC:$rs1, RC:$rs2),
90 + !strconcat(OpcStr, " $rs1, $rs2, $rd"),
91 + [(set Ty:$rd, (OpNode Ty:$rs1, Ty:$rs2))]>;
108 + (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
109 + !strconcat(OpcStr, " $rs1, $rs2, $rd"), []>;
125 + (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
126 + "andn $rs1, $rs2, $rd",
127 + [(set i32:$rd, (and i32:$rs1, (not i32:$rs2)))]>;
140 + (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2),
141 + "orn $rs1, $rs2, $rd",
[all …]
HDpatch-r262261-llvm-r198286-sparc.diff16 +let hasSideEffects =1, rd = 0, rs1 = 0b01111, rs2 = 0 in
36 + (outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2,
38 + "cas [$rs1], $rs2, $rd",
40 + (atomic_cmp_swap iPTR:$rs1, i32:$rs2, i32:$swap))]>;
139 + (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2,
141 + "casx [$rs1], $rs2, $rd",
143 + (atomic_cmp_swap i64:$rs1, i64:$rs2, i64:$swap))]>;
HDpatch-r262261-llvm-r200965-sparc.diff17 +def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
HDpatch-r262261-llvm-r199975-sparc.diff117 + (ins ptr_rc:$addr, IntRegs:$rs2), "",
118 + [(set i32:$rd, (op32 iPTR:$addr, i32:$rs2))]>;
122 + (ins ptr_rc:$addr, I64Regs:$rs2), "",
123 + [(set i64:$rd, (op64 iPTR:$addr, i64:$rs2))]>;
241 + // rd = atomicrmw<op> addr, rs2
254 + // %upd = op %val, %rs2
HDpatch-r262264-llvm-r200453-sparc.diff23 + (ins ptr_rc:$addr, I64Regs:$rs2), "",
25 + (atomic_swap_64 iPTR:$addr, i64:$rs2))]>;
HDpatch-r262261-llvm-r200130-sparc.diff16 // %upd = op %val, %rs2
HDpatch-r262261-llvm-r198157-sparc.diff72 + (ins I64Regs:$rs1, I64Regs:$rs2, TLSSym:$sym),
73 + "add $rs1, $rs2, $rd, $sym",
75 + (tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym))]>;
HDpatch-r262261-llvm-r199977-sparc.diff58 +#define OR_INST_R(rs1, rs2, rd) (0x80000000 | ((rd) << 25) | (0x02 << 19) \
59 + | ((rs1) << 14) | (0 << 13) | ((rs2) & 0x1F))
/trueos/crypto/openssl/crypto/sha/asm/
HDsha1-sparcv9a.pl551 my ($mnemonic,$rs1,$rs2,$rd)=@_;
559 $ref = "$mnemonic\t$rs1,$rs2,$rd";
562 foreach ($rs1,$rs2,$rd) {
573 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
580 my ($mnemonic,$rs1,$rs2,$rd)=@_;
582 my $ref="$mnemonic\t$rs1,$rs2,$rd";
584 foreach ($rs1,$rs2,$rd) {
589 0x81b00300|$rd<<25|$rs1<<14|$rs2,
/trueos/sys/sparc64/include/
HDcpufunc.h63 #define casa(rs1, rs2, rd, asi) ({ \ argument
67 : "r" (rs1), "n" (asi), "r" (rs2), "m" (*rs1)); \
71 #define casxa(rs1, rs2, rd, asi) ({ \ argument
75 : "r" (rs1), "n" (asi), "r" (rs2), "m" (*rs1)); \
/trueos/contrib/gcc/config/sparc/
HDsparc.c2886 rtx rs1 = NULL, rs2 = NULL, imm1 = NULL; in legitimate_address_p() local
2893 rs2 = XEXP (addr, 1); in legitimate_address_p()
2899 && (REG_P (rs2) in legitimate_address_p()
2900 || GET_CODE (rs2) == SUBREG in legitimate_address_p()
2901 || (GET_CODE (rs2) == LO_SUM && GET_CODE (rs1) != LO_SUM))) in legitimate_address_p()
2904 rs2 = XEXP (addr, 0); in legitimate_address_p()
2909 && !REG_P (rs2) in legitimate_address_p()
2910 && GET_CODE (rs2) != SUBREG in legitimate_address_p()
2911 && GET_CODE (rs2) != LO_SUM in legitimate_address_p()
2912 && GET_CODE (rs2) != MEM in legitimate_address_p()
[all …]
/trueos/contrib/netbsd-tests/lib/libcurses/
HDatf.terminfo38 rs2=rs2, sc=sc, setab=setab%p1%dX,
/trueos/contrib/ncurses/misc/
HDterminfo.src1235 rs2=\E>\E[?3l\E[?4l\E[?5l\E[?7h\E[?8h, sc=\E7,
1414 rs2=\E>\E[?3l\E[?4l\E[?5l\E[?7h\E[?8h,
1551 rmul=\E[m$<2>, rs2=\E>\E[?3l\E[?4l\E[?5l\E[?7h\E[?8h,
1645 rmso=\E[m, rs2=\E[x\E[m\Ec, sc=\E7, setb=\E[4%p1%dm,
1701 ri=\E[T, rin=\E[%p1%dT, rmso=\E[m, rs2=\E[x\E[m\Ec, sc=\E7,
1897 # The vt100 uses <rs2> and <rf> rather than <is2>/<tbc>/<hts> because the
2058 rs2=\E>\E[?3l\E[?4l\E[?5l\E[?7h\E[?8h, sc=\E7,
2071 rs2=\E>\E[?3h\E[?4l\E[?5l\E[?8h, use=vt100-am,
2074 rs2=\E>\E[?3h\E[?4l\E[?5l\E[?8h, use=vt100-nam,
2183 rs2=\E>\E[?3l\E[?4l\E[?5l\E[?7h\E[?8h, sc=\E7,
[all …]
HDemx.src564 rs2=\E[r\E[m\E[2J\E[H\E[?7h\E[?1;3;4;6l\E[4l\E<,
867 rs2=\ES\Es0;\Er0;,
/trueos/sys/cddl/contrib/opensolaris/uts/sparc/dtrace/
HDfasttrap_isa.c914 uint_t rs2 = RS2(tp->ftt_instr); in fasttrap_pid_probe() local
917 fasttrap_getreg(rp, rs2); in fasttrap_pid_probe()

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