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Searched refs:msi_cap (Results 1 – 3 of 3) sorted by relevance

/trueos/sys/dev/vxge/vxgehal/
HDvxgehal-mgmt.c204 vxge_hal_mgmt_msi_cap_t *msi_cap) in vxge_hal_mgmt_msi_capabilities_get() argument
210 vxge_assert((hldev != NULL) && (msi_cap != NULL)); in vxge_hal_mgmt_msi_capabilities_get()
217 (ptr_t) hldev, (ptr_t) msi_cap); in vxge_hal_mgmt_msi_capabilities_get()
225 vxge_os_memzero(msi_cap, sizeof(vxge_hal_mgmt_msi_cap_t)); in vxge_hal_mgmt_msi_capabilities_get()
235 msi_cap->enable = 1; in vxge_hal_mgmt_msi_capabilities_get()
238 msi_cap->is_pvm_capable = 1; in vxge_hal_mgmt_msi_capabilities_get()
241 msi_cap->is_64bit_addr_capable = 1; in vxge_hal_mgmt_msi_capabilities_get()
243 msi_cap->vectors_allocated = in vxge_hal_mgmt_msi_capabilities_get()
246 msi_cap->max_vectors_capable = in vxge_hal_mgmt_msi_capabilities_get()
249 if (msi_cap->is_64bit_addr_capable) { in vxge_hal_mgmt_msi_capabilities_get()
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HDvxgehal-mgmtaux.c192 vxge_hal_mgmt_msi_cap_t msi_cap; in vxge_hal_aux_pci_config_read() local
312 &msi_cap); in vxge_hal_aux_pci_config_read()
317 __HAL_AUX_ENTRY("MSI Enable", msi_cap.enable, "%u"); in vxge_hal_aux_pci_config_read()
319 msi_cap.is_64bit_addr_capable, "%u"); in vxge_hal_aux_pci_config_read()
321 msi_cap.is_pvm_capable, "0x%02X"); in vxge_hal_aux_pci_config_read()
323 msi_cap.vectors_allocated, "0x%02X"); in vxge_hal_aux_pci_config_read()
325 msi_cap.max_vectors_capable, "0x%02X"); in vxge_hal_aux_pci_config_read()
326 if (msi_cap.is_64bit_addr_capable) { in vxge_hal_aux_pci_config_read()
328 msi_cap.address, "0x%016llX"); in vxge_hal_aux_pci_config_read()
331 msi_cap.address, "0x%08llX"); in vxge_hal_aux_pci_config_read()
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/trueos/sys/dev/vxge/include/
HDvxgehal-mgmt.h264 vxge_hal_mgmt_msi_cap_t *msi_cap);
275 vxge_hal_mgmt_msi_cap_t *msi_cap);