| /trueos/tools/regression/include/tgmath/ |
| HD | tgmath.c | 169 long double complex ldc; variable 339 RUN_TEST(FNC(ldc), long double complex) && \ 349 RUN_TEST(FNC(ldc), long double) && \ 359 RUN_TEST(FNC(ldc, ldc), long double complex) && \ 360 RUN_TEST(FNC(ldc, dc), long double complex) && \ 361 RUN_TEST(FNC(ldc, fc), long double complex) && \ 362 RUN_TEST(FNC(ldc, ld), long double complex) && \ 363 RUN_TEST(FNC(ldc, d), long double complex) && \ 364 RUN_TEST(FNC(ldc, f), long double complex) && \ 365 RUN_TEST(FNC(ldc, i), long double complex) && \ [all …]
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| /trueos/sbin/launchd/ |
| HD | core.c | 3466 struct ldcred *ldc = runtime_get_caller_creds(); in job_mig_intran() local 3469 jr = job_mig_intran2(root_jobmgr, p, ldc->pid); in job_mig_intran() 3473 if (proc_pidinfo(ldc->pid, PROC_PIDT_SHORTBSDINFO, 1, &proc, PROC_PIDT_SHORTBSDINFO_SIZE) == 0) { in job_mig_intran() 3477 … disappeared out from under us (UID: %u EUID: %u)", proc.pbsi_comm, ldc->pid, ldc->uid, ldc->euid); in job_mig_intran() 7727 struct ldcred *ldc = runtime_get_caller_creds(); in externalevent_new() local 7728 if (ldc) { in externalevent_new() 7729 ee->entitlements = xpc_copy_entitlements_for_pid(ldc->pid); in externalevent_new() 8073 struct ldcred *ldc = runtime_get_caller_creds(); in job_mig_create_server() local 8089 if (unlikely(sandbox_check(ldc->pid, "job-creation", SANDBOX_FILTER_PATH, argv[0]) > 0)) { in job_mig_create_server() 8099 if (ldc->euid || ldc->uid) { in job_mig_create_server() [all …]
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| HD | runtime.c | 110 static struct ldcred ldc; variable 1095 audit_token_to_au32(*token, NULL, &ldc.euid,&ldc.egid, &ldc.uid, &ldc.gid, in runtime_record_caller_creds() 1096 &ldc.pid, &ldc.asid, NULL); in runtime_record_caller_creds() 1102 return &ldc; in runtime_get_caller_creds()
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| /trueos/contrib/binutils/gas/doc/ |
| HD | c-sh.texi | 286 ldc Rn,GBR mov.w @@(R0,Rm),Rn 287 ldc Rn,SR mov.w @@Rm+,Rn 288 ldc Rn,VBR mov.w @@Rm,Rn 289 ldc.l @@Rn+,GBR mov.w R0,@@(disp,Rm) 290 ldc.l @@Rn+,SR mov.w R0,@@(disp,GBR) 291 ldc.l @@Rn+,VBR mova @@(disp,PC),R0
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| /trueos/sys/contrib/octeon-sdk/ |
| HD | cvmx-eoi-defs.h | 674 uint64_t ldc : 4; /**< Number of outstanding L2C loads. The value must be member 677 uint64_t ldc : 4;
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| /trueos/contrib/gcc/config/ia64/ |
| HD | ia64.opt | 123 msched-ldc 127 msched-control-ldc
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| /trueos/contrib/gcc/config/arm/ |
| HD | libunwind.S | 79 ldc p11,cr0,[r0],{0x21} /* fldmiax r0, {d0-d15} */
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| /trueos/sys/gnu/dts/arm/ |
| HD | tegra20-trimslice.dts | 136 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 228 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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| HD | tegra20-tamonten.dtsi | 128 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 214 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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| HD | tegra20-paz00.dts | 134 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 235 "ldc", "ldi", "lhs", "lsc0", "lspi",
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| HD | tegra20-ventana.dts | 141 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", 238 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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| HD | tegra20-harmony.dts | 146 "ldc", "ldi", "lhp0", "lhp1", "lhp2", 232 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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| HD | tegra20-seaboard.dts | 142 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1", 239 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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| HD | tegra20-whistler.dts | 136 "ld15", "ld16", "ld17", "ldc", "ldi",
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| /trueos/contrib/llvm/lib/Target/XCore/ |
| HD | XCoreInstrInfo.td | 583 "ldc $a, $b", [(set RRegs:$a, immU6:$b)]>; 586 "ldc $a, $b", [(set RRegs:$a, immU16:$b)]>;
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| /trueos/contrib/binutils/include/opcode/ |
| HD | ChangeLog | 673 * h8300.h (32bit ldc/stc): Add relaxing support.
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| HD | ChangeLog-9103 | 125 (ldc): Split ccr ops from exr ops (which are only available 177 * h8300.h (ldc/stc): Fix up src/dst swaps. 2255 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes. 2297 (ldc,stc): Fix many cases.
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| /trueos/contrib/binutils/opcodes/ |
| HD | ChangeLog-9297 | 2240 (sh_table): Added pref and bank reg versions of ldc, ldc.l, stc 2658 * arm-opc.h (arm_opcodes): Correct typos in stm, ldm, std, and ldc.
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| /trueos/contrib/gcc/doc/ |
| HD | invoke.texi | 553 -msched-ldc -mno-sched-control-ldc -mno-sched-spec-verbose @gol 9903 @item -msched-ldc 9904 @itemx -mno-sched-ldc 9905 @opindex msched-ldc 9906 @opindex mno-sched-ldc 9912 @item -mno-sched-control-ldc 9913 @itemx -msched-control-ldc 9914 @opindex mno-sched-control-ldc 9915 @opindex msched-control-ldc
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| /trueos/contrib/binutils/ld/ |
| HD | ld.texinfo | 5296 @command{ld} finds all @code{ldc.w, stc.w} instructions which use the 5299 (That is: the linker turns @samp{ldc.w @code{@@}@var{aa}:32,ccr} into 5300 @samp{ldc.w @code{@@}@var{aa}:16,ccr} whenever the address @var{aa} is in
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| /trueos/contrib/gdb/ |
| HD | md5.sum | 4589 3a18c58e47703c059520340b1b1c3051 sim/testsuite/sim/frv/ldc.cgs 5047 5745f4f097642a8d3aa1e6f949b20d72 sim/testsuite/sim/h8300/ldc.s
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| /trueos/contrib/gcc/ |
| HD | ChangeLog-2006 | 9256 msched-in-control-spec, msched-ldc, msched-control-ldc, 9263 msched-in-control-spec, msched-ldc, msched-control-ldc,
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| /trueos/contrib/llvm/lib/Target/ARM/ |
| HD | ARMInstrThumb2.td | 3913 defm t2LDC : t2LdStCop<0b1110, 1, 0, "ldc">;
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| HD | ARMInstrInfo.td | 4877 defm LDC : LdStCop <1, 0, "ldc">;
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| /trueos/contrib/binutils/gas/config/ |
| HD | tc-arm.c | 15031 TCE(ldc, c100000, ec100000, 3, (RCP, RCN, ADDRGLDC), lstc, lstc),
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