| /trueos/contrib/llvm/lib/Target/ARM/MCTargetDesc/ |
| HD | ARMMCCodeEmitter.cpp | 422 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 451 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues() 745 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() 746 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() 762 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue() 844 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue() 880 unsigned Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getT2AddrModeImm0_1020s4OpValue() 963 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getLdStSORegOpValue() 964 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getLdStSORegOpValue() 998 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrMode2OpValue() [all …]
|
| HD | ARMELFStreamer.cpp | 812 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes() 896 unsigned Reg = MRI->getEncodingValue(RegList[i]); in emitRegSave()
|
| /trueos/contrib/llvm/lib/Target/ARM/ |
| HD | ARMCodeEmitter.cpp | 259 unsigned Reg = II->getRegisterInfo().getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue() 301 unsigned Reg = II->getRegisterInfo().getEncodingValue(MO.getReg()); in getAddrMode5OpValue() 455 return II->getRegisterInfo().getEncodingValue(MO.getReg()); in getMachineOpValue() 791 Binary |= II->getRegisterInfo().getEncodingValue(ARM::PC) << ARMII::RegRnShift; in emitLEApcrelJTInstruction() 978 return Binary | (II->getRegisterInfo().getEncodingValue(Rs) << ARMII::RegRsShift); in getMachineSoRegOpValue() 1029 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRd) << ARMII::RegRdShift); in emitDataProcessingInstruction() 1079 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRn) << ARMII::RegRnShift); in emitDataProcessingInstruction() 1096 emitWordLE(Binary | II->getRegisterInfo().getEncodingValue(MO.getReg())); in emitDataProcessingInstruction() 1139 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRd) << ARMII::RegRdShift); in emitLoadStoreInstruction() 1146 Binary |= (II->getRegisterInfo().getEncodingValue(ImplicitRn) << ARMII::RegRnShift); in emitLoadStoreInstruction() [all …]
|
| /trueos/contrib/llvm/lib/Target/R600/MCTargetDesc/ |
| HD | R600MCCodeEmitter.cpp | 162 return MRI.getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan() 166 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg() 174 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| HD | SIMCCodeEmitter.cpp | 173 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| /trueos/contrib/llvm/lib/Target/R600/ |
| HD | R600ExpandSpecialInstrs.cpp | 193 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction() 220 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction() 221 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction() 297 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
|
| HD | R600RegisterInfo.cpp | 69 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan() 73 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
|
| HD | AMDGPUAsmPrinter.cpp | 126 unsigned HWReg = RI->getEncodingValue(MO.getReg()) & 0xff; in EmitProgramInfoR600() 245 hwReg = RI->getEncodingValue(reg) & 0xff; in EmitProgramInfoSI()
|
| HD | SIRegisterInfo.cpp | 59 return getEncodingValue(Reg); in getHWRegIndex()
|
| HD | SIInsertWaits.cpp | 198 Result.first = TRI->getEncodingValue(Reg); in getRegInterval()
|
| HD | R600InstrInfo.cpp | 364 unsigned Index = RI.getEncodingValue(Reg) & 0xff; in ExtractSrcs() 457 if (Src.first == GET_REG_INDEX(RI.getEncodingValue(AMDGPU::OQAP))) { in isLegalUpTo() 645 unsigned Index = RI.getEncodingValue(Src.first->getReg()) & 0xff; in fitsConstReadLimitations()
|
| /trueos/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| HD | PPCMCCodeEmitter.cpp | 220 return CTX.getRegisterInfo()->getEncodingValue(PPC::X13); in getTLSRegEncoding() 241 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding() 254 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| /trueos/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCCodeEmitter.cpp | 148 return 0x80 >> TM.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding() 282 return TM.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| HD | PPCFrameLowering.cpp | 108 unsigned RegNo = TRI->getEncodingValue(I->first); in HandleVRSaveUpdate() 124 unsigned RegNo = TRI->getEncodingValue(MO.getReg()); in HandleVRSaveUpdate() 1043 LowerBound -= (31 - TRI->getEncodingValue(MinFPR) + 1) * 8; in processFunctionBeforeFrameFinalized() 1088 std::min<unsigned>(TRI->getEncodingValue(MinGPR), in processFunctionBeforeFrameFinalized() 1089 TRI->getEncodingValue(MinG8R)); in processFunctionBeforeFrameFinalized()
|
| HD | PPCRegisterInfo.cpp | 400 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling() 441 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore()
|
| /trueos/contrib/llvm/lib/Target/Sparc/MCTargetDesc/ |
| HD | SparcMCCodeEmitter.cpp | 105 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| /trueos/contrib/llvm/lib/Target/Mips/ |
| HD | MipsAsmPrinter.cpp | 195 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); in printSavedRegsBitmask() 210 unsigned RegNum = TM.getRegisterInfo()->getEncodingValue(Reg); in printSavedRegsBitmask()
|
| HD | MipsCodeEmitter.cpp | 251 return TM.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| /trueos/contrib/llvm/lib/Target/AArch64/ |
| HD | AArch64AsmPrinter.cpp | 41 O << RegType << TRI->getEncodingValue(MO.getReg()); in printModifiedFPRAsmOperand()
|
| /trueos/contrib/llvm/lib/Target/Sparc/ |
| HD | SparcCodeEmitter.cpp | 174 return TM.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| /trueos/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| HD | SystemZMCCodeEmitter.cpp | 109 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
|
| /trueos/contrib/llvm/lib/Target/ARM/AsmParser/ |
| HD | ARMAsmParser.cpp | 3061 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3076 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3101 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList() 3107 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3129 if (MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) { in parseRegisterList() 3135 if (MRI->getEncodingValue(Reg) == MRI->getEncodingValue(OldReg)) { in parseRegisterList() 3144 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 3147 EReg = MRI->getEncodingValue(++Reg); in parseRegisterList() 5238 unsigned Rt = MRI->getEncodingValue(Reg1); in ParseInstruction() 5239 unsigned Rt2 = MRI->getEncodingValue(Reg2); in ParseInstruction() [all …]
|
| /trueos/contrib/llvm/include/llvm/MC/ |
| HD | MCRegisterInfo.h | 405 uint16_t getEncodingValue(unsigned RegNo) const { in getEncodingValue() function
|
| /trueos/contrib/llvm/lib/Target/X86/MCTargetDesc/ |
| HD | X86MCTargetDesc.cpp | 215 unsigned SEH = MRI->getEncodingValue(Reg); in InitLLVM2SEHRegisterMapping()
|
| /trueos/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
| HD | MipsMCCodeEmitter.cpp | 470 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
|