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/trueos/sys/gnu/dts/arm/
HDtegra124-jetson-tk1.dts64 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
71 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
78 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
99 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
113 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
120 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]
HDtegra114-roth.dts61 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
68 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
77 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
84 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
93 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
103 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
111 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
126 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
141 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
HDtegra114-dalmore.dts64 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
71 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
80 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
87 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
96 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
114 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
129 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
137 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
144 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
HDste-href-ab8500.dtsi55 input-enable;
68 input-enable;
81 input-enable;
94 input-enable;
107 input-enable;
120 input-enable;
133 input-enable;
146 input-enable;
159 input-enable;
172 input-enable;
[all …]
HDtegra124-venice2.dts54 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
61 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
70 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
77 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
94 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
103 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
110 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
118 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
128 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]
HDste-href-ab8505.dtsi43 input-enable;
56 input-enable;
69 input-enable;
82 input-enable;
95 input-enable;
108 input-enable;
122 input-enable;
139 input-enable;
154 input-enable;
167 input-enable;
[all …]
HDtegra124-nyan-big.dts54 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
61 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
70 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
78 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
87 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
94 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
102 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
124 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
131 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]
HDwm8750.dtsi154 enable-reg = <0x254>;
155 enable-bit = <24>;
162 enable-reg = <0x254>;
163 enable-bit = <25>;
170 enable-reg = <0x254>;
171 enable-bit = <26>;
178 enable-reg = <0x254>;
179 enable-bit = <27>;
186 enable-reg = <0x254>;
187 enable-bit = <28>;
[all …]
HDwm8505.dtsi144 enable-reg = <0x250>;
145 enable-bit = <1>;
152 enable-reg = <0x250>;
153 enable-bit = <2>;
160 enable-reg = <0x250>;
161 enable-bit = <3>;
168 enable-reg = <0x250>;
169 enable-bit = <4>;
176 enable-reg = <0x250>;
177 enable-bit = <22>;
[all …]
HDwm8850.dtsi165 enable-reg = <0x254>;
166 enable-bit = <24>;
173 enable-reg = <0x254>;
174 enable-bit = <25>;
181 enable-reg = <0x254>;
182 enable-bit = <26>;
189 enable-reg = <0x254>;
190 enable-bit = <27>;
198 enable-reg = <0x250>;
199 enable-bit = <17>;
[all …]
HDvt8500.dtsi72 enable-reg = <0x250>;
73 enable-bit = <1>;
80 enable-reg = <0x250>;
81 enable-bit = <2>;
88 enable-reg = <0x250>;
89 enable-bit = <3>;
96 enable-reg = <0x250>;
97 enable-bit = <4>;
HDtegra30-cardhu-a04.dts31 enable-active-high;
43 enable-active-high;
53 enable-active-high;
65 enable-active-high;
77 enable-active-high;
89 enable-active-high;
101 enable-active-high;
HDtegra30-cardhu-a02.dts31 enable-active-high;
43 enable-active-high;
53 enable-active-high;
65 enable-active-high;
77 enable-active-high;
89 enable-active-high;
/trueos/etc/
HDnscd.conf6 enable-cache passwd yes
7 enable-cache group yes
8 enable-cache hosts yes
9 enable-cache services yes
10 enable-cache protocols yes
11 enable-cache rpc yes
12 enable-cache networks yes
/trueos/sys/contrib/octeon-sdk/
HDcvmx-helper-spi.c94 cvmx_pko_reg_crc_enable_t enable; in __cvmx_helper_spi_enumerate() local
96 enable.u64 = cvmx_read_csr(CVMX_PKO_REG_CRC_ENABLE); in __cvmx_helper_spi_enumerate()
97 enable.s.enable &= 0xffff << (16 - (interface*16)); in __cvmx_helper_spi_enumerate()
98 cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64); in __cvmx_helper_spi_enumerate()
139 cvmx_pko_reg_crc_enable_t enable; in __cvmx_helper_spi_probe() local
146 enable.u64 = cvmx_read_csr(CVMX_PKO_REG_CRC_ENABLE); in __cvmx_helper_spi_probe()
147 enable.s.enable |= 0xffff << (interface*16); in __cvmx_helper_spi_probe()
148 cvmx_write_csr(CVMX_PKO_REG_CRC_ENABLE, enable.u64); in __cvmx_helper_spi_probe()
HDcvmx-mpi-defs.h167 …uint64_t enable : 1; /**< If 0, UART0_DTR_L/SPI_DO, UART0_DCD_L/SPI_DI … member
175 uint64_t enable : 1;
229 uint64_t enable : 1; /**< If 0, all MPI pins are GPIOs member
232 uint64_t enable : 1;
280 uint64_t enable : 1; /**< If 0, all MPI pins are GPIOs member
283 uint64_t enable : 1;
339 …uint64_t enable : 1; /**< If 0, UART0_DTR_L/SPI_DO, UART0_DCD_L/SPI_DI … member
347 uint64_t enable : 1;
405 …uint64_t enable : 1; /**< If 0, UART0_DTR_L/SPI_DO, UART0_DCD_L/SPI_DI … member
413 uint64_t enable : 1;
/trueos/contrib/sqlite3/
HDconfigure.ac5 # --enable-threadsafe
6 # --enable-readline
7 # --enable-dynamic-extensions
33 # --enable-readline
36 [--enable-readline],
52 # --enable-threadsafe
55 [--enable-threadsafe], [build a thread-safe library [default=yes]])],
66 # --enable-dynamic-extensions
69 [--enable-dynamic-extensions], [support loadable extensions [default=yes]])],
87 # --enable-tempstore
[all …]
/trueos/contrib/ntp/
HDTODO97 Fujitsu's UXP --enable-adjtime-is-accurate
98 --enable-step-slew
100 Unixware --enable-adjtime-is-accurate
101 --enable-tick=10000
102 --enable-tickadj=80
103 --enable-udp-wildcard
106 DomainOS --enable-adjtime-is-accurate
108 --enable-tick=1000000
110 OpenVMS --enable-slew-always
111 --enable-hourly-todr-sync
[all …]
/trueos/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/java_api/src/
HDTestEnable.java55 consumer.enable(p0); in main()
56 consumer.enable(p1); in main()
69 consumer.enable(); in main()
80 consumer.enable(p0); in main()
90 consumer.enable(p2); in main()
104 consumer.enable(); in main()
120 consumer.enable(p3x); in main()
132 consumer.enable(p3); in main()
142 consumer.enable(); in main()
/trueos/lib/libc/i386/sys/
HDi386_get_ioperm.c33 i386_get_ioperm(unsigned int start, unsigned int *length, int *enable) in i386_get_ioperm() argument
40 p.enable = *enable; in i386_get_ioperm()
45 *enable = p.enable; in i386_get_ioperm()
/trueos/sys/arm/mv/
HDgpio.c84 static void mv_gpio_blink(uint32_t pin, uint8_t enable);
85 static void mv_gpio_polarity(uint32_t pin, uint8_t enable);
86 static void mv_gpio_level(uint32_t pin, uint8_t enable);
87 static void mv_gpio_edge(uint32_t pin, uint8_t enable);
88 static void mv_gpio_out_en(uint32_t pin, uint8_t enable);
337 mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable) in mv_gpio_out() argument
341 mv_gpio_out_en(pin, enable); in mv_gpio_out()
388 mv_gpio_out_en(uint32_t pin, uint8_t enable) in mv_gpio_out_en() argument
401 if (enable) in mv_gpio_out_en()
408 mv_gpio_blink(uint32_t pin, uint8_t enable) in mv_gpio_blink() argument
[all …]
/trueos/sys/arm/ti/
HDti_adc.c131 if (ti_adc_inputs[ain].enable) in ti_adc_setup()
193 ti_adc_inputs[ain].enable = 0; in ti_adc_reset()
239 int32_t enable; in ti_adc_enable_proc() local
246 enable = input->enable; in ti_adc_enable_proc()
247 error = sysctl_handle_int(oidp, &enable, sizeof(enable), in ti_adc_enable_proc()
252 if (enable) in ti_adc_enable_proc()
253 enable = 1; in ti_adc_enable_proc()
257 if (input->enable != enable) { in ti_adc_enable_proc()
258 input->enable = enable; in ti_adc_enable_proc()
260 if (input->enable == 0) in ti_adc_enable_proc()
[all …]
/trueos/sys/net80211/
HDieee80211_alq.c72 ieee80211_alq_setlogging(int enable) in ieee80211_alq_setlogging() argument
76 if (enable) { in ieee80211_alq_setlogging()
105 int error, enable; in sysctl_ieee80211_alq_log() local
107 enable = (ieee80211_alq != NULL); in sysctl_ieee80211_alq_log()
108 error = sysctl_handle_int(oidp, &enable, 0, req); in sysctl_ieee80211_alq_log()
112 return (ieee80211_alq_setlogging(enable)); in sysctl_ieee80211_alq_log()
/trueos/contrib/libarchive/libarchive/test/
HDtest_archive_read_support.c65 test_filter_or_format(enabler enable) in test_filter_or_format() argument
67 test_success(archive_read_new, enable, archive_read_free); in test_filter_or_format()
68 test_failure(archive_write_new, enable, archive_write_free); in test_filter_or_format()
69 test_failure(archive_read_disk_new, enable, archive_read_free); in test_filter_or_format()
70 test_failure(archive_write_disk_new, enable, archive_write_free); in test_filter_or_format()
/trueos/sys/dev/fdt/
HDfdt_clock.c52 enable_disable_all(device_t consumer, boolean_t enable) in enable_disable_all() argument
63 if (enable && ncells < 2) { in enable_disable_all()
73 if (enable) in enable_disable_all()
80 if (enable) in enable_disable_all()
85 if (enable) in enable_disable_all()

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