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Searched refs:X86Subtarget (Results 1 – 21 of 21) sorted by relevance

/trueos/contrib/llvm/lib/Target/X86/
HDX86Subtarget.cpp40 unsigned char X86Subtarget::ClassifyBlockAddressReference() const { in ClassifyBlockAddressReference()
54 unsigned char X86Subtarget::
150 const char *X86Subtarget::getBZeroEntry() const { in getBZeroEntry()
159 bool X86Subtarget::hasSinCos() const { in hasSinCos()
167 bool X86Subtarget::IsLegalToCallImmediateAddr(const TargetMachine &TM) const { in IsLegalToCallImmediateAddr()
193 void X86Subtarget::AutoDetectSubtargetFeatures() { in AutoDetectSubtargetFeatures()
399 void X86Subtarget::resetSubtargetFeatures(const MachineFunction *MF) { in resetSubtargetFeatures()
415 void X86Subtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { in resetSubtargetFeatures()
492 void X86Subtarget::initializeEnvironment() { in initializeEnvironment()
536 X86Subtarget::X86Subtarget(const std::string &TT, const std::string &CPU, in X86Subtarget() function in X86Subtarget
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HDX86AsmPrinter.h27 const X86Subtarget *Subtarget;
43 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86AsmPrinter()
50 const X86Subtarget &getSubtarget() const { return *Subtarget; } in getSubtarget()
HDX86RegisterInfo.cpp58 : X86GenRegisterInfo((tm.getSubtarget<X86Subtarget>().is64Bit() in X86RegisterInfo()
62 (tm.getSubtarget<X86Subtarget>().is64Bit() in X86RegisterInfo()
68 const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86RegisterInfo()
179 const X86Subtarget &Subtarget = TM.getSubtarget<X86Subtarget>(); in getPointerRegClass()
229 return TM.getSubtarget<X86Subtarget>().is64Bit() ? 10 : 4; in getRegPressureLimit()
248 bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX(); in getCalleeSavedRegs()
249 bool HasAVX512 = TM.getSubtarget<X86Subtarget>().hasAVX512(); in getCalleeSavedRegs()
287 bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX(); in getCallPreservedMask()
288 bool HasAVX512 = TM.getSubtarget<X86Subtarget>().hasAVX512(); in getCallPreservedMask()
386 if (!Is64Bit || !TM.getSubtarget<X86Subtarget>().hasAVX512()) { in getReservedRegs()
HDX86SelectionDAGInfo.h23 class X86Subtarget; variable
28 const X86Subtarget *Subtarget;
HDX86JITInfo.h23 class X86Subtarget; variable
27 const X86Subtarget *Subtarget;
HDX86FrameLowering.h28 const X86Subtarget &STI;
30 explicit X86FrameLowering(const X86TargetMachine &tm, const X86Subtarget &sti) in X86FrameLowering()
HDX86TargetMachine.h33 X86Subtarget Subtarget;
53 virtual const X86Subtarget *getSubtargetImpl() const{ return &Subtarget; } in getSubtargetImpl()
HDX86Subtarget.h42 class X86Subtarget : public X86GenSubtargetInfo {
212 X86Subtarget(const std::string &TT, const std::string &CPU,
HDX86InstrInfo.cpp99 : X86GenInstrInfo((tm.getSubtarget<X86Subtarget>().is64Bit() in X86InstrInfo()
102 (tm.getSubtarget<X86Subtarget>().is64Bit() in X86InstrInfo()
1463 if (!TM.getSubtarget<X86Subtarget>().is64Bit()) in isCoalescableExtInstr()
1939 if (TM.getSubtarget<X86Subtarget>().is64Bit()) { in convertToThreeAddressWithLEA()
1995 if (TM.getSubtarget<X86Subtarget>().is64Bit()) in convertToThreeAddressWithLEA()
2065 bool is64Bit = TM.getSubtarget<X86Subtarget>().is64Bit(); in convertToThreeAddress()
2071 if (!TM.getSubtarget<X86Subtarget>().hasSSE2()) return 0; in convertToThreeAddress()
2083 if (!TM.getSubtarget<X86Subtarget>().hasSSE2()) return 0; in convertToThreeAddress()
2926 if (!TM.getSubtarget<X86Subtarget>().hasCMov()) in canInsertSelect()
2977 const X86Subtarget& Subtarget) { in CopyToFromAsymmetricReg()
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HDX86TargetMachine.cpp155 const X86Subtarget &getX86Subtarget() const { in getX86Subtarget()
HDX86ISelLowering.h741 const X86Subtarget* getSubtarget() const { in getSubtarget()
790 const X86Subtarget *Subtarget;
HDX86ISelLowering.cpp180 const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); in createTLOF()
200 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86TargetLowering()
3631 const X86Subtarget *Subtarget) { in isPALIGNRMask()
4258 const X86Subtarget *Subtarget) { in isMOVSHDUPMask()
4282 const X86Subtarget *Subtarget) { in isMOVSLDUPMask()
4714 static SDValue getZeroVector(EVT VT, const X86Subtarget *Subtarget, in getZeroVector()
4919 const X86Subtarget *Subtarget, in getShuffleVectorZeroOrUndef()
5224 const X86Subtarget* Subtarget, in LowerBuildVectorv16i8()
5272 const X86Subtarget* Subtarget, in LowerBuildVectorv8i16()
5498 static SDValue LowerVectorBroadcast(SDValue Op, const X86Subtarget* Subtarget, in LowerVectorBroadcast()
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HDX86JITInfo.cpp438 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86JITInfo()
HDX86SelectionDAGInfo.cpp22 Subtarget(&TM.getSubtarget<X86Subtarget>()), in X86SelectionDAGInfo()
HDX86CodeEmitter.cpp135 Is64BitMode = TM.getSubtarget<X86Subtarget>().is64Bit(); in runOnMachineFunction()
404 if (TM.getSubtarget<X86Subtarget>().is64Bit() && in gvNeedsNonLazyPtr()
405 !TM.getSubtarget<X86Subtarget>().isTargetDarwin()) in gvNeedsNonLazyPtr()
HDX86RegisterInfo.td323 return MF.getTarget().getSubtarget<X86Subtarget>().is64Bit();
375 return MF.getTarget().getSubtarget<X86Subtarget>().is64Bit();
HDX86FastISel.cpp47 const X86Subtarget *Subtarget;
60 Subtarget = &TM.getSubtarget<X86Subtarget>(); in X86FastISel()
920 static unsigned X86ChooseCmpOpcode(EVT VT, const X86Subtarget *Subtarget) { in X86ChooseCmpOpcode()
1862 static unsigned computeBytesPoppedByCallee(const X86Subtarget &Subtarget, in computeBytesPoppedByCallee()
HDX86TargetTransformInfo.cpp36 const X86Subtarget *ST;
HDX86CallingConv.td17 : CCIf<!strconcat("State.getTarget().getSubtarget<X86Subtarget>().", F), A>;
HDX86ISelDAGToDAG.cpp147 const X86Subtarget *Subtarget;
156 Subtarget(&tm.getSubtarget<X86Subtarget>()), in X86DAGToDAGISel()
/trueos/lib/clang/libllvmx86codegen/
HDMakefile24 X86Subtarget.cpp \