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Searched refs:ShAmt (Results 1 – 23 of 23) sorted by relevance

/trueos/contrib/llvm/lib/CodeGen/SelectionDAG/
HDTargetLowering.cpp599 unsigned ShAmt = SA->getZExtValue(); in SimplifyDemandedBits() local
603 if (ShAmt >= BitWidth) in SimplifyDemandedBits()
611 if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) { in SimplifyDemandedBits()
614 int Diff = ShAmt-C1; in SimplifyDemandedBits()
628 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), in SimplifyDemandedBits()
638 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && in SimplifyDemandedBits()
641 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) in SimplifyDemandedBits()
645 TLO.DAG.getConstant(ShAmt, ShTy)); in SimplifyDemandedBits()
662 if (InnerShAmt < ShAmt && in SimplifyDemandedBits()
664 NewMask.lshr(InnerBits - InnerShAmt + ShAmt) == 0 && in SimplifyDemandedBits()
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HDLegalizeVectorOps.cpp455 SDValue Lo, Hi, ShAmt; in ExpandLoad() local
458 ShAmt = DAG.getConstant(BitOffset, TLI.getShiftAmountTy(WideVT)); in ExpandLoad()
459 Lo = DAG.getNode(ISD::SRL, dl, WideVT, LoadVals[WideIdx], ShAmt); in ExpandLoad()
468 ShAmt = DAG.getConstant(SrcEltBits - Offset, in ExpandLoad()
470 Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt); in ExpandLoad()
487 ShAmt = DAG.getConstant(WideBits - SrcEltBits, in ExpandLoad()
489 Lo = DAG.getNode(ISD::SHL, dl, WideVT, Lo, ShAmt); in ExpandLoad()
490 Lo = DAG.getNode(ISD::SRA, dl, WideVT, Lo, ShAmt); in ExpandLoad()
HDDAGCombiner.cpp3120 SDValue ShAmt = DAG.getConstant(16, getShiftAmountTy(VT)); in MatchBSwapHWord() local
3122 return DAG.getNode(ISD::ROTL, SDLoc(N), VT, BSwap, ShAmt); in MatchBSwapHWord()
3124 return DAG.getNode(ISD::ROTR, SDLoc(N), VT, BSwap, ShAmt); in MatchBSwapHWord()
3126 DAG.getNode(ISD::SHL, SDLoc(N), VT, BSwap, ShAmt), in MatchBSwapHWord()
3127 DAG.getNode(ISD::SRL, SDLoc(N), VT, BSwap, ShAmt)); in MatchBSwapHWord()
4004 uint64_t ShAmt = N1C->getZExtValue()+64-N0.getValueSizeInBits(); in visitSRL() local
4006 DAG.getConstant(~0ULL >> ShAmt, VT)); in visitSRL()
4057 unsigned ShAmt = UnknownBits.countTrailingZeros(); in visitSRL() local
4060 if (ShAmt) { in visitSRL()
4062 DAG.getConstant(ShAmt, getShiftAmountTy(Op.getValueType()))); in visitSRL()
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HDSelectionDAG.cpp1899 unsigned ShAmt = SA->getZExtValue(); in ComputeMaskedBits() local
1902 if (ShAmt >= BitWidth) in ComputeMaskedBits()
1907 KnownZero <<= ShAmt; in ComputeMaskedBits()
1908 KnownOne <<= ShAmt; in ComputeMaskedBits()
1910 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt); in ComputeMaskedBits()
1916 unsigned ShAmt = SA->getZExtValue(); in ComputeMaskedBits() local
1919 if (ShAmt >= BitWidth) in ComputeMaskedBits()
1924 KnownZero = KnownZero.lshr(ShAmt); in ComputeMaskedBits()
1925 KnownOne = KnownOne.lshr(ShAmt); in ComputeMaskedBits()
1927 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt); in ComputeMaskedBits()
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HDSelectionDAGBuilder.cpp4865 SDValue ShAmt = getValue(I.getArgOperand(1)); in visitIntrinsicCall() local
4866 if (isa<ConstantSDNode>(ShAmt)) { in visitIntrinsicCall()
4905 ShOps[0] = ShAmt; in visitIntrinsicCall()
4907 ShAmt = DAG.getNode(ISD::BUILD_VECTOR, sdl, ShAmtVT, &ShOps[0], 2); in visitIntrinsicCall()
4909 ShAmt = DAG.getNode(ISD::BITCAST, sdl, DestVT, ShAmt); in visitIntrinsicCall()
4912 getValue(I.getArgOperand(0)), ShAmt); in visitIntrinsicCall()
/trueos/contrib/llvm/tools/clang/lib/Lex/
HDPPExpressions.cpp600 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
602 Overflow = ShAmt >= LHS.Val.getBitWidth(); in EvaluateDirectiveSubExpr()
604 ShAmt = LHS.Val.getBitWidth()-1; in EvaluateDirectiveSubExpr()
605 Res = LHS.Val << ShAmt; in EvaluateDirectiveSubExpr()
607 Res = llvm::APSInt(LHS.Val.sshl_ov(ShAmt, Overflow), false); in EvaluateDirectiveSubExpr()
613 unsigned ShAmt = static_cast<unsigned>(RHS.Val.getLimitedValue()); in EvaluateDirectiveSubExpr() local
614 if (ShAmt >= LHS.getBitWidth()) in EvaluateDirectiveSubExpr()
615 Overflow = true, ShAmt = LHS.getBitWidth()-1; in EvaluateDirectiveSubExpr()
616 Res = LHS.Val >> ShAmt; in EvaluateDirectiveSubExpr()
/trueos/contrib/llvm/lib/Transforms/InstCombine/
HDInstCombineShifts.cpp370 Constant *ShAmt = ConstantExpr::getZExt(Op1, TrOp->getType()); in FoldShiftByConstant() local
372 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName()); in FoldShiftByConstant()
687 unsigned ShAmt = Op1C->getZExtValue(); in visitShl() local
692 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt))) { in visitShl()
699 ComputeNumSignBits(I.getOperand(0)) > ShAmt) { in visitShl()
726 unsigned ShAmt = Op1C->getZExtValue(); in visitLShr() local
736 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) { in visitLShr()
746 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ in visitLShr()
766 unsigned ShAmt = Op1C->getZExtValue(); in visitAShr() local
792 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt))){ in visitAShr()
HDInstCombineCompares.cpp967 ConstantInt *ShAmt) { in FoldICmpShrCst() argument
974 uint32_t ShAmtVal = (uint32_t)ShAmt->getLimitedValue(TypeBits); in FoldICmpShrCst()
1195 ConstantInt *ShAmt; in visitICmpInstWithInstAndIntCst() local
1196 ShAmt = Shift ? dyn_cast<ConstantInt>(Shift->getOperand(1)) : 0; in visitICmpInstWithInstAndIntCst()
1207 if (ShAmt) { in visitICmpInstWithInstAndIntCst()
1214 int ShAmtVal = TyBits - ShAmt->getLimitedValue(TyBits); in visitICmpInstWithInstAndIntCst()
1228 NewCst = ConstantExpr::getLShr(RHS, ShAmt); in visitICmpInstWithInstAndIntCst()
1230 NewCst = ConstantExpr::getShl(RHS, ShAmt); in visitICmpInstWithInstAndIntCst()
1235 NewCst, ShAmt) != RHS) { in visitICmpInstWithInstAndIntCst()
1247 NewAndCST = ConstantExpr::getLShr(AndCST, ShAmt); in visitICmpInstWithInstAndIntCst()
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HDInstCombineCasts.cpp1097 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local
1098 return BinaryOperator::CreateAShr(Builder->CreateShl(Res, ShAmt, "sext"), in visitSExt()
1099 ShAmt); in visitSExt()
1110 Value *ShAmt = ConstantInt::get(DestTy, DestBitSize-SrcBitSize); in visitSExt() local
1111 Value *Res = Builder->CreateShl(TI->getOperand(0), ShAmt, "sext"); in visitSExt()
1112 return BinaryOperator::CreateAShr(Res, ShAmt); in visitSExt()
1139 unsigned ShAmt = CA->getZExtValue()+SrcDstSize-MidSize; in visitSExt() local
1140 Constant *ShAmtV = ConstantInt::get(CI.getType(), ShAmt); in visitSExt()
1702 ConstantInt *ShAmt = 0; in OptimizeIntToFloatBitCast() local
1704 m_ConstantInt(ShAmt)))) && in OptimizeIntToFloatBitCast()
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HDInstCombineAddSub.cpp962 Constant *ShAmt = ConstantInt::get(I.getType(), ExtendAmt); in visitAdd() local
963 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext"); in visitAdd()
964 return BinaryOperator::CreateAShr(NewShl, ShAmt); in visitAdd()
HDInstCombineAndOrXor.cpp1404 unsigned ShAmt = in CollectBSwapParts() local
1407 if ((ShAmt & 7) || (ShAmt > 8*ByteValues.size())) in CollectBSwapParts()
1410 unsigned ByteShift = ShAmt >> 3; in CollectBSwapParts()
HDInstCombineMulDivRem.cpp925 Value *ShAmt = llvm::ConstantInt::get(RHS->getType(), in visitSDiv() local
927 return BinaryOperator::CreateExactAShr(Op0, ShAmt, I.getName()); in visitSDiv()
/trueos/contrib/llvm/lib/Target/ARM/
HDARMISelDAGToDAG.cpp93 ARM_AM::ShiftOpc ShOpcVal, unsigned ShAmt);
458 unsigned ShAmt) { in isShifterOpProfitable() argument
465 (ShAmt == 2 || (Subtarget->isSwift() && ShAmt == 1)); in isShifterOpProfitable()
586 unsigned ShAmt = Log2_32(RHSC); in SelectLdStSOReg() local
588 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
614 unsigned ShAmt = 0; in SelectLdStSOReg() local
624 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg()
625 if (isShifterOpProfitable(Offset, ShOpcVal, ShAmt)) in SelectLdStSOReg()
628 ShAmt = 0; in SelectLdStSOReg()
646 ShAmt = Sh->getZExtValue(); in SelectLdStSOReg()
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HDARMBaseInstrInfo.cpp3312 unsigned ShAmt = DefMI->getOperand(3).getImm(); in adjustDefLatency() local
3313 if (ShAmt == 0 || ShAmt == 2) in adjustDefLatency()
3343 unsigned ShAmt = DefMI->getOperand(3).getImm(); in adjustDefLatency() local
3344 if (ShAmt == 0 || ShAmt == 1 || ShAmt == 2 || ShAmt == 3) in adjustDefLatency()
3614 unsigned ShAmt = in getOperandLatency() local
3616 if (ShAmt == 0 || ShAmt == 2) in getOperandLatency()
HDARMISelLowering.cpp3898 SDValue ShAmt = Op.getOperand(2); in LowerShiftRightParts() local
3905 DAG.getConstant(VTBits, MVT::i32), ShAmt); in LowerShiftRightParts()
3906 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
3907 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
3916 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
3934 SDValue ShAmt = Op.getOperand(2); in LowerShiftLeftParts() local
3939 DAG.getConstant(VTBits, MVT::i32), ShAmt); in LowerShiftLeftParts()
3941 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
3943 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
3950 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
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/trueos/contrib/llvm/lib/Transforms/Scalar/
HDScalarReplAggregates.cpp836 int ShAmt = 0; in ConvertScalar_ExtractValue() local
841 ShAmt = TD.getTypeStoreSizeInBits(NTy) - in ConvertScalar_ExtractValue()
844 ShAmt = Offset; in ConvertScalar_ExtractValue()
850 if (ShAmt > 0 && (unsigned)ShAmt < NTy->getBitWidth()) in ConvertScalar_ExtractValue()
852 ConstantInt::get(FromVal->getType(), ShAmt)); in ConvertScalar_ExtractValue()
853 else if (ShAmt < 0 && (unsigned)-ShAmt < NTy->getBitWidth()) in ConvertScalar_ExtractValue()
855 ConstantInt::get(FromVal->getType(), -ShAmt)); in ConvertScalar_ExtractValue()
984 int ShAmt = 0; in ConvertScalar_InsertValue() local
989 ShAmt = DestStoreWidth - SrcStoreWidth - Offset; in ConvertScalar_InsertValue()
991 ShAmt = Offset; in ConvertScalar_InsertValue()
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HDSROA.cpp1773 uint64_t ShAmt = 8*Offset; in extractInteger() local
1775 ShAmt = 8*(DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); in extractInteger()
1776 if (ShAmt) { in extractInteger()
1777 V = IRB.CreateLShr(V, ShAmt, Name + ".shift"); in extractInteger()
1802 uint64_t ShAmt = 8*Offset; in insertInteger() local
1804 ShAmt = 8*(DL.getTypeStoreSize(IntTy) - DL.getTypeStoreSize(Ty) - Offset); in insertInteger()
1805 if (ShAmt) { in insertInteger()
1806 V = IRB.CreateShl(V, ShAmt, Name + ".shift"); in insertInteger()
1810 if (ShAmt || Ty->getBitWidth() < IntTy->getBitWidth()) { in insertInteger()
1811 APInt Mask = ~Ty->getMask().zext(IntTy->getBitWidth()).shl(ShAmt); in insertInteger()
/trueos/contrib/llvm/lib/IR/
HDConstantFold.cpp256 unsigned ShAmt = Amt->getZExtValue(); in ExtractConstantBytes() local
258 if ((ShAmt & 7) != 0) in ExtractConstantBytes()
260 ShAmt >>= 3; in ExtractConstantBytes()
263 if (ByteStart >= CSize-ShAmt) in ExtractConstantBytes()
267 if (ByteStart+ByteSize+ShAmt <= CSize) in ExtractConstantBytes()
268 return ExtractConstantBytes(CE->getOperand(0), ByteStart+ShAmt, ByteSize); in ExtractConstantBytes()
278 unsigned ShAmt = Amt->getZExtValue(); in ExtractConstantBytes() local
280 if ((ShAmt & 7) != 0) in ExtractConstantBytes()
282 ShAmt >>= 3; in ExtractConstantBytes()
285 if (ByteStart+ByteSize <= ShAmt) in ExtractConstantBytes()
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/trueos/contrib/llvm/lib/Analysis/
HDValueTracking.cpp1160 const APInt *ShAmt; in ComputeNumSignBits() local
1161 if (match(U->getOperand(1), m_APInt(ShAmt))) { in ComputeNumSignBits()
1162 Tmp += ShAmt->getZExtValue(); in ComputeNumSignBits()
1168 const APInt *ShAmt; in ComputeNumSignBits() local
1169 if (match(U->getOperand(1), m_APInt(ShAmt))) { in ComputeNumSignBits()
1172 Tmp2 = ShAmt->getZExtValue(); in ComputeNumSignBits()
/trueos/contrib/llvm/lib/Target/ARM/InstPrinter/
HDARMInstPrinter.cpp1223 unsigned ShAmt = MO3.getImm(); in printT2AddrModeSoRegOperand() local
1224 if (ShAmt) { in printT2AddrModeSoRegOperand()
1225 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!"); in printT2AddrModeSoRegOperand()
1228 << "#" << ShAmt in printT2AddrModeSoRegOperand()
/trueos/contrib/llvm/lib/Support/
HDAPInt.cpp2048 APInt APInt::sshl_ov(unsigned ShAmt, bool &Overflow) const { in sshl_ov() argument
2049 Overflow = ShAmt >= getBitWidth(); in sshl_ov()
2051 ShAmt = getBitWidth()-1; in sshl_ov()
2054 Overflow = ShAmt >= countLeadingZeros(); in sshl_ov()
2056 Overflow = ShAmt >= countLeadingOnes(); in sshl_ov()
2058 return *this << ShAmt; in sshl_ov()
/trueos/contrib/llvm/lib/Target/X86/
HDX86InstrInfo.cpp1841 inline static bool isTruncatedShiftCountForLEA(unsigned ShAmt) { in isTruncatedShiftCountForLEA() argument
1847 return ShAmt < 4 && ShAmt > 0; in isTruncatedShiftCountForLEA()
1965 unsigned ShAmt = MI->getOperand(2).getImm(); in convertToThreeAddressWithLEA() local
1966 MIB.addReg(0).addImm(1 << ShAmt) in convertToThreeAddressWithLEA()
2099 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local
2100 if (!isTruncatedShiftCountForLEA(ShAmt)) return 0; in convertToThreeAddress()
2110 .addReg(0).addImm(1 << ShAmt).addOperand(Src).addImm(0).addReg(0); in convertToThreeAddress()
2115 unsigned ShAmt = getTruncatedShiftCount(MI, 2); in convertToThreeAddress() local
2116 if (!isTruncatedShiftCountForLEA(ShAmt)) return 0; in convertToThreeAddress()
2130 .addReg(0).addImm(1 << ShAmt) in convertToThreeAddress()
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HDX86ISelLowering.cpp4416 unsigned ShAmt = (i << Shift) % 8; in getShuffleSHUFImmediate() local
4417 Mask |= Elt << ShAmt; in getShuffleSHUFImmediate()
5136 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShiftRight() argument
5163 ShAmt = NumZeros; in isVectorShiftRight()
5171 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShiftLeft() argument
5198 ShAmt = NumZeros; in isVectorShiftLeft()
5206 bool &isLeft, SDValue &ShVal, unsigned &ShAmt) { in isVectorShift() argument
5212 if (isVectorShiftLeft(SVOp, DAG, isLeft, ShVal, ShAmt) || in isVectorShift()
5213 isVectorShiftRight(SVOp, DAG, isLeft, ShVal, ShAmt)) in isVectorShift()
7355 unsigned ShAmt = 0; in LowerVECTOR_SHUFFLE() local
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