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Searched refs:SXTW (Results 1 – 8 of 8) sorted by relevance

/trueos/contrib/llvm/lib/Target/Hexagon/
HDHexagonPeephole.cpp137 if (!DisableOptSZExt && MI->getOpcode() == Hexagon::SXTW) { in runOnMachineFunction()
HDHexagonInstrInfo.td1639 def SXTW : ALU64_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
2215 // Map from Rdd = sign_extend_inreg(Rss, i32) -> Rdd = SXTW(Rss.lo).
2217 (i64 (SXTW (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg))))>;
2219 // Map from Rdd = sign_extend_inreg(Rss, i16) -> Rdd = SXTW(SXTH(Rss.lo)).
2221 (i64 (SXTW (i32 (SXTH (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1),
2224 // Map from Rdd = sign_extend_inreg(Rss, i8) -> Rdd = SXTW(SXTB(Rss.lo)).
2226 (i64 (SXTW (i32 (SXTB (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1),
2343 (i64 (SXTW (i32 IntRegs:$src1)))>;
2466 (i64 (SXTW (LDrib ADDRriS11_0:$src1)))>;
2471 (i64 (SXTW (LDrib ADDRriS11_0:$src1)))>;
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HDHexagonISelDAGToDAG.cpp455 SDNode *Result_2 = CurDAG->getMachineNode(Hexagon::SXTW, dl, MVT::i64, in SelectIndexedLoadSignExtend64()
476 SDNode *Result_2 = CurDAG->getMachineNode(Hexagon::SXTW, dl, in SelectIndexedLoadSignExtend64()
HDHexagonInstrInfoV4.td3211 (i64 (SXTW (LDrib_abs_V4 tglobaladdr:$addr)))>;
3220 (i64 (SXTW (LDrib_abs_V4 FoldGlobalAddr:$addr)))>;
3235 (i64 (SXTW (LDrih_abs_V4 tglobaladdr:$addr)))>,
3247 (i64 (SXTW (LDrih_abs_V4 FoldGlobalAddr:$addr)))>,
3263 (i64 (SXTW (LDriw_abs_V4 tglobaladdr:$addr)))>,
3275 (i64 (SXTW (LDriw_abs_V4 FoldGlobalAddr:$addr)))>,
/trueos/contrib/llvm/lib/Target/AArch64/InstPrinter/
HDAArch64InstPrinter.cpp352 case A64SE::SXTW: O << "sxtw"; break; in printRegExtendOperand()
/trueos/contrib/llvm/lib/Target/AArch64/Utils/
HDAArch64BaseInfo.h304 SXTW, enumerator
/trueos/contrib/llvm/lib/Target/AArch64/AsmParser/
HDAArch64AsmParser.cpp322 if (RmSize == 32 && !(Ext == A64SE::UXTW || Ext == A64SE::SXTW)) in isAddrRegExtend()
1214 case A64SE::SXTW: in addAddrRegExtendOperands()
1907 .Case("sxtw", A64SE::SXTW) in ParseShiftExtend()
/trueos/contrib/llvm/lib/Target/AArch64/
HDAArch64InstrInfo.td271 defm SXTW : extend_operands<"SXTW", "Small">;
2906 // + If <R> is W, <extend> can be UXTW or SXTW
2935 // Rm is a W-register if UXTW or SXTW are specified as the shift.