| /trueos/contrib/llvm/lib/Target/Mips/TargetInfo/ |
| HD | MipsTargetInfo.cpp | 19 RegisterTarget<Triple::mips, in LLVMInitializeMipsTargetInfo()
22 RegisterTarget<Triple::mipsel, in LLVMInitializeMipsTargetInfo()
25 RegisterTarget<Triple::mips64, in LLVMInitializeMipsTargetInfo()
28 RegisterTarget<Triple::mips64el, in LLVMInitializeMipsTargetInfo()
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| /trueos/contrib/llvm/lib/Target/PowerPC/TargetInfo/ |
| HD | PowerPCTargetInfo.cpp | 18 RegisterTarget<Triple::ppc, /*HasJIT=*/true> in LLVMInitializePowerPCTargetInfo()
21 RegisterTarget<Triple::ppc64, /*HasJIT=*/true> in LLVMInitializePowerPCTargetInfo()
24 RegisterTarget<Triple::ppc64le, /*HasJIT=*/true> in LLVMInitializePowerPCTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/X86/TargetInfo/ |
| HD | X86TargetInfo.cpp | 18 RegisterTarget<Triple::x86, /*HasJIT=*/true> in LLVMInitializeX86TargetInfo()
21 RegisterTarget<Triple::x86_64, /*HasJIT=*/true> in LLVMInitializeX86TargetInfo()
|
| /trueos/contrib/llvm/lib/Target/ARM/TargetInfo/ |
| HD | ARMTargetInfo.cpp | 18 RegisterTarget<Triple::arm, /*HasJIT=*/true> in LLVMInitializeARMTargetInfo()
21 RegisterTarget<Triple::thumb, /*HasJIT=*/true> in LLVMInitializeARMTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/Sparc/TargetInfo/ |
| HD | SparcTargetInfo.cpp | 19 RegisterTarget<Triple::sparc, /*HasJIT=*/ true> in LLVMInitializeSparcTargetInfo()
21 RegisterTarget<Triple::sparcv9, /*HasJIT=*/ true> in LLVMInitializeSparcTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/NVPTX/TargetInfo/ |
| HD | NVPTXTargetInfo.cpp | 19 RegisterTarget<Triple::nvptx> X(TheNVPTXTarget32, "nvptx", in LLVMInitializeNVPTXTargetInfo()
21 RegisterTarget<Triple::nvptx64> Y(TheNVPTXTarget64, "nvptx64", in LLVMInitializeNVPTXTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/XCore/TargetInfo/ |
| HD | XCoreTargetInfo.cpp | 18 RegisterTarget<Triple::xcore> X(TheXCoreTarget, "xcore", "XCore"); in LLVMInitializeXCoreTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/MSP430/TargetInfo/ |
| HD | MSP430TargetInfo.cpp | 18 RegisterTarget<Triple::msp430> in LLVMInitializeMSP430TargetInfo()
|
| /trueos/contrib/llvm/lib/Target/R600/TargetInfo/ |
| HD | AMDGPUTargetInfo.cpp | 24 RegisterTarget<Triple::r600, false> in LLVMInitializeR600TargetInfo()
|
| /trueos/contrib/llvm/lib/Target/Hexagon/TargetInfo/ |
| HD | HexagonTargetInfo.cpp | 18 RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(TheHexagonTarget, "hexagon", "Hexagon"); in LLVMInitializeHexagonTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/SystemZ/TargetInfo/ |
| HD | SystemZTargetInfo.cpp | 18 RegisterTarget<Triple::systemz, /*HasJIT=*/true> in LLVMInitializeSystemZTargetInfo()
|
| /trueos/contrib/llvm/lib/Target/AArch64/TargetInfo/ |
| HD | AArch64TargetInfo.cpp | 22 RegisterTarget<Triple::aarch64, /*HasJIT=*/true> in LLVMInitializeAArch64TargetInfo()
|
| /trueos/contrib/llvm/lib/Target/CppBackend/TargetInfo/ |
| HD | CppBackendTargetInfo.cpp | 23 TargetRegistry::RegisterTarget(TheCppBackendTarget, "cpp", in LLVMInitializeCppBackendTargetInfo()
|
| /trueos/contrib/llvm/include/llvm/Support/ |
| HD | TargetRegistry.h | 585 static void RegisterTarget(Target &T,
832 struct RegisterTarget { struct
833 RegisterTarget(Target &T, const char *Name, const char *Desc) { in RegisterTarget() argument
834 TargetRegistry::RegisterTarget(T, Name, Desc, in RegisterTarget()
|
| /trueos/contrib/llvm/lib/Support/ |
| HD | TargetRegistry.cpp | 104 void TargetRegistry::RegisterTarget(Target &T, in RegisterTarget() function in TargetRegistry
|