Searched refs:RegSeq (Results 1 – 1 of 1) sorted by relevance
| /trueos/contrib/llvm/lib/Target/ARM/ |
| HD | ARMISelDAGToDAG.cpp | 2025 SDValue RegSeq = SDValue(createQuadQRegsNode(MVT::v8i64, V0, V1, V2, V3), 0); in SelectVST() local
2029 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2046 Ops.push_back(RegSeq); in SelectVST()
2266 SDValue RegSeq; in SelectVTBL() local
2270 RegSeq = SDValue(createDRegPairNode(MVT::v16i8, V0, V1), 0); in SelectVTBL()
2278 RegSeq = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0); in SelectVTBL()
2284 Ops.push_back(RegSeq); in SelectVTBL()
3311 SDValue RegSeq = SDValue(createDRegPairNode(MVT::v16i8, V0, V1), 0); in Select() local
3314 Ops.push_back(RegSeq); in Select()
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