Searched refs:RS480_MC_MISC_CNTL (Results 1 – 6 of 6) sorted by relevance
179 WREG32_MC(RS480_MC_MISC_CNTL, in rs400_gart_enable()182 WREG32_MC(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN); in rs400_gart_enable()330 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_debugfs_gart_info()
136 #define RS480_MC_MISC_CNTL 0x18 macro
919 temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL); in radeon_set_igpgart()922 IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN | in radeon_set_igpgart()925 IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN); in radeon_set_igpgart()
571 #define RS480_MC_MISC_CNTL 0x18 macro
860 temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL); in radeon_set_igpgart()863 IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN | in radeon_set_igpgart()866 IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN); in radeon_set_igpgart()
649 #define RS480_MC_MISC_CNTL 0x18 macro