Searched refs:RCId (Results 1 – 5 of 5) sorted by relevance
| /trueos/contrib/llvm/lib/CodeGen/ |
| HD | MachineLICM.cpp | 248 unsigned &RCId, unsigned &RCCost) const; 781 unsigned &RCId, unsigned &RCCost) const { in getRegisterClassIDAndCost() argument 785 RCId = RC->getID(); in getRegisterClassIDAndCost() 788 RCId = TLI->getRepRegClassFor(VT)->getID(); in getRegisterClassIDAndCost() 822 unsigned RCId, RCCost; in InitRegPressure() local 823 getRegisterClassIDAndCost(MI, Reg, i, RCId, RCCost); in InitRegPressure() 825 RegPressure[RCId] += RCCost; in InitRegPressure() 830 RegPressure[RCId] += RCCost; in InitRegPressure() 832 RegPressure[RCId] -= RCCost; in InitRegPressure() 857 unsigned RCId, RCCost; in UpdateRegPressure() local [all …]
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| /trueos/contrib/llvm/include/llvm/CodeGen/ |
| HD | ResourcePriorityQueue.h | 117 signed rawRegPressureDelta (SUnit *SU, unsigned RCId); 137 unsigned numberRCValPredInSU (SUnit *SU, unsigned RCId); 138 unsigned numberRCValSuccInSU (SUnit *SU, unsigned RCId);
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| /trueos/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| HD | ResourcePriorityQueue.cpp | 71 ResourcePriorityQueue::numberRCValPredInSU(SUnit *SU, unsigned RCId) { in numberRCValPredInSU() argument 99 && (TLI->getRegClassFor(VT)->getID() == RCId)) { in numberRCValPredInSU() 109 unsigned RCId) { in numberRCValSuccInSU() argument 137 && (TLI->getRegClassFor(VT)->getID() == RCId)) { in numberRCValSuccInSU() 327 signed ResourcePriorityQueue::rawRegPressureDelta(SUnit *SU, unsigned RCId) { in rawRegPressureDelta() argument 338 && TLI->getRegClassFor(VT)->getID() == RCId) in rawRegPressureDelta() 339 RegBalance += numberRCValSuccInSU(SU, RCId); in rawRegPressureDelta() 349 && TLI->getRegClassFor(VT)->getID() == RCId) in rawRegPressureDelta() 350 RegBalance -= numberRCValPredInSU(SU, RCId); in rawRegPressureDelta()
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| HD | ScheduleDAGRRList.cpp | 1961 unsigned RCId, Cost; in HighRegPressure() local 1962 GetCostForDef(RegDefPos, TLI, TII, TRI, RCId, Cost, MF); in HighRegPressure() 1964 if ((RegPressure[RCId] + Cost) >= RegLimit[RCId]) in HighRegPressure() 1982 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in MayReduceRegPressure() local 1983 if (RegPressure[RCId] >= RegLimit[RCId]) in MayReduceRegPressure() 2014 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in RegPressureDiff() local 2015 if (RegPressure[RCId] >= RegLimit[RCId]) in RegPressureDiff() 2029 unsigned RCId = TLI->getRepRegClassFor(VT)->getID(); in RegPressureDiff() local 2030 if (RegPressure[RCId] >= RegLimit[RCId]) in RegPressureDiff() 2075 unsigned RCId, Cost; in scheduledNode() local [all …]
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| /trueos/contrib/llvm/lib/Target/NVPTX/InstPrinter/ |
| HD | NVPTXInstPrinter.cpp | 41 unsigned RCId = (RegNo >> 28); in printRegName() local 42 switch (RCId) { in printRegName()
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